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Searched full:gpc (Results 1 – 25 of 193) sorted by relevance

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/kernel/linux/linux-6.6/virt/kvm/
Dpfncache.c29 struct gfn_to_pfn_cache *gpc; in gfn_to_pfn_cache_invalidate_start() local
33 list_for_each_entry(gpc, &kvm->gpc_list, list) { in gfn_to_pfn_cache_invalidate_start()
34 write_lock_irq(&gpc->lock); in gfn_to_pfn_cache_invalidate_start()
37 if (gpc->valid && !is_error_noslot_pfn(gpc->pfn) && in gfn_to_pfn_cache_invalidate_start()
38 gpc->uhva >= start && gpc->uhva < end) { in gfn_to_pfn_cache_invalidate_start()
39 gpc->valid = false; in gfn_to_pfn_cache_invalidate_start()
45 if (gpc->usage & KVM_GUEST_USES_PFN) { in gfn_to_pfn_cache_invalidate_start()
50 __set_bit(gpc->vcpu->vcpu_idx, vcpu_bitmap); in gfn_to_pfn_cache_invalidate_start()
53 write_unlock_irq(&gpc->lock); in gfn_to_pfn_cache_invalidate_start()
79 bool kvm_gpc_check(struct gfn_to_pfn_cache *gpc, unsigned long len) in kvm_gpc_check() argument
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dgv100.c28 gv100_gr_trap_sm(struct gf100_gr *gr, int gpc, int tpc, int sm) in gv100_gr_trap_sm() argument
32 u32 werr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x730 + (sm * 0x80))); in gv100_gr_trap_sm()
33 u32 gerr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x734 + (sm * 0x80))); in gv100_gr_trap_sm()
40 nvkm_error(subdev, "GPC%i/TPC%i/SM%d trap: " in gv100_gr_trap_sm()
42 gpc, tpc, sm, gerr, glob, werr, warp ? warp->name : ""); in gv100_gr_trap_sm()
44 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x730 + sm * 0x80), 0x00000000); in gv100_gr_trap_sm()
45 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x734 + sm * 0x80), gerr); in gv100_gr_trap_sm()
49 gv100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc) in gv100_gr_trap_mp() argument
51 gv100_gr_trap_sm(gr, gpc, tpc, 0); in gv100_gr_trap_mp()
52 gv100_gr_trap_sm(gr, gpc, tpc, 1); in gv100_gr_trap_mp()
[all …]
Dctxgp100.c52 int gpc, ppc, n = 0; in gp100_grctx_generate_attrib() local
58 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gp100_grctx_generate_attrib()
60 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gp100_grctx_generate_attrib()
63 const u32 o = PPC_UNIT(gpc, ppc, 0); in gp100_grctx_generate_attrib()
65 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gp100_grctx_generate_attrib()
74 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gp100_grctx_generate_attrib()
97 int gpc; in gp100_grctx_generate_attrib_cb_size() local
99 for (gpc = 0; gpc < gr->gpc_nr; gpc++) in gp100_grctx_generate_attrib_cb_size()
114 const u8 gpc = gr->sm[sm].gpc; in gp100_grctx_generate_smid_config() local
116 dist[sm / 4] |= ((gpc << 4) | tpc) << ((sm % 4) * 8); in gp100_grctx_generate_smid_config()
[all …]
Dctxgp102.c51 int gpc, ppc, n = 0; in gp102_grctx_generate_attrib() local
57 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gp102_grctx_generate_attrib()
59 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gp102_grctx_generate_attrib()
63 const u32 o = PPC_UNIT(gpc, ppc, 0); in gp102_grctx_generate_attrib()
64 const u32 p = GPC_UNIT(gpc, 0xc44 + (ppc * 4)); in gp102_grctx_generate_attrib()
66 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gp102_grctx_generate_attrib()
76 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gp102_grctx_generate_attrib()
90 int gpc; in gp102_grctx_generate_attrib_cb_size() local
92 for (gpc = 0; gpc < gr->gpc_nr; gpc++) in gp102_grctx_generate_attrib_cb_size()
Dgf100.c1235 gf100_gr_trap_gpc_rop(struct gf100_gr *gr, int gpc) in gf100_gr_trap_gpc_rop() argument
1242 trap[0] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0420)) & 0x3fffffff; in gf100_gr_trap_gpc_rop()
1243 trap[1] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0434)); in gf100_gr_trap_gpc_rop()
1244 trap[2] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0438)); in gf100_gr_trap_gpc_rop()
1245 trap[3] = nvkm_rd32(device, GPC_UNIT(gpc, 0x043c)); in gf100_gr_trap_gpc_rop()
1249 nvkm_error(subdev, "GPC%d/PROP trap: %08x [%s] x = %u, y = %u, " in gf100_gr_trap_gpc_rop()
1251 gpc, trap[0], error, trap[1] & 0xffff, trap[1] >> 16, in gf100_gr_trap_gpc_rop()
1253 nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000); in gf100_gr_trap_gpc_rop()
1296 gf100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_trap_mp() argument
1300 u32 werr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x648)); in gf100_gr_trap_mp()
[all …]
Dctxgm200.c55 const u8 gpc = gr->sm[sm].gpc; in gm200_grctx_generate_smid_config() local
57 dist[sm / 4] |= ((gpc << 4) | tpc) << ((sm % 4) * 8); in gm200_grctx_generate_smid_config()
58 gpcs[gpc] |= sm << (tpc * 8); in gm200_grctx_generate_smid_config()
87 int gpc, ppc, i; in gm200_grctx_generate_dist_skip_table() local
89 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gm200_grctx_generate_dist_skip_table()
91 u8 ppc_tpcs = gr->ppc_tpc_nr[gpc][ppc]; in gm200_grctx_generate_dist_skip_table()
92 u8 ppc_tpcm = gr->ppc_tpc_mask[gpc][ppc]; in gm200_grctx_generate_dist_skip_table()
95 ppc_tpcm ^= gr->ppc_tpc_mask[gpc][ppc]; in gm200_grctx_generate_dist_skip_table()
96 ((u8 *)data)[gpc] |= ppc_tpcm; in gm200_grctx_generate_dist_skip_table()
Dctxgv100.c73 int gpc, ppc, n = 0; in gv100_grctx_generate_attrib() local
79 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gv100_grctx_generate_attrib()
81 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gv100_grctx_generate_attrib()
85 const u32 o = PPC_UNIT(gpc, ppc, 0); in gv100_grctx_generate_attrib()
87 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gv100_grctx_generate_attrib()
96 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gv100_grctx_generate_attrib()
160 gv100_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm) in gv100_grctx_generate_sm_id() argument
164 tpc = gv100_gr_nonpes_aware_tpc(gr, gpc, tpc); in gv100_grctx_generate_sm_id()
166 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x608), sm); in gv100_grctx_generate_sm_id()
167 nvkm_wr32(device, GPC_UNIT(gpc, 0x0c10 + tpc * 4), sm); in gv100_grctx_generate_sm_id()
[all …]
Dtu102.c43 int tpc = gv100_gr_nonpes_aware_tpc(gr, gr->sm[sm].gpc, gr->sm[sm].tpc); in tu102_gr_init_fs()
45 nvkm_wr32(device, GPC_UNIT(gr->sm[sm].gpc, 0x0c10 + tpc * 4), sm); in tu102_gr_init_fs()
58 u8 bank[GPC_MAX] = {}, gpc, i, j; in tu102_gr_init_zcull() local
69 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in tu102_gr_init_zcull()
70 nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), in tu102_gr_init_zcull()
71 gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); in tu102_gr_init_zcull()
72 nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | in tu102_gr_init_zcull()
74 nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918); in tu102_gr_init_zcull()
Dgf117.c131 u8 bank[GPC_MAX] = {}, gpc, i, j; in gf117_gr_init_zcull() local
142 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gf117_gr_init_zcull()
143 nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), in gf117_gr_init_zcull()
144 gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); in gf117_gr_init_zcull()
145 nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | in gf117_gr_init_zcull()
147 nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918); in gf117_gr_init_zcull()
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/gr/
Dgv100.c28 gv100_gr_trap_sm(struct gf100_gr *gr, int gpc, int tpc, int sm) in gv100_gr_trap_sm() argument
32 u32 werr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x730 + (sm * 0x80))); in gv100_gr_trap_sm()
33 u32 gerr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x734 + (sm * 0x80))); in gv100_gr_trap_sm()
40 nvkm_error(subdev, "GPC%i/TPC%i/SM%d trap: " in gv100_gr_trap_sm()
42 gpc, tpc, sm, gerr, glob, werr, warp ? warp->name : ""); in gv100_gr_trap_sm()
44 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x730 + sm * 0x80), 0x00000000); in gv100_gr_trap_sm()
45 nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x734 + sm * 0x80), gerr); in gv100_gr_trap_sm()
49 gv100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc) in gv100_gr_trap_mp() argument
51 gv100_gr_trap_sm(gr, gpc, tpc, 0); in gv100_gr_trap_mp()
52 gv100_gr_trap_sm(gr, gpc, tpc, 1); in gv100_gr_trap_mp()
[all …]
Dctxgp100.c56 int gpc, ppc, b, n = 0; in gp100_grctx_generate_attrib() local
58 for (gpc = 0; gpc < gr->gpc_nr; gpc++) in gp100_grctx_generate_attrib()
59 size += grctx->attrib_nr_max * gr->ppc_nr[gpc] * gr->ppc_tpc_max; in gp100_grctx_generate_attrib()
72 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gp100_grctx_generate_attrib()
73 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) { in gp100_grctx_generate_attrib()
74 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gp100_grctx_generate_attrib()
77 const u32 o = PPC_UNIT(gpc, ppc, 0); in gp100_grctx_generate_attrib()
78 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gp100_grctx_generate_attrib()
86 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gp100_grctx_generate_attrib()
104 const u8 gpc = gr->sm[sm].gpc; in gp100_grctx_generate_smid_config() local
[all …]
Dctxgp102.c52 int gpc, ppc, b, n = 0; in gp102_grctx_generate_attrib() local
54 for (gpc = 0; gpc < gr->gpc_nr; gpc++) in gp102_grctx_generate_attrib()
55 size += grctx->gfxp_nr * gr->ppc_nr[gpc] * gr->ppc_tpc_max; in gp102_grctx_generate_attrib()
68 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gp102_grctx_generate_attrib()
69 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) { in gp102_grctx_generate_attrib()
70 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gp102_grctx_generate_attrib()
74 const u32 o = PPC_UNIT(gpc, ppc, 0); in gp102_grctx_generate_attrib()
75 const u32 p = GPC_UNIT(gpc, 0xc44 + (ppc * 4)); in gp102_grctx_generate_attrib()
76 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gp102_grctx_generate_attrib()
85 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gp102_grctx_generate_attrib()
Dctxgm200.c55 const u8 gpc = gr->sm[sm].gpc; in gm200_grctx_generate_smid_config() local
57 dist[sm / 4] |= ((gpc << 4) | tpc) << ((sm % 4) * 8); in gm200_grctx_generate_smid_config()
58 gpcs[gpc] |= sm << (tpc * 8); in gm200_grctx_generate_smid_config()
87 int gpc, ppc, i; in gm200_grctx_generate_dist_skip_table() local
89 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gm200_grctx_generate_dist_skip_table()
90 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++) { in gm200_grctx_generate_dist_skip_table()
91 u8 ppc_tpcs = gr->ppc_tpc_nr[gpc][ppc]; in gm200_grctx_generate_dist_skip_table()
92 u8 ppc_tpcm = gr->ppc_tpc_mask[gpc][ppc]; in gm200_grctx_generate_dist_skip_table()
95 ppc_tpcm ^= gr->ppc_tpc_mask[gpc][ppc]; in gm200_grctx_generate_dist_skip_table()
96 ((u8 *)data)[gpc] |= ppc_tpcm; in gm200_grctx_generate_dist_skip_table()
Dgf100.c1174 gf100_gr_trap_gpc_rop(struct gf100_gr *gr, int gpc) in gf100_gr_trap_gpc_rop() argument
1181 trap[0] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0420)) & 0x3fffffff; in gf100_gr_trap_gpc_rop()
1182 trap[1] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0434)); in gf100_gr_trap_gpc_rop()
1183 trap[2] = nvkm_rd32(device, GPC_UNIT(gpc, 0x0438)); in gf100_gr_trap_gpc_rop()
1184 trap[3] = nvkm_rd32(device, GPC_UNIT(gpc, 0x043c)); in gf100_gr_trap_gpc_rop()
1188 nvkm_error(subdev, "GPC%d/PROP trap: %08x [%s] x = %u, y = %u, " in gf100_gr_trap_gpc_rop()
1190 gpc, trap[0], error, trap[1] & 0xffff, trap[1] >> 16, in gf100_gr_trap_gpc_rop()
1192 nvkm_wr32(device, GPC_UNIT(gpc, 0x0420), 0xc0000000); in gf100_gr_trap_gpc_rop()
1235 gf100_gr_trap_mp(struct gf100_gr *gr, int gpc, int tpc) in gf100_gr_trap_mp() argument
1239 u32 werr = nvkm_rd32(device, TPC_UNIT(gpc, tpc, 0x648)); in gf100_gr_trap_mp()
[all …]
Dctxgv100.c73 int gpc, ppc, b, n = 0; in gv100_grctx_generate_attrib() local
75 for (gpc = 0; gpc < gr->gpc_nr; gpc++) in gv100_grctx_generate_attrib()
76 size += grctx->gfxp_nr * gr->ppc_nr[gpc] * gr->ppc_tpc_max; in gv100_grctx_generate_attrib()
88 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in gv100_grctx_generate_attrib()
89 for (ppc = 0; ppc < gr->ppc_nr[gpc]; ppc++, n++) { in gv100_grctx_generate_attrib()
90 const u32 as = alpha * gr->ppc_tpc_nr[gpc][ppc]; in gv100_grctx_generate_attrib()
94 const u32 o = PPC_UNIT(gpc, ppc, 0); in gv100_grctx_generate_attrib()
95 if (!(gr->ppc_mask[gpc] & (1 << ppc))) in gv100_grctx_generate_attrib()
103 ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc]; in gv100_grctx_generate_attrib()
157 gv100_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm) in gv100_grctx_generate_sm_id() argument
[all …]
Dtu102.c43 nvkm_wr32(device, GPC_UNIT(gr->sm[sm].gpc, 0x0c10 + in tu102_gr_init_fs()
57 u8 bank[GPC_MAX] = {}, gpc, i, j; in tu102_gr_init_zcull() local
68 for (gpc = 0; gpc < gr->gpc_nr; gpc++) { in tu102_gr_init_zcull()
69 nvkm_wr32(device, GPC_UNIT(gpc, 0x0914), in tu102_gr_init_zcull()
70 gr->screen_tile_row_offset << 8 | gr->tpc_nr[gpc]); in tu102_gr_init_zcull()
71 nvkm_wr32(device, GPC_UNIT(gpc, 0x0910), 0x00040000 | in tu102_gr_init_zcull()
73 nvkm_wr32(device, GPC_UNIT(gpc, 0x0918), magicgpc918); in tu102_gr_init_zcull()
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/
Dfsl,imx-gpcv2.yaml13 The i.MX7S/D General Power Control (GPC) block contains Power Gating
16 Power domains contained within GPC node are generic power domain
27 - fsl,imx7d-gpc
28 - fsl,imx8mn-gpc
29 - fsl,imx8mq-gpc
30 - fsl,imx8mm-gpc
31 - fsl,imx8mp-gpc
68 include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and
69 include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc
70 include/dt-bindings/power/imx8mm-power.h for fsl,imx8mm-gpc
[all …]
Dfsl,imx-gpc.yaml4 $id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
13 The i.MX6 General Power Control (GPC) block contains DVFS load tracking
18 described as subnodes of the power gating controller 'pgc' node of the GPC.
28 - fsl,imx6q-gpc
31 - fsl,imx6qp-gpc
32 - fsl,imx6sl-gpc
33 - fsl,imx6sx-gpc
34 - fsl,imx6ul-gpc
35 - const: fsl,imx6q-gpc
119 gpc@20dc000 {
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/power/
Dfsl,imx-gpc.yaml4 $id: http://devicetree.org/schemas/power/fsl,imx-gpc.yaml#
13 The i.MX6 General Power Control (GPC) block contains DVFS load tracking
18 described as subnodes of the power gating controller 'pgc' node of the GPC.
27 - fsl,imx6q-gpc
28 - fsl,imx6qp-gpc
29 - fsl,imx6sl-gpc
30 - fsl,imx6sx-gpc
96 gpc@20dc000 {
97 compatible = "fsl,imx6q-gpc";
Dfsl,imx-gpcv2.yaml13 The i.MX7S/D General Power Control (GPC) block contains Power Gating
16 Power domains contained within GPC node are generic power domain
27 - fsl,imx7d-gpc
28 - fsl,imx8mq-gpc
55 include/dt-bindings/power/imx7-power.h for fsl,imx7d-gpc and
56 include/dt-bindings/power/imx8m-power.h for fsl,imx8mq-gpc
85 gpc@303a0000 {
86 compatible = "fsl,imx7d-gpc";
/kernel/linux/linux-5.10/arch/mips/boot/dts/ingenic/
Dqi_lb60.dts114 col-gpios = <&gpc 10 0>, <&gpc 11 0>, <&gpc 12 0>, <&gpc 13 0>,
115 <&gpc 14 0>, <&gpc 15 0>, <&gpc 16 0>, <&gpc 17 0>;
186 sck-gpios = <&gpc 23 GPIO_ACTIVE_HIGH>;
187 mosi-gpios = <&gpc 22 GPIO_ACTIVE_HIGH>;
188 cs-gpios = <&gpc 21 GPIO_ACTIVE_LOW>;
196 status-gpios = <&gpc 27 GPIO_ACTIVE_LOW>;
268 rb-gpios = <&gpc 30 GPIO_ACTIVE_HIGH>;
Drs90.dts49 gpios = <&gpc 10 GPIO_ACTIVE_LOW>;
55 gpios = <&gpc 11 GPIO_ACTIVE_LOW>;
73 gpios = <&gpc 31 GPIO_ACTIVE_LOW>;
79 gpios = <&gpc 30 GPIO_ACTIVE_LOW>;
85 gpios = <&gpc 12 GPIO_ACTIVE_LOW>;
118 enable-gpios = <&gpc 15 GPIO_ACTIVE_HIGH>;
226 cd-gpios = <&gpc 20 GPIO_ACTIVE_LOW>;
256 rb-gpios = <&gpc 27 GPIO_ACTIVE_HIGH>;
/kernel/linux/linux-6.6/arch/mips/boot/dts/ingenic/
Dqi_lb60.dts114 col-gpios = <&gpc 10 0>, <&gpc 11 0>, <&gpc 12 0>, <&gpc 13 0>,
115 <&gpc 14 0>, <&gpc 15 0>, <&gpc 16 0>, <&gpc 17 0>;
186 sck-gpios = <&gpc 23 GPIO_ACTIVE_HIGH>;
187 mosi-gpios = <&gpc 22 GPIO_ACTIVE_HIGH>;
188 cs-gpios = <&gpc 21 GPIO_ACTIVE_LOW>;
196 status-gpios = <&gpc 27 GPIO_ACTIVE_LOW>;
268 rb-gpios = <&gpc 30 GPIO_ACTIVE_HIGH>;
Drs90.dts59 gpios = <&gpc 10 GPIO_ACTIVE_LOW>;
65 gpios = <&gpc 11 GPIO_ACTIVE_LOW>;
83 gpios = <&gpc 31 GPIO_ACTIVE_LOW>;
89 gpios = <&gpc 30 GPIO_ACTIVE_LOW>;
95 gpios = <&gpc 12 GPIO_ACTIVE_LOW>;
128 enable-gpios = <&gpc 15 GPIO_ACTIVE_HIGH>;
236 cd-gpios = <&gpc 20 GPIO_ACTIVE_LOW>;
266 rb-gpios = <&gpc 27 GPIO_ACTIVE_HIGH>;
/kernel/linux/linux-6.6/arch/x86/kvm/
Dxen.c39 struct gfn_to_pfn_cache *gpc = &kvm->arch.xen.shinfo_cache; in kvm_xen_shared_info_init() local
49 kvm_gpc_deactivate(gpc); in kvm_xen_shared_info_init()
54 ret = kvm_gpc_activate(gpc, gpa, PAGE_SIZE); in kvm_xen_shared_info_init()
65 read_lock_irq(&gpc->lock); in kvm_xen_shared_info_init()
67 if (gpc->valid) in kvm_xen_shared_info_init()
70 read_unlock_irq(&gpc->lock); in kvm_xen_shared_info_init()
84 struct shared_info *shinfo = gpc->khva; in kvm_xen_shared_info_init()
91 struct compat_shared_info *shinfo = gpc->khva; in kvm_xen_shared_info_init()
107 read_unlock_irq(&gpc->lock); in kvm_xen_shared_info_init()
275 * Attempt to obtain the GPC lock on *both* (if there are two) in kvm_xen_update_runstate_guest()
[all …]

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