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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/
Dnvidia,tegra124-xusb-padctl.txt11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
14 contains a software-configurable mux that sits between the I/O controller
17 In addition to per-lane configuration, USB 3.0 ports may require additional
18 settings on a per-board basis.
20 Pads will be represented as children of the top-level XUSB pad controller
23 PHY bindings, as described by the phy-bindings.txt file in this directory.
34 --------------------
35 - compatible: Must be:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Domap-usb-host.txt5 - compatible: should be "ti,usbhs-host"
6 - reg: should contain one register range i.e. start and length
7 - ti,hwmods: must contain "usb_host_hs"
11 - num-ports: number of USB ports. Usually this is automatically detected
15 - portN-mode: String specifying the port mode for port N, where N can be
16 from 1 to 3. If the port mode is not specified, that port is treated
18 "ehci-phy",
19 "ehci-tll",
20 "ehci-hsic",
21 "ohci-phy-6pin-datse0",
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Domap-usb-host.txt5 - compatible: should be "ti,usbhs-host"
6 - reg: should contain one register range i.e. start and length
7 - ti,hwmods: must contain "usb_host_hs"
11 - num-ports: number of USB ports. Usually this is automatically detected
15 - portN-mode: String specifying the port mode for port N, where N can be
16 from 1 to 3. If the port mode is not specified, that port is treated
18 "ehci-phy",
19 "ehci-tll",
20 "ehci-hsic",
21 "ohci-phy-6pin-datse0",
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/
Dnvidia,tegra186-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
Dnvidia,tegra124-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
Dnvidia,tegra210-xusb-padctl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22 super-speed USB. Other lanes are for various types of low-speed, full-speed
23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24 contains a software-configurable mux that sits between the I/O controller
[all …]
/kernel/linux/linux-6.6/drivers/phy/tegra/
Dxusb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate()
53 .compatible = "nvidia,tegra124-xusb-padctl",
[all …]
Dxusb-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2020, NVIDIA CORPORATION. All rights reserved.
27 ((x) ? (11 + ((x) - 1) * 6) : 0)
451 for (map = tegra210_usb3_map; map->type; map++) { in tegra210_usb3_lane_map()
452 if (map->index == lane->index && in tegra210_usb3_lane_map()
453 strcmp(map->type, lane->pad->soc->name) == 0) { in tegra210_usb3_lane_map()
454 dev_dbg(lane->pad->padctl->dev, "lane = %s map to port = usb3-%d\n", in tegra210_usb3_lane_map()
455 lane->pad->soc->lanes[lane->index].name, map->port); in tegra210_usb3_lane_map()
456 return map->port; in tegra210_usb3_lane_map()
460 return -EINVAL; in tegra210_usb3_lane_map()
[all …]
/kernel/linux/linux-5.10/drivers/phy/tegra/
Dxusb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
31 if (args->args_count != 0) in tegra_xusb_pad_of_xlate()
32 return ERR_PTR(-EINVAL); in tegra_xusb_pad_of_xlate()
34 for (i = 0; i < pad->soc->num_lanes; i++) { in tegra_xusb_pad_of_xlate()
35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
45 phy = ERR_PTR(-ENODEV); in tegra_xusb_pad_of_xlate()
53 .compatible = "nvidia,tegra124-xusb-padctl",
[all …]
Dxusb-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
25 ((x) ? (11 + ((x) - 1) * 6) : 0)
259 /* must be called under padctl->lock */
262 struct tegra_xusb_pcie_pad *pcie = to_pcie_pad(padctl->pcie); in tegra210_pex_uphy_enable()
267 if (pcie->enable > 0) { in tegra210_pex_uphy_enable()
268 pcie->enable++; in tegra210_pex_uphy_enable()
272 err = clk_prepare_enable(pcie->pll); in tegra210_pex_uphy_enable()
276 err = reset_control_deassert(pcie->rst); in tegra210_pex_uphy_enable()
355 err = -ETIMEDOUT; in tegra210_pex_uphy_enable()
374 err = -ETIMEDOUT; in tegra210_pex_uphy_enable()
[all …]
/kernel/linux/linux-5.10/drivers/phy/samsung/
Dphy-exynos5250-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 5250 support
13 #include "phy-samsung-usb2.h"
124 /* Mode swtich register */
169 return -EINVAL; in exynos5250_rate_to_clk()
177 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos5250_isol()
181 switch (inst->cfg->id) { in exynos5250_isol()
194 regmap_update_bits(drv->reg_pmu, offset, mask, on ? 0 : mask); in exynos5250_isol()
199 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos5250_power_on()
204 u32 hsic; in exynos5250_power_on() local
[all …]
/kernel/linux/linux-6.6/drivers/phy/samsung/
Dphy-exynos5250-usb2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Samsung SoC USB 1.1/2.0 PHY driver - Exynos 5250 support
13 #include "phy-samsung-usb2.h"
124 /* Mode swtich register */
168 return -EINVAL; in exynos5250_rate_to_clk()
176 struct samsung_usb2_phy_driver *drv = inst->drv; in exynos5250_isol()
180 if (drv->cfg == &exynos5250_usb2_phy_config && in exynos5250_isol()
181 inst->cfg->id == EXYNOS5250_DEVICE) in exynos5250_isol()
183 else if (drv->cfg == &exynos5250_usb2_phy_config && in exynos5250_isol()
184 inst->cfg->id == EXYNOS5250_HOST) in exynos5250_isol()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/
Dci-hdrc-usb2.txt4 - compatible: should be one of:
5 "fsl,imx23-usb"
6 "fsl,imx27-usb"
7 "fsl,imx28-usb"
8 "fsl,imx6q-usb"
9 "fsl,imx6sl-usb"
10 "fsl,imx6sx-usb"
11 "fsl,imx6ul-usb"
12 "fsl,imx7d-usb"
13 "fsl,imx7ulp-usb"
[all …]
/kernel/linux/linux-6.6/drivers/phy/qualcomm/
Dphy-qcom-usb-hsic.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/pinctrl/pinctrl-state.h>
29 struct ulpi *ulpi = uphy->ulpi; in qcom_usb_hsic_phy_power_on()
33 ret = clk_prepare_enable(uphy->phy_clk); in qcom_usb_hsic_phy_power_on()
37 ret = clk_prepare_enable(uphy->cal_clk); in qcom_usb_hsic_phy_power_on()
41 ret = clk_prepare_enable(uphy->cal_sleep_clk); in qcom_usb_hsic_phy_power_on()
55 /* Configure pins for HSIC functionality */ in qcom_usb_hsic_phy_power_on()
56 pins_default = pinctrl_lookup_state(uphy->pctl, PINCTRL_STATE_DEFAULT); in qcom_usb_hsic_phy_power_on()
62 ret = pinctrl_select_state(uphy->pctl, pins_default); in qcom_usb_hsic_phy_power_on()
66 /* Enable HSIC mode in HSIC_CFG register */ in qcom_usb_hsic_phy_power_on()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
36 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
111 PHY transceivers working only in USB3 mode on Qualcomm chips. This
124 controllers on Qualcomm chips. This driver supports the high-speed
133 Enable support for the USB high-speed SNPS eUSB2 phy on Qualcomm
142 Enable support for the USB high-speed SNPS eUSB2 repeater on Qualcomm
155 host only mode configurations.
160 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
163 Support for the USB high-speed ULPI compliant phy on Qualcomm
171 Enable support for the USB high-speed SNPS Femto phy on Qualcomm
[all …]
/kernel/linux/linux-5.10/drivers/phy/qualcomm/
Dphy-qcom-usb-hsic.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/pinctrl/pinctrl-state.h>
29 struct ulpi *ulpi = uphy->ulpi; in qcom_usb_hsic_phy_power_on()
33 ret = clk_prepare_enable(uphy->phy_clk); in qcom_usb_hsic_phy_power_on()
37 ret = clk_prepare_enable(uphy->cal_clk); in qcom_usb_hsic_phy_power_on()
41 ret = clk_prepare_enable(uphy->cal_sleep_clk); in qcom_usb_hsic_phy_power_on()
55 /* Configure pins for HSIC functionality */ in qcom_usb_hsic_phy_power_on()
56 pins_default = pinctrl_lookup_state(uphy->pctl, PINCTRL_STATE_DEFAULT); in qcom_usb_hsic_phy_power_on()
62 ret = pinctrl_select_state(uphy->pctl, pins_default); in qcom_usb_hsic_phy_power_on()
66 /* Enable HSIC mode in HSIC_CFG register */ in qcom_usb_hsic_phy_power_on()
[all …]
/kernel/linux/linux-6.6/drivers/usb/misc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
13 Technologies USS-720 chip. These cables are plugged into your USB
17 The chip has two modes: automatic mode and manual mode. In automatic
18 mode, it looks to the computer like a standard USB printer. Only
19 printers may be connected to the USS-720 in this mode. The generic
21 that mode, and you can say N here if you want to use the chip only
22 in this mode.
24 Manual mode is not limited to printers, any parallel port
25 device should work. This driver utilizes manual mode.
30 Say Y here if you own an USS-720 USB->Parport cable and intend to
[all …]
/kernel/linux/linux-6.6/drivers/usb/chipidea/
Dci_hdrc_imx.h1 /* SPDX-License-Identifier: GPL-2.0+ */
15 /* true if over-current polarity is active low */
24 unsigned int hsic:1; /* HSIC controller */ member
28 enum usb_dr_mode available_role; /* runtime usb dr mode */
Dusbmisc_imx.c1 // SPDX-License-Identifier: GPL-2.0+
81 /* HSIC enable */
83 /* Force HSIC module 480M clock on, even when in Host is in suspend mode */
87 /* For imx6dql, it is host-only controller, for later imx6, it is otg's */
105 /* The default DM/DP value is pull-down */
170 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); in usbmisc_imx25_init()
174 if (data->index > 1) in usbmisc_imx25_init()
175 return -EINVAL; in usbmisc_imx25_init()
177 spin_lock_irqsave(&usbmisc->lock, flags); in usbmisc_imx25_init()
178 switch (data->index) { in usbmisc_imx25_init()
[all …]
/kernel/linux/linux-5.10/drivers/usb/chipidea/
Dci_hdrc_imx.h1 /* SPDX-License-Identifier: GPL-2.0+ */
15 /* true if over-current polarity is active low */
24 unsigned int hsic:1; /* HSIC controlller */ member
28 enum usb_dr_mode available_role; /* runtime usb dr mode */
Dusbmisc_imx.c1 // SPDX-License-Identifier: GPL-2.0+
80 /* HSIC enable */
82 /* Force HSIC module 480M clock on, even when in Host is in suspend mode */
86 /* For imx6dql, it is host-only controller, for later imx6, it is otg's */
104 /* The default DM/DP value is pull-down */
165 struct imx_usbmisc *usbmisc = dev_get_drvdata(data->dev); in usbmisc_imx25_init()
169 if (data->index > 1) in usbmisc_imx25_init()
170 return -EINVAL; in usbmisc_imx25_init()
172 spin_lock_irqsave(&usbmisc->lock, flags); in usbmisc_imx25_init()
173 switch (data->index) { in usbmisc_imx25_init()
[all …]
Dhost.c1 // SPDX-License-Identifier: GPL-2.0
3 * host.c - ChipIdea USB host controller driver
35 struct ehci_ci_priv *priv = (struct ehci_ci_priv *)ehci->priv; in ehci_ci_portpower()
36 struct device *dev = hcd->self.controller; in ehci_ci_portpower()
39 int port = HCS_N_PORTS(ehci->hcs_params); in ehci_ci_portpower()
41 if (priv->reg_vbus && enable != priv->enabled) { in ehci_ci_portpower()
44 "Not support multi-port regulator control\n"); in ehci_ci_portpower()
48 ret = regulator_enable(priv->reg_vbus); in ehci_ci_portpower()
50 ret = regulator_disable(priv->reg_vbus); in ehci_ci_portpower()
57 priv->enabled = enable; in ehci_ci_portpower()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dci-hdrc-usb2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/ci-hdrc-usb2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xu Yang <xu.yang_2@nxp.com>
11 - Peng Fan <peng.fan@nxp.com>
16 - enum:
17 - chipidea,usb2
18 - lsi,zevio-usb
19 - nvidia,tegra20-ehci
[all …]
/kernel/linux/linux-5.10/drivers/usb/misc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
43 tristate "USB 7-Segment LED Display"
45 Say Y here if you have a USB 7-Segment Display by Delcom
78 driver supports the pre-programmed devices (incl. firmware)
79 by AK Modul-Bus Computer GmbH.
81 Please see: https://www.ak-modul-bus.de/stat/mikrocontroller.html
121 adapter you will need this "ftdi-elan" module as well as the "u132-hcd"
190 See <http://www.linux-usb.org/usbtest/> for more information,
197 used for the USB-IF Embedded Host High-Speed Electrical Test procedure.
200 VID/PID pairs. This driver then initiates a corresponding test mode on
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dqcom,msm8974-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,msm8974-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 Top Level Mode Multiplexer pin controller in Qualcomm MSM8974 SoC.
18 const: qcom,msm8974-pinctrl
26 interrupt-controller: true
27 "#interrupt-cells": true
[all …]

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