Searched full:hexagon (Results 1 – 25 of 283) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,q6v5.txt | 1 Qualcomm Hexagon Peripheral Image Loader
4 on the Qualcomm Hexagon core.
57 Hexagon core.
122 booting of the Hexagon core
133 booting of the Hexagon core
141 booting of the Hexagon core
167 Definition: reference to the smem state for requesting the Hexagon to
191 The Hexagon node must contain iommus property as described in ../iommu/iommu.txt
195 The Hexagon node must contain two subnodes, named "mba" and "mpss" representing
196 the memory regions used by the Hexagon firmware. Each sub-node must contain:
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| D | qcom,hexagon-v56.txt | 1 Qualcomm Technology Inc. Hexagon v56 Peripheral Image Loader
4 on the Qualcomm Technology Inc. Hexagon v56 core.
32 Definition: List of phandles and clock specifier pairs for the Hexagon,
60 Definition: reference to the list of resets for the Hexagon.
76 by the offset within syscon for Hexagon halt register.
86 Definition: reference to the smem state for requesting the Hexagon to
97 communication edge, channels and devices related to the Hexagon.
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| D | qcom,adsp.txt | 4 on the Qualcomm ADSP Hexagon core.
65 Hexagon Core.
71 held on behalf of the booting Hexagon core
82 booting Hexagon core
88 booting Hexagon core
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| /kernel/linux/linux-5.10/arch/hexagon/ |
| D | Makefile | 2 # Makefile for the Hexagon arch
36 head-y := arch/hexagon/kernel/head.o
38 core-y += arch/hexagon/kernel/ \
39 arch/hexagon/mm/ \
40 arch/hexagon/lib/
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| D | Kconfig | 2 # Hexagon configuration
3 comment "Linux Kernel Configuration for Hexagon"
5 config HEXAGON config
37 Qualcomm Hexagon is a processor architecture designed for high
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,q6v5.txt | 1 Qualcomm Hexagon Peripheral Image Loader
4 on the Qualcomm Hexagon core.
74 booting of the Hexagon core
79 Definition: reference to the smem state for requesting the Hexagon to
99 The Hexagon node may also have an subnode named either "smd-edge" or
101 related to the Hexagon. See ../soc/qcom/qcom,smd.yaml and
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| D | qcom,sc8180x-pas.yaml | 14 firmware on the Qualcomm DSP Hexagon cores.
42 description: Reference to the reserved-memory for the Hexagon core
46 description: Firmware name for the Hexagon core
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| D | qcom,qcs404-pas.yaml | 14 firmware on the Qualcomm DSP Hexagon cores.
46 description: Reference to the reserved-memory for the Hexagon core
50 description: Firmware name for the Hexagon core
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| D | qcom,msm8916-mss-pil.yaml | 14 firmware on the Qualcomm MSM8916 Modem Hexagon Core (and similar).
100 description: States used by the AP to signal the Hexagon core
105 description: Names of the states used by the AP to signal the Hexagon core
146 - hexagon
289 label = "hexagon";
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| D | qcom,sdx55-pas.yaml | 14 on the Qualcomm DSP Hexagon cores.
50 description: Reference to the reserved-memory for the Hexagon core
60 description: Firmware name for the Hexagon core
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| D | qcom,sc8280xp-pas.yaml | 14 firmware on the Qualcomm DSP Hexagon cores.
42 description: Reference to the reserved-memory for the Hexagon core
46 description: Firmware name for the Hexagon core
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| /kernel/linux/linux-6.6/arch/hexagon/kernel/ |
| D | vmlinux.lds.S | 3 * Linker script for Hexagon kernel
14 OUTPUT_ARCH(hexagon)
66 .hexagon.attributes 0 : { *(.hexagon.attributes) }
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| D | asm-offsets.c | 31 COMMENT("Hexagon pt_regs definitions"); in main()
63 COMMENT("Hexagon thread_info definitions"); in main()
70 COMMENT("Hexagon hexagon_switch_stack definitions"); in main()
83 COMMENT("Hexagon task_struct definitions"); in main()
87 COMMENT("Hexagon thread_struct definitions"); in main()
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| D | irq_cpu.c | 3 * First-level interrupt controller model for Hexagon.
46 .name = "HEXAGON",
54 * The hexagon core comes with a first-level interrupt controller
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| /kernel/linux/linux-5.10/arch/hexagon/kernel/ |
| D | asm-offsets.c | 31 COMMENT("Hexagon pt_regs definitions"); in main()
63 COMMENT("Hexagon thread_info definitions"); in main()
70 COMMENT("Hexagon hexagon_switch_stack definitions"); in main()
83 COMMENT("Hexagon task_struct definitions"); in main()
87 COMMENT("Hexagon thread_struct definitions"); in main()
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| D | irq_cpu.c | 3 * First-level interrupt controller model for Hexagon.
46 .name = "HEXAGON",
54 * The hexagon core comes with a first-level interrupt controller
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| /kernel/linux/linux-6.6/arch/hexagon/ |
| D | Kconfig | 2 # Hexagon configuration
3 comment "Linux Kernel Configuration for Hexagon"
5 config HEXAGON config
38 Qualcomm Hexagon is a processor architecture designed for high
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| /kernel/linux/linux-5.10/arch/hexagon/mm/ |
| D | vm_tlb.c | 3 * Hexagon Virtual Machine TLB functions
9 * The Hexagon Virtual Machine conceals the real workings of
23 * but Hexagon thread-based virtual processors share the same MMU.
44 * A single Hexagon core has 6 thread contexts but
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| /kernel/linux/linux-6.6/arch/hexagon/mm/ |
| D | vm_tlb.c | 3 * Hexagon Virtual Machine TLB functions
9 * The Hexagon Virtual Machine conceals the real workings of
23 * but Hexagon thread-based virtual processors share the same MMU.
44 * A single Hexagon core has 6 thread contexts but
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| /kernel/linux/linux-5.10/drivers/remoteproc/ |
| D | Kconfig | 156 tristate "Qualcomm Hexagon V5 self-authenticating modem subsystem support"
170 subsystem based on Hexagon V5.
173 tristate "Qualcomm Hexagon v5 Peripheral Authentication Service support"
187 for the Qualcomm Hexagon v5 based remote processors. This is commonly
191 tristate "Qualcomm Hexagon based WCSS Peripheral Image Loader"
205 Hexagon V5 based WCSS remote processors.
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| /kernel/linux/linux-6.6/arch/hexagon/include/asm/ |
| D | pgtable.h | 3 * Page table support for the Hexagon architecture
12 * Page table definitions for Qualcomm Hexagon processor.
21 * The PTE model described here is that of the Hexagon Virtual Machine,
24 * the underlying Hexagon processor. A kernel built to run on the
58 * of global pages or ASIDs exposed to the Hexagon Virtual Machine,
68 * Top "FOURTH" level (pgd), which for the Hexagon VM is really
159 * For the Hexagon Virtual Machine MMU (or its emulation), a null/invalid
366 * 3 bits of offset. That trade-off can be revisited if necessary, but Hexagon
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| D | cacheflush.h | 3 * Cache flush operations for the Hexagon architecture
43 * in the cache to confuse things. The prototype Hexagon Virtual Machine
47 * arch/hexagon/mm/cache.c, but let's not wire it up until we know
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| /kernel/linux/linux-5.10/arch/hexagon/include/asm/ |
| D | pgtable.h | 3 * Page table support for the Hexagon architecture
12 * Page table definitions for Qualcomm Hexagon processor.
21 * The PTE model described here is that of the Hexagon Virtual Machine,
24 * the underlying Hexagon processor. A kernel built to run on the
58 * of global pages or ASIDs exposed to the Hexagon Virtual Machine,
65 * Top "FOURTH" level (pgd), which for the Hexagon VM is really
186 * For the Hexagon Virtual Machine MMU (or its emulation), a null/invalid
393 * 3 bits of offset. That trade-off can be revisited if necessary, but Hexagon
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| D | cacheflush.h | 3 * Cache flush operations for the Hexagon architecture
43 * in the cache to confuse things. The prototype Hexagon Virtual Machine
47 * arch/hexagon/mm/cache.c, but let's not wire it up until we know
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| /kernel/linux/linux-6.6/drivers/remoteproc/ |
| D | Kconfig | 196 tristate "Qualcomm Hexagon V5 self-authenticating modem subsystem support"
212 subsystem based on Hexagon V5. The TrustZone based system is
216 tristate "Qualcomm Hexagon v5 Peripheral Authentication Service support"
232 for the Qualcomm Hexagon v5 based remote processors. This is commonly
238 tristate "Qualcomm Hexagon based WCSS Peripheral Image Loader"
254 Hexagon V5 based WCSS remote processors on e.g. IPQ8074. This is
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