| /kernel/linux/linux-5.10/arch/ia64/kernel/ |
| D | time.c | 53 .name = "itc",
173 printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n", in timer_interrupt()
246 printk("Jitter checking for ITC timers disabled\n"); in nojitter_setup()
261 * frequency and then a PAL call to determine the frequency ratio between the ITC in ia64_init_itm()
296 printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, " in ia64_init_itm()
297 "ITC freq=%lu.%03luMHz", smp_processor_id(), in ia64_init_itm()
320 * The ITC synchronization is usually successful to within a few in ia64_init_itm()
321 * ITC ticks but this is not a sure thing. If you need to improve in ia64_init_itm()
324 * even going backward) if the ITC offsets between the individual CPUs in ia64_init_itm()
332 * ITC is drifty and we have not synchronized the ITCs in smpboot.c. in ia64_init_itm()
[all …]
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| D | smpboot.c | 14 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
92 * ITC synchronization related stuff:
208 * Return the number of cycles by which our itc differs from the itc on the master
209 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
242 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
245 * step). The basic idea is for the slave to ask the master what itc value it has and to
246 * read its own itc before and after the master responds. Each iteration gives us three
260 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
266 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
269 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
[all …]
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| D | irq_lsapic.c | 7 * (LSAPIC), such as the ITC and IPI interrupts.
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| D | palinfo.c | 693 struct pal_freq_ratio proc, itc, bus; in frequency_info() local
701 if (ia64_pal_freq_ratios(&proc, &bus, &itc) != 0) return 0; in frequency_info()
706 "ITC/Clock ratio : %d/%d\n", in frequency_info()
707 proc.num, proc.den, bus.num, bus.den, itc.num, itc.den); in frequency_info()
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| D | minstate.h | 9 /* read ar.itc in advance, and use it before leaving bank 0 */
11 (pUStk) mov.m r20=ar.itc;
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| /kernel/linux/linux-6.6/arch/ia64/kernel/ |
| D | time.c | 55 .name = "itc",
185 printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n", in timer_interrupt()
253 printk("Jitter checking for ITC timers disabled\n"); in nojitter_setup()
268 * frequency and then a PAL call to determine the frequency ratio between the ITC in ia64_init_itm()
303 printk(KERN_DEBUG "CPU %d: base freq=%lu.%03luMHz, ITC ratio=%u/%u, " in ia64_init_itm()
304 "ITC freq=%lu.%03luMHz", smp_processor_id(), in ia64_init_itm()
327 * The ITC synchronization is usually successful to within a few in ia64_init_itm()
328 * ITC ticks but this is not a sure thing. If you need to improve in ia64_init_itm()
331 * even going backward) if the ITC offsets between the individual CPUs in ia64_init_itm()
339 * ITC is drifty and we have not synchronized the ITCs in smpboot.c. in ia64_init_itm()
[all …]
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| D | smpboot.c | 14 * 01/04/27 David Mosberger <davidm@hpl.hp.com> Added ITC synching code.
93 * ITC synchronization related stuff:
209 * Return the number of cycles by which our itc differs from the itc on the master
210 * (time-keeper) CPU. A positive number indicates our itc is ahead of the master,
243 * Synchronize ar.itc of the current (slave) CPU with the ar.itc of the MASTER CPU
246 * step). The basic idea is for the slave to ask the master what itc value it has and to
247 * read its own itc before and after the master responds. Each iteration gives us three
261 * The goal is to adjust the slave's ar.itc such that tm falls exactly half-way between t0
267 * When the interconnect is quiet and symmetric, this lets us synchronize the itc to
270 * hundred cycles (e.g., ~500 cycles). In practice, this means that the itc's are usually
[all …]
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| D | sys_ia64.c | 180 * 'ar.itc' counter which gets incremented at a constant in ia64_clock_getres()
185 * based on ITC frequency and not HZ frequency for supported in ia64_clock_getres()
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| D | irq_lsapic.c | 7 * (LSAPIC), such as the ITC and IPI interrupts.
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| D | palinfo.c | 653 struct pal_freq_ratio proc, itc, bus; in frequency_info() local
661 if (ia64_pal_freq_ratios(&proc, &bus, &itc) != 0) return 0; in frequency_info()
666 "ITC/Clock ratio : %d/%d\n", in frequency_info()
667 proc.num, proc.den, bus.num, bus.den, itc.num, itc.den); in frequency_info()
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| D | minstate.h | 9 /* read ar.itc in advance, and use it before leaving bank 0 */
11 (pUStk) mov.m r20=ar.itc;
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| D | ivt.S | 207 * Tell the assemblers dependency-violation checker that the above "itc" instructions
214 * between reading the pagetable and the "itc". If so, flush the entry we
276 * Tell the assemblers dependency-violation checker that the above "itc" instructions
320 * Tell the assemblers dependency-violation checker that the above "itc" instructions
563 * Tell the assemblers dependency-violation checker that the above "itc" instructions
629 * Tell the assemblers dependency-violation checker that the above "itc" instructions
683 * Tell the assemblers dependency-violation checker that the above "itc" instructions
823 // mov.m r30=ar.itc is called in advance, and r13 is current
925 * - r30: ar.itc for accounting (don't touch)
1057 // mov.m r20=ar.itc is called in advance, and r13 is current
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| /kernel/linux/linux-6.6/arch/ia64/include/asm/native/ |
| D | inst.h | 39 (pred) mov reg = ar.itc
63 (pred) itc.i reg
66 (pred) itc.d reg
69 (pred_i) itc.i reg; \
70 (pred_d) itc.d reg
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| /kernel/linux/linux-5.10/arch/ia64/include/asm/native/ |
| D | inst.h | 39 (pred) mov reg = ar.itc
63 (pred) itc.i reg
66 (pred) itc.d reg
69 (pred_i) itc.i reg; \
70 (pred_d) itc.d reg
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| /kernel/linux/linux-6.6/arch/mips/kernel/ |
| D | mips-mt.c | 192 * Configure ITC mapping. This code is very in mips_mt_set_cpuoptions()
194 * a special mode bit ("ITC") in the ErrCtl in mips_mt_set_cpuoptions()
195 * register to enable access to ITC control in mips_mt_set_cpuoptions()
212 /* Set for 128 byte pitch of ITC cells */ in mips_mt_set_cpuoptions()
219 /* Now set base address, and turn ITC on with 0x1 bit */ in mips_mt_set_cpuoptions()
226 printk("Mapped %ld ITC cells starting at 0x%08x\n", in mips_mt_set_cpuoptions()
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| /kernel/linux/linux-5.10/arch/mips/kernel/ |
| D | mips-mt.c | 192 * Configure ITC mapping. This code is very in mips_mt_set_cpuoptions()
194 * a special mode bit ("ITC") in the ErrCtl in mips_mt_set_cpuoptions()
195 * register to enable access to ITC control in mips_mt_set_cpuoptions()
212 /* Set for 128 byte pitch of ITC cells */ in mips_mt_set_cpuoptions()
219 /* Now set base address, and turn ITC on with 0x1 bit */ in mips_mt_set_cpuoptions()
226 printk("Mapped %ld ITC cells starting at 0x%08x\n", in mips_mt_set_cpuoptions()
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| /kernel/linux/linux-5.10/tools/testing/selftests/drivers/net/mlxsw/ |
| D | sharedbuffer.sh | 64 local itc=$1; shift
70 | jq -e ".[][][\"itc\"][\"$itc\"][\"max\"]")
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| /kernel/linux/linux-6.6/tools/testing/selftests/drivers/net/mlxsw/ |
| D | sharedbuffer.sh | 78 local itc=$1; shift
84 | jq -e ".[][][\"itc\"][\"$itc\"][\"max\"]")
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/usb/ |
| D | ci-hdrc-usb2.txt | 42 - itc-setting: interrupt threshold control register control, the setting
43 should be aligned with ITC bits at register USBCMD.
123 itc-setting = <0x4>; /* 4 micro-frames */
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| /kernel/linux/linux-5.10/drivers/watchdog/ |
| D | mixcomwd.c | 6 * Author: Gergely Madarasz <gorgo@itc.hu>
8 * Copyright (c) 1999 ITConsult-Pro Co. <info@itc.hu>
310 MODULE_AUTHOR("Gergely Madarasz <gorgo@itc.hu>");
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| /kernel/linux/linux-6.6/drivers/watchdog/ |
| D | mixcomwd.c | 6 * Author: Gergely Madarasz <gorgo@itc.hu>
8 * Copyright (c) 1999 ITConsult-Pro Co. <info@itc.hu>
310 MODULE_AUTHOR("Gergely Madarasz <gorgo@itc.hu>");
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/ |
| D | ci-hdrc-usb2.yaml | 102 itc-setting:
105 aligned with ITC bits at register USBCMD.
423 itc-setting = <0x4>; /* 4 micro-frames */
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/include/ |
| D | set_mode_types.h | 74 uint8_t ITC:1; member
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/include/ |
| D | set_mode_types.h | 74 uint8_t ITC:1; member
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| /kernel/linux/linux-5.10/arch/ia64/include/uapi/asm/ |
| D | perfmon_default_smpl.h | 69 unsigned long tstamp; /* ar.itc when entering perfmon intr. handler */
|