Searched full:integers (Results 1 – 25 of 600) sorted by relevance
12345678910>>...24
| /kernel/linux/linux-5.10/include/uapi/linux/netfilter_bridge/ |
| D | ebt_among.h | 23 * MAC address is mapped onto an array of two 32-bit integers.
24 * This pair of integers is compared with MAC addresses in the
25 * hash table, which are stored also in form of pairs of integers
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| /kernel/linux/linux-6.6/include/uapi/linux/netfilter_bridge/ |
| D | ebt_among.h | 23 * MAC address is mapped onto an array of two 32-bit integers.
24 * This pair of integers is compared with MAC addresses in the
25 * hash table, which are stored also in form of pairs of integers
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| /kernel/linux/linux-6.6/lib/ |
| D | cmdline.c | 83 * get_options - Parse a string into a list of integers
89 * list of integers, a hyphen-separated range of _positive_ integers,
95 * returns the amount of parseable integers as described below.
99 * The first element is filled by the number of collected integers
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx6sx-pinctrl.txt | 8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| D | fsl,imx6sll-pinctrl.txt | 8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| D | fsl,imx6ul-pinctrl.txt | 9 - fsl,pins: each entry consists of 6 integers and represents the mux and config
10 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| D | fsl,imx7ulp-pinctrl.txt | 15 - fsl,pins: Each entry consists of 5 integers which represents the mux
16 and config setting for one pin. The first 4 integers
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| D | fsl,imx8mq-pinctrl.yaml | 34 each entry consists of 6 integers and represents the mux and config
35 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
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| D | fsl,imx8mp-pinctrl.yaml | 34 each entry consists of 6 integers and represents the mux and config
35 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
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| D | fsl,imx8mm-pinctrl.yaml | 34 each entry consists of 6 integers and represents the mux and config
35 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
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| D | fsl,imx8mn-pinctrl.yaml | 34 each entry consists of 6 integers and represents the mux and config
35 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | fsl,imx6sx-pinctrl.txt | 8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| D | fsl,imx6sll-pinctrl.txt | 8 - fsl,pins: each entry consists of 6 integers and represents the mux and config
9 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| D | fsl,imx6ul-pinctrl.txt | 9 - fsl,pins: each entry consists of 6 integers and represents the mux and config
10 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
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| D | fsl,imx7ulp-pinctrl.txt | 15 - fsl,pins: Each entry consists of 5 integers which represents the mux
16 and config setting for one pin. The first 4 integers
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| D | fsl,scu-pinctrl.yaml | 37 each entry consists of 3 integers and represents the pin ID, the mux value
38 and pad setting for the pin. The first 2 integers - pin_id and mux_val - are
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| D | fsl,imx8ulp-pinctrl.yaml | 34 each entry consists of 5 integers and represents the mux and config
35 setting for one pin. The first 4 integers <mux_config_reg input_reg
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| D | fsl,imxrt1050.yaml | 35 each entry consists of 6 integers and represents the mux and config
36 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
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| D | fsl,imx93-pinctrl.yaml | 37 each entry consists of 6 integers and represents the mux and config
38 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
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| D | fsl,imxrt1170.yaml | 35 each entry consists of 6 integers and represents the mux and config
36 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
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| D | fsl,imx8m-pinctrl.yaml | 38 each entry consists of 6 integers and represents the mux and config
39 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
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| /kernel/linux/linux-5.10/include/uapi/linux/ |
| D | netlink.h | 317 * integers (S64)
319 * integers (S64)
321 * integers (U64)
323 * integers (U64)
336 * @NL_POLICY_TYPE_ATTR_MASK: mask of valid bits for unsigned integers (U64)
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| /kernel/linux/linux-6.6/include/uapi/linux/ |
| D | netlink.h | 333 * integers (S64)
335 * integers (S64)
337 * integers (U64)
339 * integers (U64)
352 * @NL_POLICY_TYPE_ATTR_MASK: mask of valid bits for unsigned integers (U64)
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| /kernel/linux/linux-5.10/drivers/char/xilinx_hwicap/ |
| D | fifo_icap.h | 43 /* Reads integers from the device into the storage buffer. */
49 /* Writes integers to the device from the storage buffer. */
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/leds/ |
| D | leds-netxbig.txt | 9 - timers: Timer array. Each timer entry is represented by three integers:
16 - mode-val: Mode to value mapping. Each entry is represented by two integers:
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