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/kernel/linux/linux-6.6/drivers/media/pci/cx23885/
Daltera-ci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * altera-ci.c
5 * CI driver in conjunction with NetUp Dual DVB-T/C RF CI card
13 * GPIO-0 ~INT in
14 * GPIO-1 TMS out
15 * GPIO-2 ~reset chips out
16 * GPIO-3 to GPIO-10 data/addr for CA in/out
17 * GPIO-11 ~CS out
18 * GPIO-12 AD_RG out
19 * GPIO-13 ~WR out
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/cx23885/
Daltera-ci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * altera-ci.c
5 * CI driver in conjunction with NetUp Dual DVB-T/C RF CI card
13 * GPIO-0 ~INT in
14 * GPIO-1 TMS out
15 * GPIO-2 ~reset chips out
16 * GPIO-3 to GPIO-10 data/addr for CA in/out
17 * GPIO-11 ~CS out
18 * GPIO-12 AD_RG out
19 * GPIO-13 ~WR out
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Dsifive,clint.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Palmer Dabbelt <palmer@dabbelt.com>
11 - Anup Patel <anup.patel@wdc.com>
14 SiFive (and other RISC-V) SOCs include an implementation of the SiFive
15 Core Local Interruptor (CLINT) for M-mode timer and M-mode inter-processor
16 interrupts. It directly connects to the timer and inter-processor interrupt
17 lines of various HARTs (or CPUs) so RISC-V per-HART (or per-CPU) local
19 The clock frequency of CLINT is specified via "timebase-frequency" DT
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/nintendo/
Dwii.txt11 - model : Should be "nintendo,wii"
12 - compatible : Should be "nintendo,wii"
16 This node represents the multi-function "Hollywood" chip, which packages
21 - compatible : Should be "nintendo,hollywood"
30 - compatible : should be "nintendo,hollywood-vi","nintendo,flipper-vi"
31 - reg : should contain the VI registers location and length
32 - interrupts : should contain the VI interrupt
41 - compatible : should be "nintendo,hollywood-pi","nintendo,flipper-pi"
42 - reg : should contain the PI registers location and length
46 Represents the "Flipper" interrupt controller within the "Hollywood" chip.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/nintendo/
Dwii.txt11 - model : Should be "nintendo,wii"
12 - compatible : Should be "nintendo,wii"
16 This node represents the multi-function "Hollywood" chip, which packages
21 - compatible : Should be "nintendo,hollywood"
30 - compatible : should be "nintendo,hollywood-vi","nintendo,flipper-vi"
31 - reg : should contain the VI registers location and length
32 - interrupts : should contain the VI interrupt
41 - compatible : should be "nintendo,hollywood-pi","nintendo,flipper-pi"
42 - reg : should contain the PI registers location and length
46 Represents the "Flipper" interrupt controller within the "Hollywood" chip.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/
Dsifive,clint.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Palmer Dabbelt <palmer@dabbelt.com>
11 - Anup Patel <anup.patel@wdc.com>
14 SiFive (and other RISC-V) SOCs include an implementation of the SiFive
15 Core Local Interruptor (CLINT) for M-mode timer and M-mode inter-processor
16 interrupts. It directly connects to the timer and inter-processor interrupt
17 lines of various HARTs (or CPUs) so RISC-V per-HART (or per-CPU) local
19 The clock frequency of CLINT is specified via "timebase-frequency" DT
[all …]
/kernel/linux/linux-5.10/include/linux/usb/
Disp116x.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Board initialization code should put one of these into dev->platform_data
13 /* On-chip overcurrent detection */
25 /* Inter-io delay (ns). The chip is picky about access timings; it
Disp1362.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * board initialization code should put one of these into dev->platform_data
15 /* On-chip overcurrent protection */
25 /* chip can be resumed via H_WAKEUP pin */
37 /* Inter-io delay (ns). The chip is picky about access timings; it
/kernel/linux/linux-6.6/include/linux/usb/
Disp116x.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Board initialization code should put one of these into dev->platform_data
13 /* On-chip overcurrent detection */
25 /* Inter-io delay (ns). The chip is picky about access timings; it
Disp1362.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * board initialization code should put one of these into dev->platform_data
15 /* On-chip overcurrent protection */
25 /* chip can be resumed via H_WAKEUP pin */
37 /* Inter-io delay (ns). The chip is picky about access timings; it
/kernel/linux/linux-5.10/drivers/mailbox/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
51 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
77 This driver provides support for inter-processor communication
161 providing an interface for invoking the inter-process communication
174 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
177 An implementation of the APM X-Gene Interprocessor Communication
178 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
179 It is used to send short messages between ARM64-bit cores and
181 want to use the APM X-Gene SLIMpro IPCM support.
[all …]
/kernel/linux/linux-6.6/drivers/mailbox/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
6 on-chip processors through queued messages and interrupt driven
16 Apple SoCs have various co-processors required for certain
70 running on the Cortex-M3 rWTM secure processor of the Armada 37xx
96 This driver provides support for inter-processor communication
184 module will be called mailbox-mpfs.
193 providing an interface for invoking the inter-process communication
206 tristate "APM SoC X-Gene SLIMpro Mailbox Controller"
209 An implementation of the APM X-Gene Interprocessor Communication
210 Mailbox (IPCM) between the ARM 64-bit cores and SLIMpro controller.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/usb/
Dusb.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
22 phy-names:
26 usb-phy:
27 $ref: /schemas/types.yaml#/definitions/phandle-array
36 UTMI+ PHY with an 8- or 16-bit interface if UTMI+ is selected, UTMI+ low
38 serial is specified and High-Speed Inter-Chip feature if HSIC is
44 maximum-speed:
[all …]
/kernel/linux/linux-6.6/Documentation/translations/zh_CN/arch/loongarch/
Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. include:: ../../disclaimer-zh_CN.rst
5 :Original: Documentation/arch/loongarch/irq-chip-model.rst
15 HTVECINTC（Hyper-Transport Vector Interrupt Controller）、PCH-PIC（LS7A芯片组的主中
16 断控制器）、PCH-LPC（LS7A芯片组的LPC中断控制器）和PCH-MSI（MSI中断控制器）。
19 全局中断控制器（每个芯片一个，所有核共享），而PCH-PIC/PCH-LPC/PCH-MSI是CPU外部的中
26 在这种模型里面，IPI（Inter-Processor Interrupt）和CPU本地时钟中断直接发送到CPUINTC，
27 CPU串口（UARTs）中断发送到LIOINTC，而其他所有设备的中断则分别发送到所连接的PCH-PIC/
28 PCH-LPC/PCH-MSI，然后被HTVECINTC统一收集，再发送到LIOINTC，最后到达CPUINTC::
30 +-----+ +---------+ +-------+
[all …]
/kernel/linux/linux-6.6/Documentation/arch/loongarch/
Dirq-chip-model.rst1 .. SPDX-License-Identifier: GPL-2.0
4 IRQ chip model (hierarchy) of LoongArch
7 Currently, LoongArch based processors (e.g. Loongson-3A5000) can only work together
10 I/O Interrupt Controller), HTVECINTC (Hyper-Transport Vector Interrupt Controller),
11 PCH-PIC (Main Interrupt Controller in LS7A chipset), PCH-LPC (LPC Interrupt Controller
12 in LS7A chipset) and PCH-MSI (MSI Interrupt Controller).
14 CPUINTC is a per-core controller (in CPU), LIOINTC/EIOINTC/HTVECINTC are per-package
15 controllers (in CPU), while PCH-PIC/PCH-LPC/PCH-MSI are controllers out of CPU (i.e.,
22 In this model, IPI (Inter-Processor Interrupt) and CPU Local Timer interrupt go
24 interrupts go to PCH-PIC/PCH-LPC/PCH-MSI and gathered by HTVECINTC, and then go
[all …]
/kernel/linux/linux-6.6/Documentation/userspace-api/media/
Dglossary.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
51 **Field-programmable Gate Array**
56 See https://en.wikipedia.org/wiki/Field-programmable_gate_array.
65 together make a larger user-facing functional peripheral. For
73 **Inter-Integrated Circuit**
75 A multi-master, multi-slave, packet switched, single-ended,
77 like sub-device hardware components.
79 See http://www.nxp.com/docs/en/user-guide/UM10204.pdf.
87 Also known as chip.
113 - :term:`CEC API`;
[all …]
/kernel/linux/linux-5.10/Documentation/userspace-api/media/
Dglossary.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
51 **Field-programmable Gate Array**
56 See https://en.wikipedia.org/wiki/Field-programmable_gate_array.
65 together make a larger user-facing functional peripheral. For
73 **Inter-Integrated Circuit**
75 A multi-master, multi-slave, packet switched, single-ended,
77 like sub-device hardware components.
79 See http://www.nxp.com/docs/en/user-guide/UM10204.pdf.
87 Also known as chip.
113 - :term:`CEC API`;
[all …]
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-bus-usb10 This allows to avoid side-effects with drivers
28 drivers, non-authorized one are not. By default, wired
42 A devices's CDID, as 16 space-separated hex octets.
53 space-separated hex octets.
67 Contact: linux-usb@vger.kernel.org
101 What: /sys/bus/usb-serial/drivers/.../new_id
103 Contact: linux-usb@vger.kernel.org
106 extra bus folder "usb-serial" in sysfs; apart from that
131 If CONFIG_PM is set and a USB 2.0 lpm-capable device is plugged
147 If CONFIG_PM is set and a USB 3.0 lpm-capable device is plugged
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-shmobile/
Dpm-rcar-gen2.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Generation 2 Power management support
5 * Copyright (C) 2013 - 2015 Renesas Electronics Corporation
18 #include "rcar-gen2.h"
33 #define CA15RESCNT_CPUS 0xf /* CPU0-3 */
35 #define CA7RESCNT_CPUS 0xf /* CPU0-3 */
37 /* On-chip RAM */
38 #define ICRAM1 0xe63c0000 /* Inter Connect RAM1 (4 KiB) */
60 if (of_device_is_compatible(np, "arm,cortex-a15")) in rcar_gen2_pm_init()
62 else if (of_device_is_compatible(np, "arm,cortex-a7")) in rcar_gen2_pm_init()
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-shmobile/
Dpm-rcar-gen2.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car Generation 2 Power management support
5 * Copyright (C) 2013 - 2015 Renesas Electronics Corporation
18 #include "rcar-gen2.h"
33 #define CA15RESCNT_CPUS 0xf /* CPU0-3 */
35 #define CA7RESCNT_CPUS 0xf /* CPU0-3 */
37 /* On-chip RAM */
38 #define ICRAM1 0xe63c0000 /* Inter Connect RAM1 (4 KiB) */
60 if (of_device_is_compatible(np, "arm,cortex-a15")) in rcar_gen2_pm_init()
62 else if (of_device_is_compatible(np, "arm,cortex-a7")) in rcar_gen2_pm_init()
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/apple/
Dbmac.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * mace.h - definitions for the registers in the "Big Mac"
17 #define XIFC 0x000 /* low-level interface control */
19 # define XIFLoopback 0x0002 /* Loopback-mode XIF enable */
20 # define MIILoopback 0x0004 /* Loopback-mode MII enable */
41 #define CHIPID 0x170 /* chip ID */
48 #define STATUS 0x200 /* status--reading this clears it */
53 # define RxAlignCntExp 0x00000004 /* Align-error counter expired */
54 # define RxCRCCntExp 0x00000008 /* CRC-error counter expired */
55 # define RxLenCntExp 0x00000010 /* Length-error counter expired */
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/apple/
Dbmac.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * mace.h - definitions for the registers in the "Big Mac"
17 #define XIFC 0x000 /* low-level interface control */
19 # define XIFLoopback 0x0002 /* Loopback-mode XIF enable */
20 # define MIILoopback 0x0004 /* Loopback-mode MII enable */
41 #define CHIPID 0x170 /* chip ID */
48 #define STATUS 0x200 /* status--reading this clears it */
53 # define RxAlignCntExp 0x00000004 /* Align-error counter expired */
54 # define RxCRCCntExp 0x00000008 /* CRC-error counter expired */
55 # define RxLenCntExp 0x00000010 /* Length-error counter expired */
[all …]
/kernel/linux/linux-5.10/sound/soc/atmel/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Atmel System-on-Chip"
31 in PDC mode configured using audio-graph-card in device-tree.
40 in DMA mode configured using audio-graph-card in device-tree.
43 tristate "SoC Audio support for WM8731-based At91sam9g20 evaluation board"
49 Say Y if you want to add support for SoC audio on WM8731-based
63 tristate "SoC Audio support for WM8731-based at91sam9x5 board"
91 tristate "ASoC driver for the Axentia TSE-850"
98 Axentia TSE-850 with a PCM5142 codec.
110 tristate "Support for Mikroe-PROTO board"
[all …]
/kernel/linux/linux-5.10/arch/powerpc/platforms/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
35 bool "ePAPR para-virtualization support"
37 Enables ePAPR para-virtualization support for guests.
46 a hypervisor. This option is not user-selectable but should
62 bool "Device-tree based CPU feature discovery & setup"
98 chip, but it can potentially support other global timers
121 registers are used for inter-processor communication.
203 bool "On-chip CPU temperature sensor support"
206 G3 and G4 processors have an on-chip temperature sensor called the
207 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
[all …]
/kernel/linux/linux-6.6/arch/powerpc/platforms/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
37 bool "ePAPR para-virtualization support"
39 Enables ePAPR para-virtualization support for guests.
48 a hypervisor. This option is not user-selectable but should
65 bool "Device-tree based CPU feature discovery & setup"
101 chip, but it can potentially support other global timers
124 registers are used for inter-processor communication.
206 bool "On-chip CPU temperature sensor support"
209 G3 and G4 processors have an on-chip temperature sensor called the
210 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
[all …]

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