| /kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
| D | pm.c | 228 * The Tegra devices support suspending to LP1 or lower currently. in tegra_pm_validate_suspend_mode()
259 * Hooking the address of LP1 reset vector and SDRAM self-refresh code in
261 * copy these code to IRAM before LP0/LP1 suspend and restore the content
342 [TEGRA_SUSPEND_LP1] = "LP1",
418 "self-refresh -- LP0/LP1 unavailable\n", in tegra_init_suspend()
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| D | sleep-tegra20.S | 115 * Enters suspend in LP0 or LP1 by turning off the mmu and jumping to
155 * reset vector for LP1 restore; copied into IRAM during suspend.
242 * puts memory in self-refresh for LP0 and LP1
252 * In LP0 and LP1 all PLLs will be turned off. Switch the CPU and system clock
294 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
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| D | reset-handler.S | 27 * an LP2 transition. Also branched to by LP0 and LP1 resume after
126 * R8 = CPU in LP1 state mask
191 /* Waking up from LP1? */
199 bleq __die @ no LP1 startup handler
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| D | sleep-tegra30.S | 232 * Enters suspend in LP0 or LP1 by turning off the MMU and jumping to
246 * LP0 / LP1 use physical address, since the MMU needs to be
305 * reset vector for LP1 restore; copied into IRAM during suspend.
600 * puts memory in self-refresh for LP0 and LP1
610 * In LP0 and LP1 all PLLs will be turned off. Switching the CPU and System CLK
644 /* disable PLLM via PMC in LP1 */
689 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
837 * and COMP in the lowest power mode when LP1.
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| /kernel/linux/linux-6.6/arch/arm/mach-tegra/ |
| D | pm.c | 228 * The Tegra devices support suspending to LP1 or lower currently. in tegra_pm_validate_suspend_mode()
259 * Hooking the address of LP1 reset vector and SDRAM self-refresh code in
261 * copy these code to IRAM before LP0/LP1 suspend and restore the content
342 [TEGRA_SUSPEND_LP1] = "LP1",
418 "self-refresh -- LP0/LP1 unavailable\n", in tegra_pm_init_suspend()
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| D | sleep-tegra20.S | 140 * Enters suspend in LP0 or LP1 by turning off the mmu and jumping to
180 * reset vector for LP1 restore; copied into IRAM during suspend.
267 * puts memory in self-refresh for LP0 and LP1
277 * In LP0 and LP1 all PLLs will be turned off. Switch the CPU and system clock
323 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
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| D | reset-handler.S | 29 * an LP2 transition. Also branched to by LP0 and LP1 resume after
128 * R8 = CPU in LP1 state mask
193 /* Waking up from LP1? */
201 bleq __die @ no LP1 startup handler
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| D | sleep-tegra30.S | 281 * Enters suspend in LP0 or LP1 by turning off the MMU and jumping to
295 * LP0 / LP1 use physical address, since the MMU needs to be
354 * reset vector for LP1 restore; copied into IRAM during suspend.
648 * puts memory in self-refresh for LP0 and LP1
658 * In LP0 and LP1 all PLLs will be turned off. Switching the CPU and System CLK
700 /* disable PLLM via PMC in LP1 */
745 * executes from IRAM with SDRAM in selfrefresh when target state is LP0 or LP1
893 * and COMP in the lowest power mode when LP1.
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| /kernel/linux/linux-6.6/arch/arm/include/asm/mach/ |
| D | arch.h | 41 unsigned char reserve_lp1 :1; /* never has lp1 */
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| /kernel/linux/linux-5.10/arch/arm/include/asm/mach/ |
| D | arch.h | 41 unsigned char reserve_lp1 :1; /* never has lp1 */
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | i9xx_wm.c | 2471 /* HSW allows LP1+ watermarks even with multiple pipes */ in ilk_plane_wm_max()
2504 /* HSW LP1+ watermarks w/ multiple pipes */ in ilk_cursor_wm_max()
2824 /* ILK/SNB/IVB: LP1+ watermarks only w/o scaling */ in ilk_compute_pipe_wm()
2963 /* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */ in ilk_wm_merge()
3007 /* LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4 */ in ilk_wm_lp_to_level()
3032 /* LP1+ register values */ in ilk_compute_wm_results()
3133 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3140 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3146 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3150 /* LP1+ watermarks already deemed dirty, no need to continue */ in ilk_compute_wm_dirty()
[all …]
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| D | intel_atomic_plane.c | 559 * when we start in big FIFO mode (LP1+). Thus we need to drop in intel_plane_atomic_calc_changes()
563 * we've already signalled flip completion. We can resume LP1+ in intel_plane_atomic_calc_changes()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/input/touchscreen/ |
| D | azoteq,iqs7211.yaml | 76 azoteq,rate-lp1-ms:
110 azoteq,timeout-lp1-ms:
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| /kernel/linux/linux-6.6/arch/arm/kernel/ |
| D | setup.c | 210 #define lp1 io_res[1] macro
921 * possessing lp0, lp1 or lp2 in request_standard_resources()
926 request_resource(&ioport_resource, &lp1); in request_standard_resources()
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| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| D | setup.c | 217 #define lp1 io_res[1] macro
914 * possessing lp0, lp1 or lp2 in request_standard_resources()
919 request_resource(&ioport_resource, &lp1); in request_standard_resources()
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| /kernel/linux/linux-6.6/Documentation/admin-guide/ |
| D | parport.rst | 222 the first parallel port, and /dev/lp1 to be the **third** parallel port,
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/ |
| D | parport.rst | 222 the first parallel port, and /dev/lp1 to be the **third** parallel port,
|
| /kernel/linux/linux-5.10/drivers/clk/ |
| D | clk-si514.c | 122 /* Calculate LP1/LP2 according to table 13 in the datasheet */ in si514_set_muldiv()
|
| /kernel/linux/linux-6.6/drivers/clk/ |
| D | clk-si514.c | 122 /* Calculate LP1/LP2 according to table 13 in the datasheet */ in si514_set_muldiv()
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra20-pmc.yaml | 93 Mode 1 is for LP1, CPU voltage off and DRAM in self-refresh
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra20-pmc.yaml | 92 Mode 1 is for LP1, CPU voltage off and DRAM in self-refresh
|
| /kernel/linux/linux-6.6/drivers/soc/tegra/fuse/ |
| D | fuse-tegra.c | 237 * from LP1 system suspend and as part of CCPLEX cluster switching. in tegra_fuse_suspend()
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| /kernel/linux/linux-6.6/drivers/char/ |
| D | lp.c | 44 * lp=parport1,none,parport2 (bind lp0 to parport1, disable lp1 and
72 * lp1 0x378
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| /kernel/linux/linux-5.10/drivers/char/ |
| D | lp.c | 44 * lp=parport1,none,parport2 (bind lp0 to parport1, disable lp1 and
72 * lp1 0x378
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| D | intel_pm.c | 2709 /* HSW allows LP1+ watermarks even with multiple pipes */ in ilk_plane_wm_max()
2742 /* HSW LP1+ watermarks w/ multiple pipes */ in ilk_cursor_wm_max()
3180 /* ILK/SNB/IVB: LP1+ watermarks only w/o scaling */ in ilk_compute_pipe_wm()
3318 /* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */ in ilk_wm_merge()
3367 /* LP1,LP2,LP3 levels are either 1,2,3 or 1,3,4 */ in ilk_wm_lp_to_level()
3392 /* LP1+ register values */ in ilk_compute_wm_results()
3493 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3500 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3506 /* Must disable LP1+ watermarks too */ in ilk_compute_wm_dirty()
3510 /* LP1+ watermarks already deemed dirty, no need to continue */ in ilk_compute_wm_dirty()
[all …]
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