| /kernel/linux/linux-5.10/drivers/cpuidle/ |
| D | cpuidle-tegra.c | 281 * LP2 | C7 (CPU core power gating)
282 * LP2 | CC6 (CPU cluster power gating)
285 * differentiate the LP2 states because these states either used the same
349 /* LP2 could be disabled in device-tree */ in tegra_cpuidle_probe()
367 * cluster power-off (CC6 or LP2) states are common for all Tegra SoCs. in tegra_cpuidle_probe()
382 /* coupled CC6 (LP2) state isn't implemented yet */ in tegra_cpuidle_probe()
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| /kernel/linux/linux-6.6/drivers/cpuidle/ |
| D | cpuidle-tegra.c | 281 * LP2 | C7 (CPU core power gating)
282 * LP2 | CC6 (CPU cluster power gating)
285 * differentiate the LP2 states because these states either used the same
354 /* LP2 could be disabled in device-tree */ in tegra_cpuidle_probe()
370 * cluster power-off (CC6 or LP2) states are common for all Tegra SoCs. in tegra_cpuidle_probe()
385 /* coupled CC6 (LP2) state isn't implemented yet */ in tegra_cpuidle_probe()
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| /kernel/linux/linux-6.6/arch/arm/mach-tegra/ |
| D | sleep.S | 84 * enters suspend in LP2 by turning off the mmu and jumping to
140 * In LP2 the normal cpu clock pllx will be turned off. Switch the CPU to pllp
143 /* in LP2 idle (SDRAM active), set the CPU burst policy to PLLP */
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| D | reset-handler.S | 29 * an LP2 transition. Also branched to by LP0 and LP1 resume after
129 * R9 = CPU in LP2 state mask
206 /* Waking up from LP2? */
212 bleq __die @ no LP2 startup handler
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| D | sleep-tegra30.S | 245 /* flow controller set up for LP2 */
247 moveq r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT @ For LP2
319 * Enters LP2 on secondary CPU by exiting coherency and powergating the CPU.
746 * executes from SDRAM with target state is LP2
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| D | pm.c | 150 * if any of secondary CPU's is online and this is the LP2-idle in tegra_sleep_cpu()
341 [TEGRA_SUSPEND_LP2] = "LP2",
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| D | sleep-tegra20.S | 324 * executes from SDRAM with target state is LP2
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| /kernel/linux/linux-5.10/arch/arm/mach-tegra/ |
| D | sleep.S | 82 * enters suspend in LP2 by turning off the mmu and jumping to
138 * In LP2 the normal cpu clock pllx will be turned off. Switch the CPU to pllp
141 /* in LP2 idle (SDRAM active), set the CPU burst policy to PLLP */
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| D | reset-handler.S | 27 * an LP2 transition. Also branched to by LP0 and LP1 resume after
127 * R9 = CPU in LP2 state mask
204 /* Waking up from LP2? */
210 bleq __die @ no LP2 startup handler
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| D | sleep-tegra30.S | 196 /* flow controller set up for LP2 */
198 moveq r3, #FLOW_CTRL_WAIT_FOR_INTERRUPT @ For LP2
270 * Enters LP2 on secondary CPU by exiting coherency and powergating the CPU.
690 * executes from SDRAM with target state is LP2
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| D | pm.c | 150 * if any of secondary CPU's is online and this is the LP2-idle in tegra_sleep_cpu()
341 [TEGRA_SUSPEND_LP2] = "LP2",
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| D | sleep-tegra20.S | 295 * executes from SDRAM with target state is LP2
|
| /kernel/linux/linux-6.6/arch/arm/include/asm/mach/ |
| D | arch.h | 42 unsigned char reserve_lp2 :1; /* never has lp2 */
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| /kernel/linux/linux-5.10/arch/arm/include/asm/mach/ |
| D | arch.h | 42 unsigned char reserve_lp2 :1; /* never has lp2 */
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/input/touchscreen/ |
| D | azoteq,iqs7211.yaml | 81 azoteq,rate-lp2-ms:
118 azoteq,timeout-lp2-ms:
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| /kernel/linux/linux-6.6/arch/arm/kernel/ |
| D | setup.c | 211 #define lp2 io_res[2] macro
921 * possessing lp0, lp1 or lp2 in request_standard_resources()
928 request_resource(&ioport_resource, &lp2); in request_standard_resources()
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| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| D | setup.c | 218 #define lp2 io_res[2] macro
914 * possessing lp0, lp1 or lp2 in request_standard_resources()
921 request_resource(&ioport_resource, &lp2); in request_standard_resources()
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| /kernel/linux/linux-5.10/drivers/clk/ |
| D | clk-si514.c | 122 /* Calculate LP1/LP2 according to table 13 in the datasheet */ in si514_set_muldiv()
|
| /kernel/linux/linux-6.6/drivers/clk/ |
| D | clk-si514.c | 122 /* Calculate LP1/LP2 according to table 13 in the datasheet */ in si514_set_muldiv()
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra20-pmc.yaml | 94 Mode 2 is for LP2, CPU voltage off
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra20-pmc.yaml | 93 Mode 2 is for LP2, CPU voltage off
|
| /kernel/linux/linux-6.6/drivers/char/ |
| D | lp.c | 45 * bind lp2 to parport2)
73 * lp2 0x278
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| /kernel/linux/linux-5.10/drivers/char/ |
| D | lp.c | 45 * bind lp2 to parport2)
73 * lp2 0x278
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| /kernel/linux/linux-6.6/drivers/input/touchscreen/ |
| D | iqs7211.c | 672 .name = "azoteq,rate-lp2-ms",
721 .name = "azoteq,timeout-lp2-ms",
733 .name = "azoteq,timeout-lp2-ms",
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| /kernel/linux/linux-6.6/drivers/scsi/isci/ |
| D | port_config.c | 154 * -> (PE0), (PE0, PE1), (PE0, PE1, PE2, PE3) LP1 -> (PE1) LP2 -> (PE2), (PE2,
|