Searched +full:ml +full:- +full:ahb (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"7 title: STMicroelectronics STM32 ML-AHB interconnect bindings10 - Fabien Dessenne <fabien.dessenne@st.com>11 - Arnaud Pouliquen <arnaud.pouliquen@st.com>14 These bindings describe the STM32 SoCs ML-AHB interconnect bus which connects15 a Cortex-M subsystem with dedicated memories. The MCU SRAM and RETRAM memory17 using different buses (see [2]): balancing the Cortex-M firmware accesses23 - $ref: /schemas/simple-bus.yaml#[all …]
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)3 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: STMicroelectronics STM32 ML-AHB interconnect10 - Fabien Dessenne <fabien.dessenne@foss.st.com>11 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>14 These bindings describe the STM32 SoCs ML-AHB interconnect bus which connects15 a Cortex-M subsystem with dedicated memories. The MCU SRAM and RETRAM memory17 using different buses (see [2]): balancing the Cortex-M firmware accesses23 - $ref: /schemas/simple-bus.yaml#[all …]
1 diff -Naur a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile2 --- a/arch/arm/boot/Makefile 2022-05-27 17:20:13.781877650 +08003 +++ b/arch/arm/boot/Makefile 2022-05-31 11:56:47.693259679 +08004 @@ -16,6 +16,7 @@12 @@ -24,10 +25,12 @@13 ZRELADDR := $(zreladdr-y)14 PARAMS_PHYS := $(params_phys-y)15 INITRD_PHYS := $(initrd_phys-y)16 +DTB_OBJS ?= $(dtb-y)21 -targets := Image zImage xipImage bootpImage uImage[all …]