| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iommu/ |
| D | arm,smmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM System MMU Architecture Implementation 10 - Will Deacon <will@kernel.org> 11 - Robin Murphy <Robin.Murphy@arm.com> 23 pattern: "^iommu@[0-9a-f]*" 26 - description: Qcom SoCs implementing "arm,smmu-v2" 28 - enum: 29 - qcom,msm8996-smmu-v2 [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iommu/ |
| D | arm,smmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM System MMU Architecture Implementation 10 - Will Deacon <will@kernel.org> 11 - Robin Murphy <Robin.Murphy@arm.com> 23 pattern: "^iommu@[0-9a-f]*" 26 - description: Qcom SoCs implementing "arm,smmu-v2" 28 - enum: 29 - qcom,msm8996-smmu-v2 [all …]
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| /kernel/linux/linux-5.10/drivers/iommu/arm/arm-smmu/ |
| D | arm-smmu-impl.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 #define pr_fmt(fmt) "arm-smmu: " fmt 10 #include "arm-smmu.h" 44 /* Since we don't care for sGFAR, we can do without 64-bit accessors */ 65 cs->id_base = atomic_fetch_add(smmu->num_context_banks, &context_count); in cavium_cfg_probe() 66 dev_notice(smmu->dev, "\tenabling workaround for Cavium erratum 27704\n"); in cavium_cfg_probe() 74 struct cavium_smmu *cs = container_of(smmu_domain->smmu, in cavium_init_context() 77 if (smmu_domain->stage == ARM_SMMU_DOMAIN_S2) in cavium_init_context() 78 smmu_domain->cfg.vmid += cs->id_base; in cavium_init_context() 80 smmu_domain->cfg.asid += cs->id_base; in cavium_init_context() [all …]
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| D | arm-smmu-nvidia.c | 1 // SPDX-License-Identifier: GPL-2.0-only 2 // Copyright (C) 2019-2020 NVIDIA CORPORATION. All rights reserved. 10 #include "arm-smmu.h" 13 * Tegra194 has three ARM MMU-500 Instances. 16 * non-isochronous HW devices. 20 * The third instance usage is through standard arm-smmu driver itself and 36 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page() 89 for (spin_cnt = TLB_SPIN_COUNT; spin_cnt > 0; spin_cnt--) { in nvidia_smmu_tlb_sync() 109 dev_err_ratelimited(smmu->dev, in nvidia_smmu_tlb_sync() 110 "TLB sync timed out -- SMMU may be deadlocked\n"); in nvidia_smmu_tlb_sync() [all …]
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| /kernel/linux/linux-6.6/drivers/iommu/arm/arm-smmu/ |
| D | arm-smmu-impl.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 #define pr_fmt(fmt) "arm-smmu: " fmt 10 #include "arm-smmu.h" 44 /* Since we don't care for sGFAR, we can do without 64-bit accessors */ 65 cs->id_base = atomic_fetch_add(smmu->num_context_banks, &context_count); in cavium_cfg_probe() 66 dev_notice(smmu->dev, "\tenabling workaround for Cavium erratum 27704\n"); in cavium_cfg_probe() 74 struct cavium_smmu *cs = container_of(smmu_domain->smmu, in cavium_init_context() 77 if (smmu_domain->stage == ARM_SMMU_DOMAIN_S2) in cavium_init_context() 78 smmu_domain->cfg.vmid += cs->id_base; in cavium_init_context() 80 smmu_domain->cfg.asid += cs->id_base; in cavium_init_context() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/gma500/ |
| D | psb_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2007-2011, Intel Corporation. 44 * to the different groups of PowerVR 5-series chip designs 48 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx 49 * PowerVR SGX535 - Moorestown - Intel GMA 600 50 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx 51 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600 52 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700, 97 * psb_spank - reset the 2D engine 123 PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); in psb_spank() [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/cpu/ |
| D | idle-states.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/cpu/idle-states.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> 11 - Anup Patel <anup@brainfault.org> 15 1 - Introduction 18 ARM and RISC-V systems contain HW capable of managing power consumption 19 dynamically, where cores can be put in different low-power states (ranging 22 run-time, can be specified through device tree bindings representing the [all …]
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| /kernel/linux/linux-5.10/arch/arm/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 7 select ARCH_HAS_CPU_FINALIZE_INIT if MMU 8 select ARCH_HAS_DEBUG_VIRTUAL if MMU 21 select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL 22 select ARCH_HAS_STRICT_MODULE_RWX if MMU 25 select ARCH_HAS_TEARDOWN_DMA_OPS if MMU 37 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 41 select BUILDTIME_TABLE_SORT if MMU 47 select DMA_REMAP if MMU 70 select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL && !CPU_ENDIAN_BE32 && MMU [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/gma500/ |
| D | psb_drv.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2007-2011, Intel Corporation. 42 * to the different groups of PowerVR 5-series chip designs 46 * PowerVR SGX535 - Poulsbo - Intel GMA 500, Intel Atom Z5xx 47 * PowerVR SGX535 - Moorestown - Intel GMA 600 48 * PowerVR SGX535 - Oaktrail - Intel GMA 600, Intel Atom Z6xx, E6xx 49 * PowerVR SGX540 - Medfield - Intel Atom Z2460 50 * PowerVR SGX544MP2 - Medfield - 51 * PowerVR SGX545 - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600 52 * PowerVR SGX545 - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700, [all …]
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| /kernel/linux/linux-6.6/arch/arm/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 8 select ARCH_HAS_CPU_FINALIZE_INIT if MMU 10 select ARCH_HAS_DEBUG_VIRTUAL if MMU 22 select ARCH_HAS_STRICT_KERNEL_RWX if MMU && !XIP_KERNEL 23 select ARCH_HAS_STRICT_MODULE_RWX if MMU 26 select ARCH_HAS_TEARDOWN_DMA_OPS if MMU 40 select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU 45 select BUILDTIME_TABLE_SORT if MMU 51 select DMA_GLOBAL_POOL if !MMU 53 select DMA_NONCOHERENT_MMAP if MMU [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/lima/ |
| D | lima_sched.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */ 4 #include <linux/iosys-map.h> 34 return -ENOMEM; in lima_sched_slab_init() 43 if (!--lima_fence_slab_refcnt) { in lima_sched_slab_fini() 63 return f->pipe->base.name; in lima_fence_get_timeline_name() 78 call_rcu(&f->base.rcu, lima_fence_release_rcu); in lima_fence_release() 95 fence->pipe = pipe; in lima_fence_create() 96 dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock, in lima_fence_create() 97 pipe->fence_context, ++pipe->fence_seqno); in lima_fence_create() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/lima/ |
| D | lima_sched.c | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /* Copyright 2017-2019 Qiang Yu <yuq825@gmail.com> */ 33 return -ENOMEM; in lima_sched_slab_init() 42 if (!--lima_fence_slab_refcnt) { in lima_sched_slab_fini() 62 return f->pipe->base.name; in lima_fence_get_timeline_name() 77 call_rcu(&f->base.rcu, lima_fence_release_rcu); in lima_fence_release() 94 fence->pipe = pipe; in lima_fence_create() 95 dma_fence_init(&fence->base, &lima_fence_ops, &pipe->fence_lock, in lima_fence_create() 96 pipe->fence_context, ++pipe->fence_seqno); in lima_fence_create() 118 task->bos = kmemdup(bos, sizeof(*bos) * num_bos, GFP_KERNEL); in lima_sched_task_init() [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/arm/ |
| D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "juno-clocks.dtsi" 3 #include "juno-motherboard.dtsi" 11 compatible = "arm,armv7-timer-mem"; 13 clock-frequency = <50000000>; 14 #address-cells = <1>; 15 #size-cells = <1>; 19 frame-number = <1>; 30 interrupt-names = "mhu_lpri_rx", 32 #mbox-cells = <1>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/tesla/ |
| D | fsd.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Tesla Full Self-Driving SoC device tree source 5 * Copyright (c) 2017-2022 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2017-2022 Tesla, Inc. 11 #include <dt-bindings/clock/fsd-clk.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 38 #address-cells = <2>; [all …]
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| /kernel/linux/linux-5.10/drivers/cpufreq/ |
| D | pmac32-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org> 41 * init/main.c to make it non-init before enabling DEBUG_FREQ 254 * the above didn't re-enable the DEC */ in pmu_set_cpu_speed() 270 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed() 271 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed() 298 /* Restore userland MMU context */ in pmu_set_cpu_speed() 299 switch_mmu_context(NULL, current->active_mm, NULL); in pmu_set_cpu_speed() 310 * as soon as interrupts are re-enabled and the generic in pmu_set_cpu_speed() 390 * GPIO space, and the device-tree doesn't help. in read_gpio() [all …]
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| /kernel/linux/linux-6.6/drivers/cpufreq/ |
| D | pmac32-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org> 41 * init/main.c to make it non-init before enabling DEBUG_FREQ 254 * the above didn't re-enable the DEC */ in pmu_set_cpu_speed() 270 save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed() 271 save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ in pmu_set_cpu_speed() 298 /* Restore userland MMU context */ in pmu_set_cpu_speed() 299 switch_mmu_context(NULL, current->active_mm, NULL); in pmu_set_cpu_speed() 310 * as soon as interrupts are re-enabled and the generic in pmu_set_cpu_speed() 390 * GPIO space, and the device-tree doesn't help. in read_gpio() [all …]
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| /kernel/linux/linux-6.6/arch/sparc/include/asm/ |
| D | floppy_32.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 76 #if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */ 106 sun_fdc->dor_82077 = value; in sun_set_dor() 111 return sun_fdc->dir_82077; in sun_read_dir() 122 return sun_fdc->status_82072 & ~STATUS_DMA; in sun_82072_fd_inb() 124 return sun_fdc->data_82072; in sun_82072_fd_inb() 142 sun_fdc->data_82072 = value; in sun_82072_fd_outb() 145 sun_fdc->dcr_82072 = value; in sun_82072_fd_outb() 148 sun_fdc->status_82072 = value; in sun_82072_fd_outb() 162 return sun_fdc->status1_82077; in sun_82077_fd_inb() [all …]
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| /kernel/linux/linux-5.10/arch/sparc/include/asm/ |
| D | floppy_32.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 76 #if 0 /* P3: added by Alain, these cause a MMU corruption. 19960524 XXX */ 106 sun_fdc->dor_82077 = value; in sun_set_dor() 111 return sun_fdc->dir_82077; in sun_read_dir() 122 return sun_fdc->status_82072 & ~STATUS_DMA; in sun_82072_fd_inb() 124 return sun_fdc->data_82072; in sun_82072_fd_inb() 142 sun_fdc->data_82072 = value; in sun_82072_fd_outb() 145 sun_fdc->dcr_82072 = value; in sun_82072_fd_outb() 148 sun_fdc->status_82072 = value; in sun_82072_fd_outb() 162 return sun_fdc->status1_82077; in sun_82077_fd_inb() [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/misc/ |
| D | fsl,qoriq-mc.txt | 3 The Freescale Management Complex (fsl-mc) is a hardware resource 5 network-oriented packet processing applications. After the fsl-mc 12 For an overview of the DPAA2 architecture and fsl-mc bus see: 16 same hardware "isolation context" and a 10-bit value called an ICID 21 between ICIDs and IOMMUs, so an iommu-map property is used to define 28 For arm-smmu binding, see: 32 The msi-map property is used to associate the devices with both the ITS 36 Documentation/devicetree/bindings/interrupt-controller/msi.txt. 39 Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml. 43 - compatible [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/misc/ |
| D | fsl,qoriq-mc.txt | 3 The Freescale Management Complex (fsl-mc) is a hardware resource 5 network-oriented packet processing applications. After the fsl-mc 12 For an overview of the DPAA2 architecture and fsl-mc bus see: 16 same hardware "isolation context" and a 10-bit value called an ICID 21 between ICIDs and IOMMUs, so an iommu-map property is used to define 28 For arm-smmu binding, see: 32 The msi-map property is used to associate the devices with both the ITS 36 Documentation/devicetree/bindings/interrupt-controller/msi.txt. 39 Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml. 43 - compatible [all …]
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| /kernel/linux/linux-5.10/drivers/cpuidle/ |
| D | cpuidle-big_little.c | 1 // SPDX-License-Identifier: GPL-2.0-only 41 * or in the MCPM back-ends. 47 * up and running when the CPU is powered up on cluster wake-up from shutdown. 69 .desc = "ARM little-cluster power down", 75 { .compatible = "arm,idle-state", 86 .exit_latency = 500, 90 .desc = "ARM big-cluster power down", 98 * in power down sequences where caches and MMU may be turned off. 115 * bl_enter_powerdown - Programs CPU to enter the specified state 145 return -ENOMEM; in bl_idle_driver_init() [all …]
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| /kernel/linux/linux-6.6/drivers/cpuidle/ |
| D | cpuidle-big_little.c | 1 // SPDX-License-Identifier: GPL-2.0-only 41 * or in the MCPM back-ends. 47 * up and running when the CPU is powered up on cluster wake-up from shutdown. 70 .desc = "ARM little-cluster power down", 76 { .compatible = "arm,idle-state", 87 .exit_latency = 500, 92 .desc = "ARM big-cluster power down", 100 * in power down sequences where caches and MMU may be turned off. 117 * bl_enter_powerdown - Programs CPU to enter the specified state 149 return -ENOMEM; in bl_idle_driver_init() [all …]
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| /kernel/linux/linux-6.6/arch/alpha/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 42 The Alpha is a 64-bit general-purpose processor designed and 44 now Hewlett-Packard. The Alpha Linux project has a home page at 50 config MMU config 91 Alcor/Alpha-XLT AS 600, AS 500, XL-300, XL-366 92 Alpha-XL XL-233, XL-266 101 Jensen DECpc 150, DEC 2000 models 300, 500 102 LX164 AlphaPC164-LX 104 Miata Personal Workstation 433/500/600 a/au 111 Ruffian RPX164-2, AlphaPC164-UX, AlphaPC164-BX [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/arm/ |
| D | juno-base.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "juno-clocks.dtsi" 3 #include "juno-motherboard.dtsi" 11 compatible = "arm,armv7-timer-mem"; 13 clock-frequency = <50000000>; 14 #address-cells = <1>; 15 #size-cells = <1>; 19 frame-number = <1>; 31 #mbox-cells = <1>; 33 clock-names = "apb_pclk"; [all …]
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| /kernel/linux/linux-5.10/arch/alpha/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 44 The Alpha is a 64-bit general-purpose processor designed and 46 now Hewlett-Packard. The Alpha Linux project has a home page at 52 config MMU config 97 Alcor/Alpha-XLT AS 600, AS 500, XL-300, XL-366 98 Alpha-XL XL-233, XL-266 107 Jensen DECpc 150, DEC 2000 models 300, 500 108 LX164 AlphaPC164-LX 110 Miata Personal Workstation 433/500/600 a/au 117 Ruffian RPX164-2, AlphaPC164-UX, AlphaPC164-BX [all …]
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