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/kernel/linux/linux-5.10/arch/arm/kernel/
Dsleep.S11 * Implementation of MPIDR hash algorithm through shifting
18 * @mpidr: register containing MPIDR value
19 * @mask: register containing MPIDR mask
25 *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 mpidr, u32 mask) {
27 * u32 mpidr_masked = mpidr & mask;
33 * Input registers: rs0, rs1, rs2, mpidr, mask
36 (eg: a macro instance with mpidr = r1 and dst = r1 is invalid)
38 .macro compute_mpidr_hash dst, rs0, rs1, rs2, mpidr, mask
39 and \mpidr, \mpidr, \mask @ mask out MPIDR bits
40 and \dst, \mpidr, #0xff @ mask=aff0
[all …]
Dtopology.c188 unsigned int mpidr; in store_cpu_topology() local
193 mpidr = read_cpuid_mpidr(); in store_cpu_topology()
196 if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { in store_cpu_topology()
202 if (mpidr & MPIDR_MT_BITMASK) { in store_cpu_topology()
204 cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology()
205 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology()
206 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2); in store_cpu_topology()
210 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology()
211 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology()
226 pr_info("CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", in store_cpu_topology()
[all …]
Ddevtree.c61 * and builds the cpu logical map array containing MPIDR values related to
71 * contain a list of MPIDR[23:0] values where MPIDR[31:24] must in arm_dt_init_cpu_maps()
77 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; in arm_dt_init_cpu_maps() local
106 * defines the MPIDR[23:0]. in arm_dt_init_cpu_maps()
123 * to avoid matching valid MPIDR[23:0] values. in arm_dt_init_cpu_maps()
133 * Build a stashed array of MPIDR values. Numbering scheme in arm_dt_init_cpu_maps()
137 * boot CPU MPIDR is detected, this is recorded so that the in arm_dt_init_cpu_maps()
141 if (hwid == mpidr) { in arm_dt_init_cpu_maps()
170 pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n"); in arm_dt_init_cpu_maps()
/kernel/linux/linux-6.6/arch/arm/kernel/
Dsleep.S11 * Implementation of MPIDR hash algorithm through shifting
18 * @mpidr: register containing MPIDR value
19 * @mask: register containing MPIDR mask
25 *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 mpidr, u32 mask) {
27 * u32 mpidr_masked = mpidr & mask;
33 * Input registers: rs0, rs1, rs2, mpidr, mask
36 (eg: a macro instance with mpidr = r1 and dst = r1 is invalid)
38 .macro compute_mpidr_hash dst, rs0, rs1, rs2, mpidr, mask
39 and \mpidr, \mpidr, \mask @ mask out MPIDR bits
40 and \dst, \mpidr, #0xff @ mask=aff0
[all …]
Dtopology.c188 unsigned int mpidr; in store_cpu_topology() local
193 mpidr = read_cpuid_mpidr(); in store_cpu_topology()
196 if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { in store_cpu_topology()
202 if (mpidr & MPIDR_MT_BITMASK) { in store_cpu_topology()
204 cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology()
205 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology()
206 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 2); in store_cpu_topology()
210 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); in store_cpu_topology()
211 cpuid_topo->package_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); in store_cpu_topology()
226 pr_info("CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", in store_cpu_topology()
[all …]
Ddevtree.c61 * and builds the cpu logical map array containing MPIDR values related to
71 * contain a list of MPIDR[23:0] values where MPIDR[31:24] must in arm_dt_init_cpu_maps()
77 u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; in arm_dt_init_cpu_maps() local
93 * defines the MPIDR[23:0]. in arm_dt_init_cpu_maps()
105 * to avoid matching valid MPIDR[23:0] values. in arm_dt_init_cpu_maps()
115 * Build a stashed array of MPIDR values. Numbering scheme in arm_dt_init_cpu_maps()
119 * boot CPU MPIDR is detected, this is recorded so that the in arm_dt_init_cpu_maps()
123 if (hwid == mpidr) { in arm_dt_init_cpu_maps()
152 pr_warn("DT missing boot CPU MPIDR[23:0], fall back to default cpu_logical_map\n"); in arm_dt_init_cpu_maps()
/kernel/linux/linux-6.6/arch/arm64/kernel/
Dsleep.S18 * @mpidr: register containing MPIDR_EL1 value
19 * @mask: register containing MPIDR mask
25 *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) {
27 * u64 mpidr_masked = mpidr & mask;
34 * Input registers: rs0, rs1, rs2, rs3, mpidr, mask
37 (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
39 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
40 and \mpidr, \mpidr, \mask // mask out MPIDR bits
41 and \dst, \mpidr, #0xff // mask=aff0
43 and \mask, \mpidr, #0xff00 // mask = aff1
[all …]
/kernel/linux/linux-5.10/arch/arm64/kernel/
Dsleep.S18 * @mpidr: register containing MPIDR_EL1 value
19 * @mask: register containing MPIDR mask
25 *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) {
27 * u64 mpidr_masked = mpidr & mask;
34 * Input registers: rs0, rs1, rs2, rs3, mpidr, mask
37 (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
39 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
40 and \mpidr, \mpidr, \mask // mask out MPIDR bits
41 and \dst, \mpidr, #0xff // mask=aff0
43 and \mask, \mpidr, #0xff00 // mask = aff1
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-milbeaut/
Dplatsmp.c25 unsigned int mpidr, cpu, cluster; in m10v_boot_secondary() local
30 mpidr = cpu_logical_map(l_cpu); in m10v_boot_secondary()
31 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_boot_secondary()
32 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_boot_secondary()
48 unsigned int mpidr, cpu, cluster; in m10v_smp_init() local
59 mpidr = read_cpuid_mpidr(); in m10v_smp_init()
60 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_smp_init()
61 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_smp_init()
78 unsigned int mpidr, cpu; in m10v_cpu_kill() local
80 mpidr = cpu_logical_map(l_cpu); in m10v_cpu_kill()
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-milbeaut/
Dplatsmp.c25 unsigned int mpidr, cpu, cluster; in m10v_boot_secondary() local
30 mpidr = cpu_logical_map(l_cpu); in m10v_boot_secondary()
31 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_boot_secondary()
32 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_boot_secondary()
48 unsigned int mpidr, cpu, cluster; in m10v_smp_init() local
59 mpidr = read_cpuid_mpidr(); in m10v_smp_init()
60 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in m10v_smp_init()
61 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in m10v_smp_init()
78 unsigned int mpidr, cpu; in m10v_cpu_kill() local
80 mpidr = cpu_logical_map(l_cpu); in m10v_cpu_kill()
[all …]
/kernel/linux/linux-6.6/arch/arm/common/
Dmcpm_platsmp.c22 unsigned int mpidr; in cpu_to_pcpu() local
24 mpidr = cpu_logical_map(cpu); in cpu_to_pcpu()
25 *pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in cpu_to_pcpu()
26 *pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in cpu_to_pcpu()
73 unsigned int mpidr, pcpu, pcluster; in mcpm_cpu_die() local
74 mpidr = read_cpuid_mpidr(); in mcpm_cpu_die()
75 pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_die()
76 pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_die()
Dmcpm_entry.c241 unsigned int mpidr, cpu, cluster; in mcpm_cpu_power_down() local
245 mpidr = read_cpuid_mpidr(); in mcpm_cpu_power_down()
246 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_power_down()
247 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_power_down()
330 unsigned int mpidr = read_cpuid_mpidr(); in mcpm_cpu_suspend() local
331 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_suspend()
332 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_suspend()
342 unsigned int mpidr, cpu, cluster; in mcpm_cpu_powered_up() local
349 mpidr = read_cpuid_mpidr(); in mcpm_cpu_powered_up()
350 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_powered_up()
[all …]
/kernel/linux/linux-5.10/arch/arm/common/
Dmcpm_platsmp.c22 unsigned int mpidr; in cpu_to_pcpu() local
24 mpidr = cpu_logical_map(cpu); in cpu_to_pcpu()
25 *pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in cpu_to_pcpu()
26 *pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in cpu_to_pcpu()
73 unsigned int mpidr, pcpu, pcluster; in mcpm_cpu_die() local
74 mpidr = read_cpuid_mpidr(); in mcpm_cpu_die()
75 pcpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_die()
76 pcluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_die()
Dmcpm_entry.c241 unsigned int mpidr, cpu, cluster; in mcpm_cpu_power_down() local
245 mpidr = read_cpuid_mpidr(); in mcpm_cpu_power_down()
246 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_power_down()
247 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_power_down()
330 unsigned int mpidr = read_cpuid_mpidr(); in mcpm_cpu_suspend() local
331 unsigned int cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_suspend()
332 unsigned int cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in mcpm_cpu_suspend()
342 unsigned int mpidr, cpu, cluster; in mcpm_cpu_powered_up() local
349 mpidr = read_cpuid_mpidr(); in mcpm_cpu_powered_up()
350 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in mcpm_cpu_powered_up()
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-hisi/
Dplatmcpm.c100 unsigned int mpidr, cpu, cluster; in hip04_boot_secondary() local
104 mpidr = cpu_logical_map(l_cpu); in hip04_boot_secondary()
105 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_boot_secondary()
106 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hip04_boot_secondary()
155 unsigned int mpidr, cpu, cluster; in hip04_cpu_die() local
158 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_die()
159 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_cpu_die()
160 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hip04_cpu_die()
193 unsigned int mpidr, cpu, cluster; in hip04_cpu_kill() local
196 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_kill()
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-hisi/
Dplatmcpm.c100 unsigned int mpidr, cpu, cluster; in hip04_boot_secondary() local
104 mpidr = cpu_logical_map(l_cpu); in hip04_boot_secondary()
105 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_boot_secondary()
106 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hip04_boot_secondary()
155 unsigned int mpidr, cpu, cluster; in hip04_cpu_die() local
158 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_die()
159 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); in hip04_cpu_die()
160 cluster = MPIDR_AFFINITY_LEVEL(mpidr, 1); in hip04_cpu_die()
193 unsigned int mpidr, cpu, cluster; in hip04_cpu_kill() local
196 mpidr = cpu_logical_map(l_cpu); in hip04_cpu_kill()
[all …]
/kernel/linux/linux-5.10/Documentation/virt/kvm/devices/
Darm-vgic-v3.rst83 values: | mpidr | offset |
93 specified by the mpidr.
104 The mpidr field is used to specify which
105 redistributor is accessed. The mpidr is ignored for the distributor.
107 The mpidr encoding is based on the affinity information in the
108 architecture defined MPIDR, and the field is encoded as follows::
114 regardless of the mpidr used to access the register.
177 values: | mpidr | RES | instr |
179 The mpidr field encodes the CPU ID based on the affinity information in the
180 architecture defined MPIDR, and the field is encoded as follows::
[all …]
/kernel/linux/linux-5.10/arch/arm64/include/asm/
Dsmp_plat.h29 * Retrieve logical cpu index corresponding to a given MPIDR.Aff*
30 * - mpidr: MPIDR.Aff* bits to be used for the look-up
34 static inline int get_logical_index(u64 mpidr) in get_logical_index() argument
38 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
/kernel/linux/linux-6.6/arch/arm64/include/asm/
Dsmp_plat.h30 * Retrieve logical cpu index corresponding to a given MPIDR.Aff*
31 * - mpidr: MPIDR.Aff* bits to be used for the look-up
35 static inline int get_logical_index(u64 mpidr) in get_logical_index() argument
39 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
/kernel/linux/linux-6.6/Documentation/virt/kvm/devices/
Darm-vgic-v3.rst83 values: | mpidr | offset |
93 specified by the mpidr.
104 The mpidr field is used to specify which
105 redistributor is accessed. The mpidr is ignored for the distributor.
107 The mpidr encoding is based on the affinity information in the
108 architecture defined MPIDR, and the field is encoded as follows::
114 regardless of the mpidr used to access the register.
177 values: | mpidr | RES | instr |
179 The mpidr field encodes the CPU ID based on the affinity information in the
180 architecture defined MPIDR, and the field is encoded as follows::
[all …]
/kernel/linux/linux-5.10/drivers/bus/
Darm-cci.c117 u64 mpidr; member
132 static inline void init_cpu_port(struct cpu_port *port, u32 index, u64 mpidr) in init_cpu_port() argument
135 port->mpidr = mpidr; in init_cpu_port()
143 static inline bool cpu_port_match(struct cpu_port *port, u64 mpidr) in cpu_port_match() argument
145 return port->mpidr == (mpidr & MPIDR_HWID_BITMASK); in cpu_port_match()
254 * @mpidr: mpidr of the CPU whose CCI port should be disabled
265 int notrace cci_disable_port_by_cpu(u64 mpidr) in cci_disable_port_by_cpu() argument
271 if (is_valid && cpu_port_match(&cpu_port[cpu], mpidr)) { in cci_disable_port_by_cpu()
302 " mrc p15, 0, r0, c0, c0, 5 @ get MPIDR value \n" in cci_enable_port_for_self()
309 /* Loop over the cpu_port array looking for a matching MPIDR */ in cci_enable_port_for_self()
[all …]
/kernel/linux/linux-6.6/drivers/bus/
Darm-cci.c117 u64 mpidr; member
132 static inline void init_cpu_port(struct cpu_port *port, u32 index, u64 mpidr) in init_cpu_port() argument
135 port->mpidr = mpidr; in init_cpu_port()
143 static inline bool cpu_port_match(struct cpu_port *port, u64 mpidr) in cpu_port_match() argument
145 return port->mpidr == (mpidr & MPIDR_HWID_BITMASK); in cpu_port_match()
254 * @mpidr: mpidr of the CPU whose CCI port should be disabled
265 int notrace cci_disable_port_by_cpu(u64 mpidr) in cci_disable_port_by_cpu() argument
271 if (is_valid && cpu_port_match(&cpu_port[cpu], mpidr)) { in cci_disable_port_by_cpu()
302 " mrc p15, 0, r0, c0, c0, 5 @ get MPIDR value \n" in cci_enable_port_for_self()
309 /* Loop over the cpu_port array looking for a matching MPIDR */ in cci_enable_port_for_self()
[all …]
/kernel/linux/linux-5.10/arch/arm/include/asm/
Dsmp_plat.h75 * Retrieve logical cpu index corresponding to a given MPIDR[23:0]
76 * - mpidr: MPIDR[23:0] to be used for the look-up
80 static inline int get_logical_index(u32 mpidr) in get_logical_index() argument
84 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
/kernel/linux/linux-6.6/arch/arm/include/asm/
Dsmp_plat.h75 * Retrieve logical cpu index corresponding to a given MPIDR[23:0]
76 * - mpidr: MPIDR[23:0] to be used for the look-up
80 static inline int get_logical_index(u32 mpidr) in get_logical_index() argument
84 if (cpu_logical_map(cpu) == mpidr) in get_logical_index()
/kernel/linux/linux-6.6/arch/arm64/kvm/hyp/nvhe/
Dpsci-relay.c78 static unsigned int find_cpu_id(u64 mpidr) in find_cpu_id() argument
83 if (mpidr & ~MPIDR_HWID_BITMASK) in find_cpu_id()
87 if (cpu_logical_map(i) == mpidr) in find_cpu_id()
109 DECLARE_REG(u64, mpidr, host_ctxt, 1); in psci_cpu_on()
119 * Find the logical CPU ID for the given MPIDR. The search set is in psci_cpu_on()
125 cpu_id = find_cpu_id(mpidr); in psci_cpu_on()
140 ret = psci_call(func_id, mpidr, in psci_cpu_on()

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