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/kernel/linux/linux-6.6/arch/arm/mach-mv78xx0/
Dmpp.h3 * linux/arch/arm/mach-mv78xx0/mpp.h -- Multi Purpose Pins
11 #define MPP(_num, _sel, _in, _out, _78100_A0) (\ macro
12 /* MPP number */ ((_num) & 0xff) | \
13 /* MPP select value */ (((_sel) & 0xf) << 8) | \
20 #define MPP_78100_A0_MASK MPP(0, 0x0, 0, 0, 1)
22 #define MPP0_GPIO MPP(0, 0x0, 1, 1, 1)
23 #define MPP0_GE0_COL MPP(0, 0x1, 0, 0, 1)
24 #define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 0, 1)
25 #define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1)
27 #define MPP1_GPIO MPP(1, 0x0, 1, 1, 1)
[all …]
Dmpp.c3 * arch/arm/mach-mv78x00/mpp.c
5 * MPP functions for Marvell MV78x00 SoCs
11 #include <plat/mpp.h>
14 #include "mpp.h"
25 printk(KERN_ERR "MPP setup: unknown mv78x00 variant " in mv78xx0_variant()
/kernel/linux/linux-5.10/arch/arm/mach-mv78xx0/
Dmpp.h2 * linux/arch/arm/mach-mv78xx0/mpp.h -- Multi Purpose Pins
15 #define MPP(_num, _sel, _in, _out, _78100_A0) (\ macro
16 /* MPP number */ ((_num) & 0xff) | \
17 /* MPP select value */ (((_sel) & 0xf) << 8) | \
24 #define MPP_78100_A0_MASK MPP(0, 0x0, 0, 0, 1)
26 #define MPP0_GPIO MPP(0, 0x0, 1, 1, 1)
27 #define MPP0_GE0_COL MPP(0, 0x1, 0, 0, 1)
28 #define MPP0_GE1_TXCLK MPP(0, 0x2, 0, 0, 1)
29 #define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1)
31 #define MPP1_GPIO MPP(1, 0x0, 1, 1, 1)
[all …]
Dmpp.c2 * arch/arm/mach-mv78x00/mpp.c
4 * MPP functions for Marvell MV78x00 SoCs
14 #include <plat/mpp.h>
17 #include "mpp.h"
28 printk(KERN_ERR "MPP setup: unknown mv78x00 variant " in mv78xx0_variant()
/kernel/linux/linux-5.10/arch/arm/mach-dove/
Dmpp.h5 #define MPP(_num, _sel, _in, _out) ( \ macro
6 /* MPP number */ ((_num) & 0xff) | \
7 /* MPP select value */ (((_sel) & 0xf) << 8) | \
11 #define MPP0_GPIO0 MPP(0, 0x0, 1, 1)
12 #define MPP0_UA2_RTSn MPP(0, 0x2, 0, 0)
13 #define MPP0_SDIO0_CD MPP(0, 0x3, 0, 0)
14 #define MPP0_LCD0_PWM MPP(0, 0xf, 0, 0)
16 #define MPP1_GPIO1 MPP(1, 0x0, 1, 1)
17 #define MPP1_UA2_CTSn MPP(1, 0x2, 0, 0)
18 #define MPP1_SDIO0_WP MPP(1, 0x3, 0, 0)
[all …]
Dmpp.c2 * arch/arm/mach-dove/mpp.c
4 * MPP functions for Marvell Dove SoCs
14 #include <plat/mpp.h>
17 #include "mpp.h"
58 /* Dump all the extra MPP registers. The platform code will dump the
132 pr_err("dove: invalid MPP GRP number (%u)\n", num); in dove_mpp_conf_grp()
146 /* Configure the various MPP pins on Dove */
/kernel/linux/linux-6.6/arch/arm/mach-dove/
Dmpp.h5 #define MPP(_num, _sel, _in, _out) ( \ macro
6 /* MPP number */ ((_num) & 0xff) | \
7 /* MPP select value */ (((_sel) & 0xf) << 8) | \
11 #define MPP0_GPIO0 MPP(0, 0x0, 1, 1)
12 #define MPP0_UA2_RTSn MPP(0, 0x2, 0, 0)
13 #define MPP0_SDIO0_CD MPP(0, 0x3, 0, 0)
14 #define MPP0_LCD0_PWM MPP(0, 0xf, 0, 0)
16 #define MPP1_GPIO1 MPP(1, 0x0, 1, 1)
17 #define MPP1_UA2_CTSn MPP(1, 0x2, 0, 0)
18 #define MPP1_SDIO0_WP MPP(1, 0x3, 0, 0)
[all …]
Dmpp.c3 * arch/arm/mach-dove/mpp.c
5 * MPP functions for Marvell Dove SoCs
11 #include <plat/mpp.h>
14 #include "mpp.h"
55 /* Dump all the extra MPP registers. The platform code will dump the
129 pr_err("dove: invalid MPP GRP number (%u)\n", num); in dove_mpp_conf_grp()
143 /* Configure the various MPP pins on Dove */
/kernel/linux/linux-5.10/arch/arm/mach-orion5x/
Dmpp.h5 #define MPP(_num, _sel, _in, _out, _F5181l, _F5182, _F5281) ( \ macro
6 /* MPP number */ ((_num) & 0xff) | \
7 /* MPP select value */ (((_sel) & 0xf) << 8) | \
16 #define MPP_F5181_MASK MPP(0, 0x0, 0, 0, 1, 0, 0)
17 #define MPP_F5182_MASK MPP(0, 0x0, 0, 0, 0, 1, 0)
18 #define MPP_F5281_MASK MPP(0, 0x0, 0, 0, 0, 0, 1)
20 #define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1, 1, 1)
21 #define MPP0_GPIO MPP(0, 0x3, 1, 1, 1, 1, 1)
22 #define MPP0_PCIE_RST_OUTn MPP(0, 0x0, 0, 0, 1, 1, 1)
23 #define MPP0_PCI_ARB MPP(0, 0x2, 0, 0, 1, 1, 1)
[all …]
Dmpp.c2 * arch/arm/mach-orion5x/mpp.c
4 * MPP functions for Marvell Orion 5x SoCs
14 #include <plat/mpp.h>
16 #include "mpp.h"
35 printk(KERN_ERR "MPP setup: unknown orion5x variant " in orion5x_variant()
/kernel/linux/linux-6.6/arch/arm/mach-orion5x/
Dmpp.h5 #define MPP(_num, _sel, _in, _out, _F5181l, _F5182, _F5281) ( \ macro
6 /* MPP number */ ((_num) & 0xff) | \
7 /* MPP select value */ (((_sel) & 0xf) << 8) | \
16 #define MPP_F5181_MASK MPP(0, 0x0, 0, 0, 1, 0, 0)
17 #define MPP_F5182_MASK MPP(0, 0x0, 0, 0, 0, 1, 0)
18 #define MPP_F5281_MASK MPP(0, 0x0, 0, 0, 0, 0, 1)
20 #define MPP0_UNUSED MPP(0, 0x3, 0, 0, 1, 1, 1)
21 #define MPP0_GPIO MPP(0, 0x3, 1, 1, 1, 1, 1)
22 #define MPP0_PCIE_RST_OUTn MPP(0, 0x0, 0, 0, 1, 1, 1)
23 #define MPP0_PCI_ARB MPP(0, 0x2, 0, 0, 1, 1, 1)
[all …]
Dmpp.c3 * arch/arm/mach-orion5x/mpp.c
5 * MPP functions for Marvell Orion 5x SoCs
11 #include <plat/mpp.h>
13 #include "mpp.h"
32 printk(KERN_ERR "MPP setup: unknown orion5x variant " in orion5x_variant()
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-mpp.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-mpp.yaml#
7 title: Qualcomm PMIC Multi-Purpose Pin (MPP) block
13 This binding describes the MPP block(s) found in the 8xxx series of
21 - qcom,pm8019-mpp
22 - qcom,pm8226-mpp
23 - qcom,pm8841-mpp
24 - qcom,pm8916-mpp
25 - qcom,pm8941-mpp
26 - qcom,pm8950-mpp
27 - qcom,pmi8950-mpp
[all …]
Dmarvell,mvebu-pinctrl.txt1 * Marvell SoC pinctrl core driver for mpp
4 (mpp) to a specific function. For each SoC family there is a SoC specific
13 mpp pins or group of pins and a mpp function common to all pins.
20 - marvell,pins: string array of mpp pins or group of pins to be muxed.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-mpp.txt1 Qualcomm PMIC Multi-Purpose Pin (MPP) block
3 This binding describes the MPP block(s) found in the 8xxx series
10 "qcom,pm8018-mpp",
11 "qcom,pm8038-mpp",
12 "qcom,pm8058-mpp",
13 "qcom,pm8821-mpp",
14 "qcom,pm8841-mpp",
15 "qcom,pm8916-mpp",
16 "qcom,pm8917-mpp",
17 "qcom,pm8921-mpp",
[all …]
Dmarvell,mvebu-pinctrl.txt1 * Marvell SoC pinctrl core driver for mpp
4 (mpp) to a specific function. For each SoC family there is a SoC specific
13 mpp pins or group of pins and a mpp function common to all pins.
20 - marvell,pins: string array of mpp pins or group of pins to be muxed.
/kernel/linux/linux-5.10/arch/arm/plat-orion/
Dmpp.c2 * arch/arm/plat-orion/mpp.c
4 * MPP functions for Marvell orion SoCs
17 #include <plat/mpp.h>
19 /* Address of the ith MPP control register */
34 printk(KERN_DEBUG "initial MPP regs:"); in orion_mpp_conf()
52 printk(KERN_ERR "orion_mpp_conf: invalid MPP " in orion_mpp_conf()
58 "orion_mpp_conf: requested MPP%u config " in orion_mpp_conf()
76 printk(KERN_DEBUG " final MPP regs:"); in orion_mpp_conf()
/kernel/linux/linux-6.6/arch/arm/plat-orion/
Dmpp.c2 * arch/arm/plat-orion/mpp.c
4 * MPP functions for Marvell orion SoCs
17 #include <plat/mpp.h>
19 /* Address of the ith MPP control register */
34 printk(KERN_DEBUG "initial MPP regs:"); in orion_mpp_conf()
52 printk(KERN_ERR "orion_mpp_conf: invalid MPP " in orion_mpp_conf()
58 "orion_mpp_conf: requested MPP%u config " in orion_mpp_conf()
76 printk(KERN_DEBUG " final MPP regs:"); in orion_mpp_conf()
/kernel/linux/linux-5.10/drivers/pinctrl/qcom/
Dpinctrl-spmi-mpp.c18 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
39 /* mpp peripheral type and subtype values */
104 * struct pmic_mpp_pad - keep current MPP settings
106 * @irq: IRQ number which this MPP generate.
107 * @is_enabled: Set to false when MPP should be put in high Z state.
109 * @output_enabled: Set to true if MPP output logic is enabled.
110 * @input_enabled: Set to true if MPP input buffer logic is enabled.
113 * @num_sources: Number of power-sources supported by this MPP.
526 seq_printf(s, " mpp%-2d:", pin + PMIC_MPP_PHYSICAL_OFFSET); in pmic_mpp_config_dbg_show()
690 dev_err(state->dev, "unknown MPP type 0x%x at 0x%x\n", in pmic_mpp_populate()
[all …]
Dpinctrl-ssbi-mpp.c20 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
25 /* MPP registers */
29 /* MPP Type: type */
95 * @paired: mpp operates in paired mode
96 * @output_value: logical output value of the mpp
552 "1v25", "1v25_2", "0v625", "0v3125", "mpp", "abus1", "abus2", in pm8xxx_mpp_dbg_show_one()
561 seq_printf(s, " mpp%-2d:", offset + 1); in pm8xxx_mpp_dbg_show_one()
736 { .compatible = "qcom,pm8018-mpp" },
737 { .compatible = "qcom,pm8038-mpp" },
738 { .compatible = "qcom,pm8058-mpp" },
[all …]
/kernel/linux/linux-6.6/arch/arm/plat-orion/include/plat/
Dmpp.h2 * arch/arm/plat-orion/include/plat/mpp.h
4 * Marvell Orion SoC MPP handling.
17 /* This is the generic MPP macro, without any variant information.
19 bit fields indicating which MPP configurations are valid for a
23 /* MPP number */ ((_num) & 0xff) | \
24 /* MPP select value */ (((_sel) & 0xf) << 8) | \
/kernel/linux/linux-5.10/arch/arm/plat-orion/include/plat/
Dmpp.h2 * arch/arm/plat-orion/include/plat/mpp.h
4 * Marvell Orion SoC MPP handling.
17 /* This is the generic MPP macro, without any variant information.
19 bit fields indicating which MPP configurations are valid for a
23 /* MPP number */ ((_num) & 0xff) | \
24 /* MPP select value */ (((_sel) & 0xf) << 8) | \
/kernel/linux/linux-6.6/drivers/pinctrl/qcom/
Dpinctrl-spmi-mpp.c20 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
41 /* mpp peripheral type and subtype values */
106 * struct pmic_mpp_pad - keep current MPP settings
108 * @is_enabled: Set to false when MPP should be put in high Z state.
110 * @output_enabled: Set to true if MPP output logic is enabled.
111 * @input_enabled: Set to true if MPP input buffer logic is enabled.
114 * @num_sources: Number of power-sources supported by this MPP.
526 seq_printf(s, " mpp%-2d:", pin + PMIC_MPP_PHYSICAL_OFFSET); in pmic_mpp_config_dbg_show()
679 dev_err(state->dev, "unknown MPP type 0x%x at 0x%x\n", in pmic_mpp_populate()
730 dev_err(state->dev, "unknown MPP direction\n"); in pmic_mpp_populate()
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.h13 * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations
29 * struct mvebu_mpp_ctrl - describe a mpp control
33 * @mpp_get: (optional) special function to get mpp setting
34 * @mpp_set: (optional) special function to set mpp setting
40 * between two or more different settings, e.g. assign mpp pin 13 to
62 * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
69 * A ctrl_setting describes a specific internal mux function that a mpp pin
71 * register for common mpp pin configuration registers on MVEBU. SoC specific
/kernel/linux/linux-6.6/drivers/pinctrl/mvebu/
Dpinctrl-mvebu.h13 * struct mvebu_mpp_ctrl_data - private data for the mpp ctrl operations
29 * struct mvebu_mpp_ctrl - describe a mpp control
33 * @mpp_get: (optional) special function to get mpp setting
34 * @mpp_set: (optional) special function to set mpp setting
40 * between two or more different settings, e.g. assign mpp pin 13 to
62 * struct mvebu_mpp_ctrl_setting - describe a mpp ctrl setting
69 * A ctrl_setting describes a specific internal mux function that a mpp pin
71 * register for common mpp pin configuration registers on MVEBU. SoC specific

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