Searched full:mscr (Results 1 – 11 of 11) sorted by relevance
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | nxp,s32g2-siul2-pinctrl.yaml | 20 Every SIUL2 region has multiple register types, and here only MSCR and
33 A list of MSCR/IMCR register regions to be reserved.
34 - MSCR (Multiplexed Signal Configuration Register)
35 An MSCR register can configure the associated pin as either a GPIO pin
41 - description: MSCR registers group 0 in SIUL2_0
42 - description: MSCR registers group 1 in SIUL2_1
43 - description: MSCR registers group 2 in SIUL2_1
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| /kernel/linux/linux-5.10/drivers/edac/ |
| D | cpc925_edac.c | 136 * Memory Scrub Control Register (MSCR)
867 u32 mscr; in cpc925_get_sdram_scrub_rate() local
870 mscr = __raw_readl(pdata->vbase + REG_MSCR_OFFSET); in cpc925_get_sdram_scrub_rate()
871 si = (mscr & MSCR_SI_MASK) >> MSCR_SI_SHIFT; in cpc925_get_sdram_scrub_rate()
873 edac_dbg(0, "Mem Scrub Ctrl Register 0x%x\n", mscr); in cpc925_get_sdram_scrub_rate()
875 if (((mscr & MSCR_SCRUB_MOD_MASK) != MSCR_BACKGR_SCRUB) || in cpc925_get_sdram_scrub_rate()
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| /kernel/linux/linux-6.6/drivers/edac/ |
| D | cpc925_edac.c | 136 * Memory Scrub Control Register (MSCR)
867 u32 mscr; in cpc925_get_sdram_scrub_rate() local
870 mscr = __raw_readl(pdata->vbase + REG_MSCR_OFFSET); in cpc925_get_sdram_scrub_rate()
871 si = (mscr & MSCR_SI_MASK) >> MSCR_SI_SHIFT; in cpc925_get_sdram_scrub_rate()
873 edac_dbg(0, "Mem Scrub Ctrl Register 0x%x\n", mscr); in cpc925_get_sdram_scrub_rate()
875 if (((mscr & MSCR_SCRUB_MOD_MASK) != MSCR_BACKGR_SCRUB) || in cpc925_get_sdram_scrub_rate()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/dlink/ |
| D | dl2k.c | 1504 __u16 mscr; in mii_get_media() local
1520 mscr = mii_read (dev, phy_addr, MII_CTRL1000); in mii_get_media()
1522 if (mscr & ADVERTISE_1000FULL && mssr & LPA_1000FULL) { in mii_get_media()
1526 } else if (mscr & ADVERTISE_1000HALF && mssr & LPA_1000HALF) { in mii_get_media()
1664 mscr = mii_read (dev, phy_addr, MII_CTRL1000); in mii_set_media()
1665 mscr |= MII_MSCR_CFG_ENABLE; in mii_set_media()
1666 mscr &= ~MII_MSCR_CFG_VALUE = 0; in mii_set_media()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/dlink/ |
| D | dl2k.c | 1495 __u16 mscr; in mii_get_media() local
1511 mscr = mii_read (dev, phy_addr, MII_CTRL1000); in mii_get_media()
1513 if (mscr & ADVERTISE_1000FULL && mssr & LPA_1000FULL) { in mii_get_media()
1517 } else if (mscr & ADVERTISE_1000HALF && mssr & LPA_1000HALF) { in mii_get_media()
1655 mscr = mii_read (dev, phy_addr, MII_CTRL1000); in mii_set_media()
1656 mscr |= MII_MSCR_CFG_ENABLE; in mii_set_media()
1657 mscr &= ~MII_MSCR_CFG_VALUE = 0; in mii_set_media()
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| /kernel/linux/linux-5.10/drivers/net/phy/ |
| D | marvell.c | 506 int mscr; in m88e1121_config_aneg_rgmii_delays() local
509 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | in m88e1121_config_aneg_rgmii_delays()
512 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; in m88e1121_config_aneg_rgmii_delays()
514 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; in m88e1121_config_aneg_rgmii_delays()
516 mscr = 0; in m88e1121_config_aneg_rgmii_delays()
520 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); in m88e1121_config_aneg_rgmii_delays()
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| /kernel/linux/linux-6.6/drivers/net/phy/ |
| D | marvell.c | 548 int mscr; in m88e1121_config_aneg_rgmii_delays() local
551 mscr = MII_88E1121_PHY_MSCR_RX_DELAY | in m88e1121_config_aneg_rgmii_delays()
554 mscr = MII_88E1121_PHY_MSCR_RX_DELAY; in m88e1121_config_aneg_rgmii_delays()
556 mscr = MII_88E1121_PHY_MSCR_TX_DELAY; in m88e1121_config_aneg_rgmii_delays()
558 mscr = 0; in m88e1121_config_aneg_rgmii_delays()
562 MII_88E1121_PHY_MSCR_DELAY_MASK, mscr); in m88e1121_config_aneg_rgmii_delays()
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| /kernel/linux/linux-6.6/drivers/pinctrl/nxp/ |
| D | pinctrl-s32g2.c | 714 /* MSCR pin ID ranges */
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| /kernel/linux/linux-5.10/drivers/net/ethernet/freescale/ |
| D | fec_main.c | 2122 * The i.MX28 and i.MX6 types have another filed in the MSCR (aka in fec_enet_mii_init()
2141 /* Clear MMFR to avoid to generate MII event by writing MSCR. in fec_enet_mii_init()
2143 * - writing MSCR: in fec_enet_mii_init()
2144 * - mmfr[31:0]_not_zero & mscr[7:0]_is_zero & in fec_enet_mii_init()
2147 * - mscr[7:0]_not_zero in fec_enet_mii_init()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/freescale/ |
| D | fec_main.c | 2528 * The i.MX28 and i.MX6 types have another filed in the MSCR (aka in fec_enet_mii_init()
2547 /* Clear MMFR to avoid to generate MII event by writing MSCR. in fec_enet_mii_init()
2549 * - writing MSCR: in fec_enet_mii_init()
2550 * - mmfr[31:0]_not_zero & mscr[7:0]_is_zero & in fec_enet_mii_init()
2553 * - mscr[7:0]_not_zero in fec_enet_mii_init()
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
| D | 0005_linux_include.patch | 1870 +/* VIU MSCR = 0x00000002 */
1888 +/* MSCR register numbers associated to port or function */
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