MUX_MODE7 (full) in projects: kernel - OpenGrok search results

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Searched full:mux_mode7 (Results 1 – 25 of 103) sorted by relevance

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/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/
D	am335x-shc.dts	398 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 399 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 400 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 401 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 402 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 403 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 404 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 405 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 406 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 407 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am43x-epos-evm.dts	146 AM4372_IOPAD(0x848, DS0_PIN_OUTPUT_PULLUP \| PIN_OUTPUT_PULLUP \| MUX_MODE7) 147 AM4372_IOPAD(0x850, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 148 AM4372_IOPAD(0x858, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 149 AM4372_IOPAD(0x860, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 150 AM4372_IOPAD(0x864, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 151 AM4372_IOPAD(0x868, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 152 AM4372_IOPAD(0x86c, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 153 AM4372_IOPAD(0x878, DS0_PIN_OUTPUT_PULLUP \| PIN_OUTPUT_PULLUP \| MUX_MODE7) 154 AM4372_IOPAD(0x908, DS0_PIN_INPUT_PULLDOWN \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 155 AM4372_IOPAD(0x91c, DS0_PIN_OUTPUT_PULLDOWN \| PIN_OUTPUT_PULLDOWN \| MUX_MODE7) [all …]
D	am335x-sbc-t335.dts	111 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) 113 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) 115 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) 117 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) 119 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) 121 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) 123 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) 125 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) 126 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7) 127 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7) [all …]
D	am437x-gp-evm.dts	158 …0x25C (DS0_PULL_UP_DOWN_EN \| PIN_OUTPUT_PULLUP \| DS0_FORCE_OFF_MODE \| MUX_MODE7) /* spi0_cs0.gpio5… 178 AM4372_IOPAD(0x960, PIN_INPUT \| MUX_MODE7) /* spi0_cs1.gpio0_6 / 190 AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP \| MUX_MODE7) / spi2_d0.gpio3_22 */ 215 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN \| MUX_MODE7) 216 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN \| MUX_MODE7) 217 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 218 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN \| MUX_MODE7) 219 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN \| MUX_MODE7) 220 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN \| MUX_MODE7) 221 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
D	am335x-evmsk.dts	240 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad8.lcd_data23 / 241 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad9.lcd_data22 / 242 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad10.lcd_data21 / 243 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad11.lcd_data20 / 244 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad12.lcd_data19 / 245 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad13.lcd_data18 / 246 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad14.lcd_data17 / 247 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad15.lcd_data16 */ 248 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7) 249 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7) [all …]
D	am335x-myirtech-myd.dts	316 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) 317 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) 330 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) 331 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) 343 AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 366 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_INPUT_PULLDOWN, MUX_MODE7) 367 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE7) 368 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_INPUT_PULLDOWN, MUX_MODE7) 369 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_INPUT_PULLDOWN, MUX_MODE7) 370 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-myirtech-myc.dtsi	172 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) 173 AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) 196 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 197 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 198 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 199 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 200 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 201 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 202 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 203 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am437x-sk-evm.dts	164 AM4372_IOPAD(0xa4c, PIN_OUTPUT \| MUX_MODE7) /* gpio5_13.gpio5_13 / 165 AM4372_IOPAD(0xa50, PIN_OUTPUT \| MUX_MODE7) / spi4_sclk.gpio5_4 / 166 AM4372_IOPAD(0xa54, PIN_INPUT \| MUX_MODE7) / spi4_d0.gpio5_5 / 167 AM4372_IOPAD(0xa58, PIN_INPUT \| MUX_MODE7) / spi4_d1.gpio5_5 / 173 AM4372_IOPAD(0xa28, PIN_OUTPUT \| MUX_MODE7) / uart3_rxd.gpio5_2 / 174 AM4372_IOPAD(0xa2c, PIN_OUTPUT \| MUX_MODE7) / uart3_txd.gpio5_3 / 175 AM4372_IOPAD(0xa30, PIN_OUTPUT \| MUX_MODE7) / uart3_ctsn.gpio5_0 / 176 AM4372_IOPAD(0xa34, PIN_OUTPUT \| MUX_MODE7) / uart3_rtsn.gpio5_1 / 202 AM4372_IOPAD(0x960, PIN_INPUT \| MUX_MODE7) / spi0_cs1.gpio0_6 / 214 AM4372_IOPAD(0x874, PIN_INPUT \| MUX_MODE7) / gpmc_wpn.gpio0_31 */ [all …]
D	am335x-sancloud-bbe-common.dtsi	28 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 29 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 30 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 31 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 32 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 33 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 34 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 35 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 36 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 37 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am437x-idk-evm.dts	176 AM4372_IOPAD(0x9b8, PIN_INPUT \| MUX_MODE7) /* cam0_field.gpio4_2 / 189 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN \| MUX_MODE7) 190 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 203 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN \| MUX_MODE7) 204 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN \| MUX_MODE7) 216 AM4372_IOPAD(0x960, PIN_INPUT \| MUX_MODE7) / spi0_cs1.gpio0_6 */ 222 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN \| MUX_MODE7) 223 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN \| MUX_MODE7) 224 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN \| MUX_MODE7) 225 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
D	am335x-chiliboard.dts	63 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) 64 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 65 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 66 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 67 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 68 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 69 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 70 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 71 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 87 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-lxm.dts	65 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_int / 83 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii2_int / 91 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_int / 92 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_crs_dv / 93 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_rxer / 94 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_txen / 95 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_td1 / 96 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_td0 / 97 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_rd1 / 98 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_rd0 */ [all …]
D	am335x-sl50.dts	228 …AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLDOWN, MUX_MODE7) /* SoundPA_en - mcasp0_aclk… 234 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.gpio1_27 / 240 AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7) / gpmc_wen.gpio2_4 / 246 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) / gpmc_ad10.gpio0_26 / 277 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) / gpmc_a5.gpio1_21 / 278 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) / gpmc_a6.gpio1_22 / 279 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) / gpmc_a7.gpio1_23 / 280 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) / gpmc_a8.gpio1_24 */ 341 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 342 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
D	am335x-shc.dts	394 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 395 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 396 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 397 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 398 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 399 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 400 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 401 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 402 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 403 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am43x-epos-evm.dts	146 AM4372_IOPAD(0x848, DS0_PIN_OUTPUT_PULLUP \| PIN_OUTPUT_PULLUP \| MUX_MODE7) 147 AM4372_IOPAD(0x850, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 148 AM4372_IOPAD(0x858, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 149 AM4372_IOPAD(0x860, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 150 AM4372_IOPAD(0x864, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 151 AM4372_IOPAD(0x868, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 152 AM4372_IOPAD(0x86c, DS0_PIN_INPUT \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 153 AM4372_IOPAD(0x878, DS0_PIN_OUTPUT_PULLUP \| PIN_OUTPUT_PULLUP \| MUX_MODE7) 154 AM4372_IOPAD(0x908, DS0_PIN_INPUT_PULLDOWN \| PIN_INPUT_PULLDOWN \| MUX_MODE7) 155 AM4372_IOPAD(0x91c, DS0_PIN_OUTPUT_PULLDOWN \| PIN_OUTPUT_PULLDOWN \| MUX_MODE7) [all …]
D	am335x-sbc-t335.dts	111 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) 113 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) 115 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) 117 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) 119 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) 121 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) 123 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) 125 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) 126 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7) 127 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7) [all …]
D	am437x-gp-evm.dts	158 …0x25C (DS0_PULL_UP_DOWN_EN \| PIN_OUTPUT_PULLUP \| DS0_FORCE_OFF_MODE \| MUX_MODE7) /* spi0_cs0.gpio5… 178 AM4372_IOPAD(0x960, PIN_INPUT \| MUX_MODE7) /* spi0_cs1.gpio0_6 / 190 AM4372_IOPAD(0xa64, PIN_INPUT_PULLUP \| MUX_MODE7) / spi2_d0.gpio3_22 */ 215 AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN \| MUX_MODE7) 216 AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN \| MUX_MODE7) 217 AM4372_IOPAD(0x91c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 218 AM4372_IOPAD(0x920, PIN_INPUT_PULLDOWN \| MUX_MODE7) 219 AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN \| MUX_MODE7) 220 AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN \| MUX_MODE7) 221 AM4372_IOPAD(0x92c, PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
D	am335x-evmsk.dts	240 AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_ad8.lcd_data23 / 241 AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad9.lcd_data22 / 242 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad10.lcd_data21 / 243 AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad11.lcd_data20 / 244 AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad12.lcd_data19 / 245 AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad13.lcd_data18 / 246 AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad14.lcd_data17 / 247 AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) / gpmc_ad15.lcd_data16 */ 248 AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PULL_DISABLE, MUX_MODE7) 249 AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PULL_DISABLE, MUX_MODE7) [all …]
D	am437x-sk-evm.dts	164 AM4372_IOPAD(0xa4c, PIN_OUTPUT \| MUX_MODE7) /* gpio5_13.gpio5_13 / 165 AM4372_IOPAD(0xa50, PIN_OUTPUT \| MUX_MODE7) / spi4_sclk.gpio5_4 / 166 AM4372_IOPAD(0xa54, PIN_INPUT \| MUX_MODE7) / spi4_d0.gpio5_5 / 167 AM4372_IOPAD(0xa58, PIN_INPUT \| MUX_MODE7) / spi4_d1.gpio5_5 / 173 AM4372_IOPAD(0xa28, PIN_OUTPUT \| MUX_MODE7) / uart3_rxd.gpio5_2 / 174 AM4372_IOPAD(0xa2c, PIN_OUTPUT \| MUX_MODE7) / uart3_txd.gpio5_3 / 175 AM4372_IOPAD(0xa30, PIN_OUTPUT \| MUX_MODE7) / uart3_ctsn.gpio5_0 / 176 AM4372_IOPAD(0xa34, PIN_OUTPUT \| MUX_MODE7) / uart3_rtsn.gpio5_1 / 202 AM4372_IOPAD(0x960, PIN_INPUT \| MUX_MODE7) / spi0_cs1.gpio0_6 / 214 AM4372_IOPAD(0x874, PIN_INPUT \| MUX_MODE7) / gpmc_wpn.gpio0_31 */ [all …]
D	am335x-sancloud-bbe.dts	41 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 42 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 43 AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 44 AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 45 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 46 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 47 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 48 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 49 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 50 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am437x-idk-evm.dts	178 AM4372_IOPAD(0x9b8, PIN_INPUT \| MUX_MODE7) /* cam0_field.gpio4_2 / 191 AM4372_IOPAD(0x988, PIN_INPUT_PULLDOWN \| MUX_MODE7) 192 AM4372_IOPAD(0x98c, PIN_INPUT_PULLDOWN \| MUX_MODE7) 205 AM4372_IOPAD(0x9e8, PIN_INPUT_PULLDOWN \| MUX_MODE7) 206 AM4372_IOPAD(0x9ec, PIN_INPUT_PULLDOWN \| MUX_MODE7) 218 AM4372_IOPAD(0x960, PIN_INPUT \| MUX_MODE7) / spi0_cs1.gpio0_6 */ 224 AM4372_IOPAD(0x900, PIN_INPUT_PULLDOWN \| MUX_MODE7) 225 AM4372_IOPAD(0x904, PIN_INPUT_PULLDOWN \| MUX_MODE7) 226 AM4372_IOPAD(0x9f0, PIN_INPUT_PULLDOWN \| MUX_MODE7) 227 AM4372_IOPAD(0x9f4, PIN_INPUT_PULLDOWN \| MUX_MODE7) [all …]
D	am335x-chiliboard.dts	63 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) 64 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 65 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 66 AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 67 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 68 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 69 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 70 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 71 AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 87 AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-lxm.dts	65 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) /* rmii1_int / 83 AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii2_int / 91 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_int / 92 AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_crs_dv / 93 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_rxer / 94 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_txen / 95 AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_td1 / 96 AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_td0 / 97 AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_rd1 / 98 AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) / rmii1_rd0 */ [all …]
D	am335x-sl50.dts	228 …AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLDOWN, MUX_MODE7) /* SoundPA_en - mcasp0_aclk… 234 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.gpio1_27 / 240 AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE7) / gpmc_wen.gpio2_4 / 246 AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) / gpmc_ad10.gpio0_26 / 277 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) / gpmc_a5.gpio1_21 / 278 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) / gpmc_a6.gpio1_22 / 279 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) / gpmc_a7.gpio1_23 / 280 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) / gpmc_a8.gpio1_24 */ 341 AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 342 AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) [all …]
D	am335x-guardian.dts	355 AM33XX_IOPAD(0x940, PIN_INPUT \| MUX_MODE7) 361 AM33XX_IOPAD(0x928, PIN_OUTPUT \| MUX_MODE7) 362 AM33XX_IOPAD(0x990, PIN_OUTPUT \| MUX_MODE7) 375 AM33XX_IOPAD(0x9a4, PIN_OUTPUT_PULLUP \| SLEWCTRL_SLOW \| MUX_MODE7) 414 AM33XX_IOPAD(0x8a0, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) 415 AM33XX_IOPAD(0x8a4, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) 416 AM33XX_IOPAD(0x8a8, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) 417 AM33XX_IOPAD(0x8ac, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) 418 AM33XX_IOPAD(0x8b0, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) 419 AM33XX_IOPAD(0x8b4, PULL_DISABLE \| SLEWCTRL_SLOW \| MUX_MODE7) [all …]

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