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/kernel/linux/linux-5.10/drivers/clk/
Dclk-multiplier.c15 static inline u32 clk_mult_readl(struct clk_multiplier *mult) in clk_mult_readl() argument
17 if (mult->flags & CLK_MULTIPLIER_BIG_ENDIAN) in clk_mult_readl()
18 return ioread32be(mult->reg); in clk_mult_readl()
20 return readl(mult->reg); in clk_mult_readl()
23 static inline void clk_mult_writel(struct clk_multiplier *mult, u32 val) in clk_mult_writel() argument
25 if (mult->flags & CLK_MULTIPLIER_BIG_ENDIAN) in clk_mult_writel()
26 iowrite32be(val, mult->reg); in clk_mult_writel()
28 writel(val, mult->reg); in clk_mult_writel()
31 static unsigned long __get_mult(struct clk_multiplier *mult, in __get_mult() argument
35 if (mult->flags & CLK_MULTIPLIER_ROUND_CLOSEST) in __get_mult()
[all …]
Dclk-fixed-factor.c18 * rate - rate is fixed. clk->rate = parent->rate / div * mult
28 rate = (unsigned long long int)parent_rate * fix->mult; in clk_factor_recalc_rate()
41 best_parent = (rate / fix->mult) * fix->div; in clk_factor_round_rate()
45 return (*prate / fix->div) * fix->mult; in clk_factor_round_rate()
70 unsigned long flags, unsigned int mult, unsigned int div) in __clk_hw_register_fixed_factor() argument
83 fix->mult = mult; in __clk_hw_register_fixed_factor()
111 unsigned int mult, unsigned int div) in clk_hw_register_fixed_factor() argument
114 flags, mult, div); in clk_hw_register_fixed_factor()
120 unsigned int mult, unsigned int div) in clk_register_fixed_factor() argument
124 hw = clk_hw_register_fixed_factor(dev, name, parent_name, flags, mult, in clk_register_fixed_factor()
[all …]
/kernel/linux/linux-6.6/drivers/clk/
Dclk-multiplier.c15 static inline u32 clk_mult_readl(struct clk_multiplier *mult) in clk_mult_readl() argument
17 if (mult->flags & CLK_MULTIPLIER_BIG_ENDIAN) in clk_mult_readl()
18 return ioread32be(mult->reg); in clk_mult_readl()
20 return readl(mult->reg); in clk_mult_readl()
23 static inline void clk_mult_writel(struct clk_multiplier *mult, u32 val) in clk_mult_writel() argument
25 if (mult->flags & CLK_MULTIPLIER_BIG_ENDIAN) in clk_mult_writel()
26 iowrite32be(val, mult->reg); in clk_mult_writel()
28 writel(val, mult->reg); in clk_mult_writel()
31 static unsigned long __get_mult(struct clk_multiplier *mult, in __get_mult() argument
35 if (mult->flags & CLK_MULTIPLIER_ROUND_CLOSEST) in __get_mult()
[all …]
Dclk-fixed-factor.c18 * rate - rate is fixed. clk->rate = parent->rate / div * mult
28 rate = (unsigned long long int)parent_rate * fix->mult; in clk_factor_recalc_rate()
41 best_parent = (rate / fix->mult) * fix->div; in clk_factor_round_rate()
45 return (*prate / fix->div) * fix->mult; in clk_factor_round_rate()
83 unsigned long flags, unsigned int mult, unsigned int div, in __clk_hw_register_fixed_factor() argument
105 fix->mult = mult; in __clk_hw_register_fixed_factor()
144 * @mult: multiplier
152 unsigned int mult, unsigned int div) in devm_clk_hw_register_fixed_factor_index() argument
155 flags, mult, div, true); in devm_clk_hw_register_fixed_factor_index()
166 * @mult: multiplier
[all …]
/kernel/linux/linux-5.10/drivers/clk/sunxi-ng/
Dccu_mult.c14 unsigned long mult, min, max; member
18 struct _ccu_mult *mult) in ccu_mult_find_best() argument
23 if (_mult < mult->min) in ccu_mult_find_best()
24 _mult = mult->min; in ccu_mult_find_best()
26 if (_mult > mult->max) in ccu_mult_find_best()
27 _mult = mult->max; in ccu_mult_find_best()
29 mult->mult = _mult; in ccu_mult_find_best()
41 _cm.min = cm->mult.min; in ccu_mult_round_rate()
43 if (cm->mult.max) in ccu_mult_round_rate()
44 _cm.max = cm->mult.max; in ccu_mult_round_rate()
[all …]
/kernel/linux/linux-6.6/drivers/clk/sunxi-ng/
Dccu_mult.c14 unsigned long mult, min, max; member
18 struct _ccu_mult *mult) in ccu_mult_find_best() argument
23 if (_mult < mult->min) in ccu_mult_find_best()
24 _mult = mult->min; in ccu_mult_find_best()
26 if (_mult > mult->max) in ccu_mult_find_best()
27 _mult = mult->max; in ccu_mult_find_best()
29 mult->mult = _mult; in ccu_mult_find_best()
41 _cm.min = cm->mult.min; in ccu_mult_round_rate()
43 if (cm->mult.max) in ccu_mult_round_rate()
44 _cm.max = cm->mult.max; in ccu_mult_round_rate()
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/kernel/linux/linux-6.6/drivers/clk/renesas/
Drcar-gen4-cpg.c48 #define CPG_PLLxCR0_NI GENMASK(27, 20) /* Integer mult. factor */
74 unsigned int mult; in cpg_pll_clk_recalc_rate() local
76 mult = FIELD_GET(CPG_PLLxCR0_NI, readl(pll_clk->pllcr0_reg)) + 1; in cpg_pll_clk_recalc_rate()
78 return parent_rate * mult * 2; in cpg_pll_clk_recalc_rate()
84 unsigned int min_mult, max_mult, mult; in cpg_pll_clk_determine_rate() local
93 mult = DIV_ROUND_CLOSEST_ULL(req->rate, prate); in cpg_pll_clk_determine_rate()
94 mult = clamp(mult, min_mult, max_mult); in cpg_pll_clk_determine_rate()
96 req->rate = prate * mult; in cpg_pll_clk_determine_rate()
104 unsigned int mult; in cpg_pll_clk_set_rate() local
107 mult = DIV_ROUND_CLOSEST_ULL(rate, parent_rate * 2); in cpg_pll_clk_set_rate()
[all …]
Drcar-gen3-cpg.c37 #define CPG_PLLnCR_STC_MASK GENMASK(30, 24) /* PLL Circuit Mult. Ratio */
56 unsigned int mult; in cpg_pll_clk_recalc_rate() local
60 mult = (val >> __ffs(CPG_PLLnCR_STC_MASK)) + 1; in cpg_pll_clk_recalc_rate()
62 return parent_rate * mult * pll_clk->fixed_mult; in cpg_pll_clk_recalc_rate()
69 unsigned int min_mult, max_mult, mult; in cpg_pll_clk_determine_rate() local
78 mult = DIV_ROUND_CLOSEST_ULL(req->rate, prate); in cpg_pll_clk_determine_rate()
79 mult = clamp(mult, min_mult, max_mult); in cpg_pll_clk_determine_rate()
81 req->rate = prate * mult; in cpg_pll_clk_determine_rate()
89 unsigned int mult, i; in cpg_pll_clk_set_rate() local
92 mult = DIV_ROUND_CLOSEST_ULL(rate, parent_rate * pll_clk->fixed_mult); in cpg_pll_clk_set_rate()
[all …]
Drcar-gen2-cpg.c41 * rate - rate is adjustable. clk->rate = parent->rate * mult / 32
57 unsigned int mult; in cpg_z_clk_recalc_rate() local
61 mult = 32 - val; in cpg_z_clk_recalc_rate()
63 return div_u64((u64)parent_rate * mult, 32); in cpg_z_clk_recalc_rate()
70 unsigned int min_mult, max_mult, mult; in cpg_z_clk_determine_rate() local
77 mult = div64_ul(req->rate * 32ULL, prate); in cpg_z_clk_determine_rate()
78 mult = clamp(mult, min_mult, max_mult); in cpg_z_clk_determine_rate()
80 req->rate = div_u64((u64)prate * mult, 32); in cpg_z_clk_determine_rate()
88 unsigned int mult; in cpg_z_clk_set_rate() local
92 mult = div64_ul(rate * 32ULL, parent_rate); in cpg_z_clk_set_rate()
[all …]
/kernel/linux/linux-6.6/drivers/clk/imx/
Dclk-pllv4.c50 /* Valid PLL MULT Table */
53 /* Valid PLL MULT range, (max, min) */
82 u32 mult, mfn, mfd; in clk_pllv4_recalc_rate() local
85 mult = readl_relaxed(pll->base + pll->cfg_offset); in clk_pllv4_recalc_rate()
86 mult &= BM_PLL_MULT; in clk_pllv4_recalc_rate()
87 mult >>= BP_PLL_MULT; in clk_pllv4_recalc_rate()
95 return (parent_rate * mult) + (u32)temp64; in clk_pllv4_recalc_rate()
107 u32 mult; in clk_pllv4_round_rate() local
112 mult = temp64; in clk_pllv4_round_rate()
113 if (mult >= pllv4_mult_range[1] && in clk_pllv4_round_rate()
[all …]
/kernel/linux/linux-6.6/drivers/iio/common/inv_sensors/
Dinv_sensors_timestamp.c52 ts->mult = chip->init_period / chip->clock_period; in inv_sensors_timestamp_init()
63 uint32_t mult; in inv_sensors_timestamp_update_odr() local
69 mult = period / ts->chip.clock_period; in inv_sensors_timestamp_update_odr()
70 if (mult != ts->mult) in inv_sensors_timestamp_update_odr()
71 ts->new_mult = mult; in inv_sensors_timestamp_update_odr()
81 static bool inv_validate_period(struct inv_sensors_timestamp *ts, uint32_t period, uint32_t mult) in inv_validate_period() argument
86 period_min = ts->min_period * mult; in inv_validate_period()
87 period_max = ts->max_period * mult; in inv_validate_period()
95 uint32_t mult, uint32_t period) in inv_update_chip_period() argument
99 if (!inv_validate_period(ts, period, mult)) in inv_update_chip_period()
[all …]
/kernel/linux/linux-5.10/drivers/clk/renesas/
Drcar-gen2-cpg.c41 * rate - rate is adjustable. clk->rate = parent->rate * mult / 32
57 unsigned int mult; in cpg_z_clk_recalc_rate() local
61 mult = 32 - val; in cpg_z_clk_recalc_rate()
63 return div_u64((u64)parent_rate * mult, 32); in cpg_z_clk_recalc_rate()
70 unsigned int min_mult, max_mult, mult; in cpg_z_clk_determine_rate() local
77 mult = div64_ul(req->rate * 32ULL, prate); in cpg_z_clk_determine_rate()
78 mult = clamp(mult, min_mult, max_mult); in cpg_z_clk_determine_rate()
80 req->rate = div_u64((u64)prate * mult, 32); in cpg_z_clk_determine_rate()
88 unsigned int mult; in cpg_z_clk_set_rate() local
92 mult = div64_ul(rate * 32ULL, parent_rate); in cpg_z_clk_set_rate()
[all …]
Drcar-gen3-cpg.c86 * rate - rate is adjustable. clk->rate = (parent->rate * mult / 32 ) / 2
107 unsigned int mult; in cpg_z_clk_recalc_rate() local
111 mult = 32 - (val >> __ffs(zclk->mask)); in cpg_z_clk_recalc_rate()
113 return DIV_ROUND_CLOSEST_ULL((u64)parent_rate * mult, in cpg_z_clk_recalc_rate()
121 unsigned int min_mult, max_mult, mult; in cpg_z_clk_determine_rate() local
130 mult = div64_ul(req->rate * 32ULL, prate); in cpg_z_clk_determine_rate()
131 mult = clamp(mult, min_mult, max_mult); in cpg_z_clk_determine_rate()
133 req->rate = div_u64((u64)prate * mult, 32); in cpg_z_clk_determine_rate()
141 unsigned int mult; in cpg_z_clk_set_rate() local
144 mult = DIV64_U64_ROUND_CLOSEST(rate * 32ULL * zclk->fixed_div, in cpg_z_clk_set_rate()
[all …]
/kernel/linux/linux-6.6/drivers/clk/sunxi/
Dclk-sun4i-pll3.c24 struct clk_multiplier *mult; in sun4i_a10_pll3_setup() local
48 mult = kzalloc(sizeof(*mult), GFP_KERNEL); in sun4i_a10_pll3_setup()
49 if (!mult) in sun4i_a10_pll3_setup()
52 mult->reg = reg; in sun4i_a10_pll3_setup()
53 mult->shift = SUN4I_A10_PLL3_DIV_SHIFT; in sun4i_a10_pll3_setup()
54 mult->width = SUN4I_A10_PLL3_DIV_WIDTH; in sun4i_a10_pll3_setup()
55 mult->lock = &sun4i_a10_pll3_lock; in sun4i_a10_pll3_setup()
60 &mult->hw, &clk_multiplier_ops, in sun4i_a10_pll3_setup()
80 kfree(mult); in sun4i_a10_pll3_setup()
Dclk-a10-pll2.c44 struct clk_multiplier *mult; in sun4i_pll2_setup() local
83 mult = kzalloc(sizeof(struct clk_multiplier), GFP_KERNEL); in sun4i_pll2_setup()
84 if (!mult) in sun4i_pll2_setup()
87 mult->reg = reg; in sun4i_pll2_setup()
88 mult->shift = SUN4I_PLL2_N_SHIFT; in sun4i_pll2_setup()
89 mult->width = 7; in sun4i_pll2_setup()
90 mult->flags = CLK_MULTIPLIER_ZERO_BYPASS | in sun4i_pll2_setup()
92 mult->lock = &sun4i_a10_pll2_lock; in sun4i_pll2_setup()
98 &mult->hw, &clk_multiplier_ops, in sun4i_pll2_setup()
168 kfree(mult); in sun4i_pll2_setup()
/kernel/linux/linux-5.10/drivers/clk/sunxi/
Dclk-sun4i-pll3.c24 struct clk_multiplier *mult; in sun4i_a10_pll3_setup() local
48 mult = kzalloc(sizeof(*mult), GFP_KERNEL); in sun4i_a10_pll3_setup()
49 if (!mult) in sun4i_a10_pll3_setup()
52 mult->reg = reg; in sun4i_a10_pll3_setup()
53 mult->shift = SUN4I_A10_PLL3_DIV_SHIFT; in sun4i_a10_pll3_setup()
54 mult->width = SUN4I_A10_PLL3_DIV_WIDTH; in sun4i_a10_pll3_setup()
55 mult->lock = &sun4i_a10_pll3_lock; in sun4i_a10_pll3_setup()
60 &mult->hw, &clk_multiplier_ops, in sun4i_a10_pll3_setup()
80 kfree(mult); in sun4i_a10_pll3_setup()
Dclk-a10-pll2.c44 struct clk_multiplier *mult; in sun4i_pll2_setup() local
83 mult = kzalloc(sizeof(struct clk_multiplier), GFP_KERNEL); in sun4i_pll2_setup()
84 if (!mult) in sun4i_pll2_setup()
87 mult->reg = reg; in sun4i_pll2_setup()
88 mult->shift = SUN4I_PLL2_N_SHIFT; in sun4i_pll2_setup()
89 mult->width = 7; in sun4i_pll2_setup()
90 mult->flags = CLK_MULTIPLIER_ZERO_BYPASS | in sun4i_pll2_setup()
92 mult->lock = &sun4i_a10_pll2_lock; in sun4i_pll2_setup()
98 &mult->hw, &clk_multiplier_ops, in sun4i_pll2_setup()
168 kfree(mult); in sun4i_pll2_setup()
/kernel/linux/linux-5.10/drivers/clk/imx/
Dclk-pllv4.c43 /* Valid PLL MULT Table */
72 u32 mult, mfn, mfd; in clk_pllv4_recalc_rate() local
75 mult = readl_relaxed(pll->base + PLL_CFG_OFFSET); in clk_pllv4_recalc_rate()
76 mult &= BM_PLL_MULT; in clk_pllv4_recalc_rate()
77 mult >>= BP_PLL_MULT; in clk_pllv4_recalc_rate()
85 return (parent_rate * mult) + (u32)temp64; in clk_pllv4_recalc_rate()
135 static bool clk_pllv4_is_valid_mult(unsigned int mult) in clk_pllv4_is_valid_mult() argument
139 /* check if mult is in valid MULT table */ in clk_pllv4_is_valid_mult()
141 if (pllv4_mult_table[i] == mult) in clk_pllv4_is_valid_mult()
152 u32 val, mult, mfn, mfd = DEFAULT_MFD; in clk_pllv4_set_rate() local
[all …]
/kernel/linux/linux-5.10/drivers/clk/mvebu/
Dorion.c60 int *mult, int *div) in mv88f5181_get_clk_ratio() argument
65 *mult = 1; in mv88f5181_get_clk_ratio()
68 *mult = 1; in mv88f5181_get_clk_ratio()
71 *mult = 0; in mv88f5181_get_clk_ratio()
128 int *mult, int *div) in mv88f5182_get_clk_ratio() argument
133 *mult = 1; in mv88f5182_get_clk_ratio()
136 *mult = 1; in mv88f5182_get_clk_ratio()
139 *mult = 0; in mv88f5182_get_clk_ratio()
185 int *mult, int *div) in mv88f5281_get_clk_ratio() argument
190 *mult = 1; in mv88f5281_get_clk_ratio()
[all …]
/kernel/linux/linux-6.6/drivers/clk/mvebu/
Dorion.c60 int *mult, int *div) in mv88f5181_get_clk_ratio() argument
65 *mult = 1; in mv88f5181_get_clk_ratio()
68 *mult = 1; in mv88f5181_get_clk_ratio()
71 *mult = 0; in mv88f5181_get_clk_ratio()
128 int *mult, int *div) in mv88f5182_get_clk_ratio() argument
133 *mult = 1; in mv88f5182_get_clk_ratio()
136 *mult = 1; in mv88f5182_get_clk_ratio()
139 *mult = 0; in mv88f5182_get_clk_ratio()
185 int *mult, int *div) in mv88f5281_get_clk_ratio() argument
190 *mult = 1; in mv88f5281_get_clk_ratio()
[all …]
/kernel/linux/linux-5.10/include/linux/
Dclocksource.h41 * @mult: Cycle to nanosecond multiplier
44 * @maxadj: Maximum adjustment value to mult (~11%)
94 u32 mult; member
144 * mult/2^shift = ns/cyc in clocksource_freq2mult()
145 * mult = ns/cyc * 2^shift in clocksource_freq2mult()
146 * mult = from/freq * 2^shift in clocksource_freq2mult()
147 * mult = from * 2^shift / freq in clocksource_freq2mult()
148 * mult = (from<<shift) / freq in clocksource_freq2mult()
159 * clocksource_khz2mult - calculates mult from khz and shift
172 * clocksource_hz2mult - calculates mult from hz and shift
[all …]
/kernel/linux/linux-6.6/include/linux/
Dclocksource.h42 * @mult: Cycle to nanosecond multiplier
45 * @maxadj: Maximum adjustment value to mult (~11%)
99 u32 mult; member
150 * mult/2^shift = ns/cyc in clocksource_freq2mult()
151 * mult = ns/cyc * 2^shift in clocksource_freq2mult()
152 * mult = from/freq * 2^shift in clocksource_freq2mult()
153 * mult = from * 2^shift / freq in clocksource_freq2mult()
154 * mult = (from<<shift) / freq in clocksource_freq2mult()
165 * clocksource_khz2mult - calculates mult from khz and shift
178 * clocksource_hz2mult - calculates mult from hz and shift
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Domap36xx-omap3430es2plus-clocks.dtsi35 clock-mult = <1>;
51 clock-mult = <1>;
75 clock-mult = <1>;
83 clock-mult = <1>;
91 clock-mult = <1>;
99 clock-mult = <1>;
107 clock-mult = <1>;
115 clock-mult = <1>;
123 clock-mult = <1>;
131 clock-mult = <1>;
[all …]
Dam33xx-clocks.dtsi20 clock-mult = <1>;
28 clock-mult = <1>;
36 clock-mult = <1>;
44 clock-mult = <1>;
52 clock-mult = <1>;
60 clock-mult = <1>;
68 clock-mult = <1>;
76 clock-mult = <1>;
84 clock-mult = <1>;
92 clock-mult = <1>;
[all …]
/kernel/linux/linux-6.6/sound/core/
Dpcm_timer.c21 unsigned long rate, mult, fsize, l, post; in snd_pcm_timer_resolution_change() local
24 mult = 1000000000; in snd_pcm_timer_resolution_change()
28 l = gcd(mult, rate); in snd_pcm_timer_resolution_change()
29 mult /= l; in snd_pcm_timer_resolution_change()
38 while ((mult * fsize) / fsize != mult) { in snd_pcm_timer_resolution_change()
39 mult /= 2; in snd_pcm_timer_resolution_change()
49 runtime->timer_resolution = (mult * fsize / rate) * post; in snd_pcm_timer_resolution_change()

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