Searched +full:nand +full:- +full:related (Results 1 – 25 of 87) sorted by relevance
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | marvell-nand.txt | 1 Marvell NAND Flash Controller (NFC)
4 - compatible: can be one of the following:
5 * "marvell,armada-8k-nand-controller"
6 * "marvell,armada370-nand-controller"
7 * "marvell,pxa3xx-nand-controller"
8 * "marvell,armada-8k-nand" (deprecated)
9 * "marvell,armada370-nand" (deprecated)
10 * "marvell,pxa3xx-nand" (deprecated)
13 - reg: NAND flash controller memory area.
14 - #address-cells: shall be set to 1. Encode the NAND CS.
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| D | mtk-nand.txt | 1 MTK SoCs NAND FLASH controller (NFC) DT binding
3 This file documents the device tree bindings for MTK SoCs NAND controllers.
5 the nand controller interface driver and the ECC engine driver.
10 1) NFC NAND Controller Interface (NFI):
13 The first part of NFC is NAND Controller Interface (NFI) HW.
15 - compatible: Should be one of
16 "mediatek,mt2701-nfc",
17 "mediatek,mt2712-nfc",
18 "mediatek,mt7622-nfc".
19 - reg: Base physical address and size of NFI.
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| D | brcm,brcmnand.txt | 1 * Broadcom STB NAND Controller
3 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
4 flash chips. It has a memory-mapped register interface for both control
15 - compatible : May contain an SoC-specific compatibility string (see below)
16 to account for any SoC-specific hardware bits that may be
19 the core NAND controller, of the following form:
21 string, like "brcm,brcmnand-v7.0"
23 brcm,brcmnand-v2.1
24 brcm,brcmnand-v2.2
25 brcm,brcmnand-v4.0
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | marvell,nand-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/marvell,nand-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell NAND Flash Controller (NFC)
10 - Miquel Raynal <miquel.raynal@bootlin.com>
15 - items:
16 - const: marvell,armada-8k-nand-controller
17 - const: marvell,armada370-nand-controller
18 - enum:
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| D | brcm,brcmnand.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom STB NAND Controller
10 - Brian Norris <computersforpeace@gmail.com>
11 - Kamal Dasu <kdasu.kdev@gmail.com>
14 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
15 flash chips. It has a memory-mapped register interface for both control
25 -- Additional SoC-specific NAND controller properties --
27 The NAND controller is integrated differently on the variety of SoCs on which
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| /kernel/linux/linux-5.10/Documentation/driver-api/ |
| D | mtdnand.rst | 2 MTD NAND Driver Programming Interface
10 The generic NAND driver supports almost all NAND and AG-AND based chips
15 board drivers or filesystem drivers suitable for NAND devices.
31 --------------------------
37 - [MTD Interface]
43 - [NAND Interface]
45 These functions are exported and provide the interface to the NAND
48 - [GENERIC]
53 - [DEFAULT]
55 Default functions provide hardware related functionality which is
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| /kernel/linux/linux-6.6/Documentation/driver-api/ |
| D | mtdnand.rst | 2 MTD NAND Driver Programming Interface
10 The generic NAND driver supports almost all NAND and AG-AND based chips
15 board drivers or filesystem drivers suitable for NAND devices.
31 --------------------------
37 - [MTD Interface]
43 - [NAND Interface]
45 These functions are exported and provide the interface to the NAND
48 - [GENERIC]
53 - [DEFAULT]
55 Default functions provide hardware related functionality which is
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| /kernel/linux/linux-6.6/include/linux/mtd/ |
| D | nand.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2017 - Free Electrons
6 * Boris Brezillon <boris.brezillon@free-electrons.com>
18 * struct nand_memory_organization - Memory organization structure
19 * @bits_per_cell: number of bits per NAND cell
27 * @ntargets: total number of targets exposed by the NAND device
55 * struct nand_row_converter - Information needed to convert an absolute offset
67 * struct nand_pos - NAND position object
68 * @target: the NAND target/die
74 * These information are usually used by specific sub-layers to select the
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| D | rawnand.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
8 * Contains standard defines and IDs for NAND flash devices
17 #include <linux/mtd/nand.h>
29 /* The maximum number of NAND chips in an array */
50 * Standard NAND flash commands
75 #define NAND_CMD_NONE -1
84 #define NAND_DATA_IFACE_CHECK_ONLY -1
97 * Enable generic NAND 'page erased' check. This check is only done when
98 * ecc.correct() returns -EBADMSG.
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| D | sh_flctl.h | 1 /* SPDX-License-Identifier: GPL-2.0
3 * SuperH FLCTL nand controller
18 #define FLCMNCR(f) (f->reg + 0x0)
19 #define FLCMDCR(f) (f->reg + 0x4)
20 #define FLCMCDR(f) (f->reg + 0x8)
21 #define FLADR(f) (f->reg + 0xC)
22 #define FLADR2(f) (f->reg + 0x3C)
23 #define FLDATAR(f) (f->reg + 0x10)
24 #define FLDTCNTR(f) (f->reg + 0x14)
25 #define FLINTDMACR(f) (f->reg + 0x18)
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| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| D | fsmc_nand.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Driver for NAND portions
11 * Based on drivers/mtd/nand/nomadik_nand.c (removed in v3.8)
20 #include <linux/dma-direction.h>
21 #include <linux/dma-mapping.h>
29 #include <linux/mtd/nand-ecc-sw-hamming.h>
37 #include <mtd/mtd-abi.h>
61 /* fsmc controller registers for NAND flash */
99 * TOUDEL = 7ns (Output delay from the flip-flops to the board)
120 * struct fsmc_nand_data - structure for FSMC NAND device state
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| D | sunxi_nand.c | 1 // SPDX-License-Identifier: GPL-2.0+
6 * https://github.com/yuq/sunxi-nfc-mtd
9 * https://github.com/hno/Allwinner-Info
16 #include <linux/dma-mapping.h>
70 #define NFC_PAGE_SHIFT(x) (((x) < 10 ? 0 : (x) - 10) << 8)
107 #define NFC_ADR_NUM(x) (((x) - 1) << 16)
161 * struct sunxi_nand_chip_sel - stores information related to NAND Chip Select
163 * @cs: the NAND CS id used to communicate with a NAND Chip
164 * @rb: the Ready/Busy pin ID. -1 means no R/B pin connected to the NFC
172 * struct sunxi_nand_hw_ecc - stores information related to HW ECC support
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| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | fsmc_nand.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Driver for NAND portions
11 * Based on drivers/mtd/nand/nomadik_nand.c (removed in v3.8)
20 #include <linux/dma-direction.h>
21 #include <linux/dma-mapping.h>
37 #include <mtd/mtd-abi.h>
61 /* fsmc controller registers for NAND flash */
99 * TOUDEL = 7ns (Output delay from the flip-flops to the board)
120 * struct fsmc_nand_data - structure for FSMC NAND device state
124 * @nand: Chip related info for a NAND flash.
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| D | sunxi_nand.c | 1 // SPDX-License-Identifier: GPL-2.0+
6 * https://github.com/yuq/sunxi-nfc-mtd
9 * https://github.com/hno/Allwinner-Info
16 #include <linux/dma-mapping.h>
70 #define NFC_PAGE_SHIFT(x) (((x) < 10 ? 0 : (x) - 10) << 8)
107 #define NFC_ADR_NUM(x) (((x) - 1) << 16)
161 * struct sunxi_nand_chip_sel - stores information related to NAND Chip Select
163 * @cs: the NAND CS id used to communicate with a NAND Chip
164 * @rb: the Ready/Busy pin ID. -1 means no R/B pin connected to the NFC
172 * struct sunxi_nand_hw_ecc - stores information related to HW ECC support
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| /kernel/linux/linux-6.6/drivers/pinctrl/ |
| D | pinctrl-xway.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinmux-xway.c
4 * based on linux/drivers/pinctrl/pinmux-pxa910.c
21 #include "pinctrl-lantiq.h"
110 /* --------- ase related code --------- */
238 /* --------- danube related code --------- */
341 GRP_MUX("nand ale", EBU, danube_pins_nand_ale),
342 GRP_MUX("nand cs1", EBU, danube_pins_nand_cs1),
343 GRP_MUX("nand cle", EBU, danube_pins_nand_cle),
389 "nand ale", "nand cs1",
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| /kernel/linux/linux-6.6/fs/jffs2/ |
| D | README.Locking | 3 ---------------------------
11 ---------
13 The alloc_sem is a per-filesystem mutex, used primarily to ensure
24 which they belong. This is for the benefit of NAND flash - adding new
26 until this happens we ensure that any data in the write-buffer at the
28 was written afterwards. Hence, we can ensure the newly-obsoleted nodes
29 don't actually get erased until the write-buffer has been flushed to
32 With the introduction of NAND flash support and the write-buffer,
33 the alloc_sem is also used to protect the wbuf-related members of the
37 Ordering constraints: See f->sem.
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| /kernel/linux/linux-5.10/fs/jffs2/ |
| D | README.Locking | 3 ---------------------------
11 ---------
13 The alloc_sem is a per-filesystem mutex, used primarily to ensure
24 which they belong. This is for the benefit of NAND flash - adding new
26 until this happens we ensure that any data in the write-buffer at the
28 was written afterwards. Hence, we can ensure the newly-obsoleted nodes
29 don't actually get erased until the write-buffer has been flushed to
32 With the introduction of NAND flash support and the write-buffer,
33 the alloc_sem is also used to protect the wbuf-related members of the
37 Ordering constraints: See f->sem.
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| /kernel/linux/linux-5.10/drivers/pinctrl/ |
| D | pinctrl-xway.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/pinctrl/pinmux-xway.c
4 * based on linux/drivers/pinctrl/pinmux-pxa910.c
21 #include "pinctrl-lantiq.h"
110 /* --------- DEPRECATED: xr9 related code --------- */
111 /* ---------- use xrx100/xrx200 instead ---------- */
249 GRP_MUX("nand ale", EBU, pins_nand_ale),
250 GRP_MUX("nand cs1", EBU, pins_nand_cs1),
251 GRP_MUX("nand cle", EBU, pins_nand_cle),
277 GRP_MUX("nand rdy", EBU, pins_nand_rdy),
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| /kernel/linux/linux-5.10/include/linux/mtd/ |
| D | rawnand.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
8 * Contains standard defines and IDs for NAND flash devices
17 #include <linux/mtd/nand.h>
21 #include <linux/mtd/nand.h>
29 /* The maximum number of NAND chips in an array */
50 * Standard NAND flash commands
73 #define NAND_CMD_NONE -1
82 #define NAND_DATA_IFACE_CHECK_ONLY -1
95 * Enable generic NAND 'page erased' check. This check is only done when
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| D | nand.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2017 - Free Electrons
6 * Boris Brezillon <boris.brezillon@free-electrons.com>
18 * struct nand_memory_organization - Memory organization structure
19 * @bits_per_cell: number of bits per NAND cell
27 * @ntargets: total number of targets exposed by the NAND device
55 * struct nand_row_converter - Information needed to convert an absolute offset
67 * struct nand_pos - NAND position object
68 * @target: the NAND target/die
74 * These information are usually used by specific sub-layers to select the
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| D | sh_flctl.h | 1 /* SPDX-License-Identifier: GPL-2.0
3 * SuperH FLCTL nand controller
18 #define FLCMNCR(f) (f->reg + 0x0)
19 #define FLCMDCR(f) (f->reg + 0x4)
20 #define FLCMCDR(f) (f->reg + 0x8)
21 #define FLADR(f) (f->reg + 0xC)
22 #define FLADR2(f) (f->reg + 0x3C)
23 #define FLDATAR(f) (f->reg + 0x10)
24 #define FLDTCNTR(f) (f->reg + 0x14)
25 #define FLINTDMACR(f) (f->reg + 0x18)
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| D | platnand.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
7 * Contains all platform NAND related definitions.
18 * struct platform_nand_chip - chip level device structure
26 * @part_probe_types: NULL-terminated array of probe types
40 * struct platform_nand_ctrl - controller level device structure
65 * struct platform_nand_data - container structure for platform-specific data
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/leds/ |
| D | common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
25 led-sources:
30 $ref: /schemas/types.yaml#/definitions/uint32-array
35 from the header include/dt-bindings/leds/common.h. If there is no
42 the header include/dt-bindings/leds/common.h. If there is no matching
48 function-enumerator:
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| /kernel/linux/linux-5.10/arch/arm/mach-s3c/ |
| D | s3c2412.c | 1 // SPDX-License-Identifier: GPL-2.0
28 #include <asm/proc-fns.h>
33 #include "regs-clock.h"
34 #include "regs-gpio.h"
41 #include "nand-core-s3c24xx.h"
42 #include "regs-dsc-s3c24xx.h"
43 #include "s3c2412-power.h"
80 s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no); in s3c2412_init_uarts()
83 s3c_device_sdi.name = "s3c2412-sdi"; in s3c2412_init_uarts()
84 s3c_device_lcd.name = "s3c2412-lcd"; in s3c2412_init_uarts()
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| /kernel/linux/linux-5.10/Documentation/arm/samsung-s3c24xx/ |
| D | overview.rst | 8 ------------
10 The Samsung S3C24XX range of ARM9 System-on-Chip CPUs are supported
21 included under the arch/arm/mach-s3c2416 directory. Note, while core
27 -------------
38 ------
41 arch/arm/plat-s3c24xx with headers in include/asm-arm/plat-s3c24xx.
43 code (arch/arm/plat-s3c24xx) and the arch/arm/mach-s3c24* code.
47 in arch/arm/mach-s3c2410 and S3C2440 in arch/arm/mach-s3c2440
50 arch/arm/mach-s3c2410 directory./include/mach
52 arch/arm/plat-s3c24xx:
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