Searched +full:one +full:- +full:channel (Results 1 – 25 of 1097) sorted by relevance
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| /kernel/linux/linux-5.10/include/linux/dma/ |
| D | sprd-dma.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
15 * The Spreadtrum DMA controller supports channel 2-stage tansfer, that means
16 * we can request 2 dma channels, one for source channel, and another one for
17 * destination channel. Each channel is independent, and has its own
18 * configurations. Once the source channel's transaction is done, it will
19 * trigger the destination channel's transaction automatically by hardware
22 * To support 2-stage tansfer, we must configure the channel mode and trigger
27 * enum sprd_dma_chn_mode: define the DMA channel mode for 2-stage transfer
28 * @SPRD_DMA_CHN_MODE_NONE: No channel mode setting which means channel doesn't
29 * support the 2-stage transfer.
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| /kernel/linux/linux-6.6/include/linux/dma/ |
| D | sprd-dma.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
15 * The Spreadtrum DMA controller supports channel 2-stage tansfer, that means
16 * we can request 2 dma channels, one for source channel, and another one for
17 * destination channel. Each channel is independent, and has its own
18 * configurations. Once the source channel's transaction is done, it will
19 * trigger the destination channel's transaction automatically by hardware
22 * To support 2-stage tansfer, we must configure the channel mode and trigger
27 * enum sprd_dma_chn_mode: define the DMA channel mode for 2-stage transfer
28 * @SPRD_DMA_CHN_MODE_NONE: No channel mode setting which means channel doesn't
29 * support the 2-stage transfer.
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| /kernel/linux/linux-6.6/include/linux/iio/ |
| D | events.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* The industrial I/O - event passing to userspace
4 * Copyright (c) 2008-2011 Jonathan Cameron
13 * IIO_EVENT_CODE() - create event identifier
14 * @chan_type: Type of the channel. Should be one of enum iio_chan_type.
15 * @diff: Whether the event is for an differential channel or not.
16 * @modifier: Modifier for the channel. Should be one of enum iio_modifier.
17 * @direction: Direction of the event. One of enum iio_event_direction.
18 * @type: Type of the event. Should be one of enum iio_event_type.
19 * @chan: Channel number for non-differential channels.
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| /kernel/linux/linux-5.10/include/linux/iio/ |
| D | events.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* The industrial I/O - event passing to userspace
4 * Copyright (c) 2008-2011 Jonathan Cameron
13 * IIO_EVENT_CODE() - create event identifier
14 * @chan_type: Type of the channel. Should be one of enum iio_chan_type.
15 * @diff: Whether the event is for an differential channel or not.
16 * @modifier: Modifier for the channel. Should be one of enum iio_modifier.
17 * @direction: Direction of the event. One of enum iio_event_direction.
18 * @type: Type of the event. Should be one of enum iio_event_type.
19 * @chan: Channel number for non-differential channels.
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| /kernel/linux/linux-5.10/include/sound/sof/ |
| D | channel_map.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
16 * \brief Channel map, specifies transformation of one-to-many or many-to-one.
18 * In case of one-to-many specifies how the output channels are computed out of
19 * a single source channel,
20 * in case of many-to-one specifies how a single target channel is computed
23 * Channel index specifies position of the channel in the stream on the 'one'
29 * Channel mask describes which channels are taken into account on the "many"
30 * side. Bit[i] set to 1 means that i-th channel is used for computation
33 * Channel mask is followed by array of coefficients in Q2.30 format,
34 * one per each channel set in the mask (left to right, LS bit set in the
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| /kernel/linux/linux-6.6/include/sound/sof/ |
| D | channel_map.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
16 * \brief Channel map, specifies transformation of one-to-many or many-to-one.
18 * In case of one-to-many specifies how the output channels are computed out of
19 * a single source channel,
20 * in case of many-to-one specifies how a single target channel is computed
23 * Channel index specifies position of the channel in the stream on the 'one'
29 * Channel mask describes which channels are taken into account on the "many"
30 * side. Bit[i] set to 1 means that i-th channel is used for computation
33 * Channel mask is followed by array of coefficients in Q2.30 format,
34 * one per each channel set in the mask (left to right, LS bit set in the
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | debugfs-scmi-raw | 7 in little-endian binary format to have it sent to the configured
11 Each write to the entry causes one command request to be built
12 and sent while the replies are read back one message at time
22 in little-endian binary format to have it sent to the configured
29 Each write to the entry causes one command request to be built
30 and sent while the replies are read back one message at time
38 Description: SCMI Raw message errors facility; any kind of timed-out or
41 Each read gives back one message at time (receiving an EOF at
52 Each read gives back one message at time (receiving an EOF at
65 different test-run.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/xilinx/ |
| D | xilinx_dma.txt | 2 It can be configured to have one channel or two channels. If configured
3 as two channels, one is to transmit to the video device and another is
7 target devices. It can be configured to have one channel or two channels.
8 If configured as two channels, one is to transmit to the device and another
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/xilinx/ |
| D | xilinx_dma.txt | 2 It can be configured to have one channel or two channels. If configured
3 as two channels, one is to transmit to the video device and another is
7 target devices. It can be configured to have one channel or two channels.
8 If configured as two channels, one is to transmit to the device and another
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
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| /kernel/linux/linux-5.10/Documentation/trace/ |
| D | stm.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 protocol multiplexing data from multiple trace sources, each one of
10 which is assigned a unique pair of master and channel. While some of
14 master/channel combination from this pool.
17 sources can only be identified by master/channel combination, so in
20 master/channel pairs to the trace sources that it understands.
23 master 7 channel 15, while arbitrary user applications can use masters
34 associated with it, located in "stp-policy" subsystem directory in
40 $ ls /config/stp-policy/dummy_stm.my-policy/user
42 $ cat /config/stp-policy/dummy_stm.my-policy/user/masters
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| /kernel/linux/linux-6.6/Documentation/trace/ |
| D | stm.rst | 1 .. SPDX-License-Identifier: GPL-2.0
9 protocol multiplexing data from multiple trace sources, each one of
10 which is assigned a unique pair of master and channel. While some of
14 master/channel combination from this pool.
17 sources can only be identified by master/channel combination, so in
20 master/channel pairs to the trace sources that it understands.
23 master 7 channel 15, while arbitrary user applications can use masters
34 associated with it, located in "stp-policy" subsystem directory in
40 $ ls /config/stp-policy/dummy_stm.my-policy/user
42 $ cat /config/stp-policy/dummy_stm.my-policy/user/masters
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| /kernel/linux/linux-6.6/Documentation/driver-api/iio/ |
| D | core.rst | 8 :file:`drivers/iio/industrialio-*`
11 ----------------------
13 * struct iio_dev - industrial I/O device
14 * iio_device_alloc() - allocate an :c:type:`iio_dev` from a driver
15 * iio_device_free() - free an :c:type:`iio_dev` from a driver
16 * iio_device_register() - register a device with the IIO subsystem
17 * iio_device_unregister() - unregister a device from the IIO
63 :file:`Documentation/ABI/testing/sysfs-bus-iio` file in the Linux kernel
69 struct iio_chan_spec - specification of a single channel
71 An IIO device channel is a representation of a data channel. An IIO device can
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| /kernel/linux/linux-5.10/Documentation/driver-api/iio/ |
| D | core.rst | 8 :file:`drivers/iio/industrialio-*`
11 ----------------------
13 * struct iio_dev - industrial I/O device
14 * iio_device_alloc() - allocate an :c:type:`iio_dev` from a driver
15 * iio_device_free() - free an :c:type:`iio_dev` from a driver
16 * iio_device_register() - register a device with the IIO subsystem
17 * iio_device_unregister() - unregister a device from the IIO
63 :file:`Documentation/ABI/testing/sysfs-bus-iio` file in the Linux kernel
69 struct iio_chan_spec - specification of a single channel
71 An IIO device channel is a representation of a data channel. An IIO device can
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| /kernel/linux/linux-6.6/Documentation/driver-api/ |
| D | edac.rst | 5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
35 * Channel
37 A memory controller channel, responsible to communicate with a group of
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
48 just one memory stick when an error occurs, as the error correction code
49 is calculated using two DIMMs instead of one. Due to that, it is capable
52 * Single-channel
54 The data accessed by the memory controller is contained into one dimm
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ |
| D | mmp-dma.txt | 7 - compatible: Should be "marvell,pdma-1.0"
8 - reg: Should contain DMA registers location and length.
9 - interrupts: Either contain all of the per-channel DMA interrupts
10 or one irq for pdma device
13 - dma-channels: Number of DMA channels supported by the controller (defaults
15 - #dma-channels: deprecated
16 - dma-requests: Number of DMA requestor lines supported by the controller
18 - #dma-requests: deprecated
20 "marvell,pdma-1.0"
26 * Each channel has specific irq
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ |
| D | mmp-dma.txt | 7 - compatible: Should be "marvell,pdma-1.0"
8 - reg: Should contain DMA registers location and length.
9 - interrupts: Either contain all of the per-channel DMA interrupts
10 or one irq for pdma device
13 - #dma-channels: Number of DMA channels supported by the controller (defaults
15 - #dma-requests: Number of DMA requestor lines supported by the controller
18 "marvell,pdma-1.0"
24 * Each channel has specific irq
25 * ICU parse out irq channel from ICU register,
26 * while DMA controller may not able to distinguish the irq channel
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| /kernel/linux/linux-6.6/Documentation/arch/arm/stm32/ |
| D | stm32-dma-mdma-chaining.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 STM32 DMA-MDMA chaining
9 ------------
11 This document describes the STM32 DMA-MDMA chaining feature. But before going
44 ----------
46 STM32 DMA-MDMA chaining feature relies on the strengths of STM32 DMA and
50 (when DMA data counter - DMA_SxNDTR - reaches 0), the memory pointers
53 process one memory area while the second memory area is being filled/used by
56 With STM32 MDMA linked-list mode, a single request initiates the data array
57 (collection of nodes) to be transferred until the linked-list pointer for the
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| /kernel/linux/linux-6.6/Documentation/userspace-api/media/v4l/ |
| D | vidioc-g-modulator.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
44 begin at index zero, incrementing by one until the driver returns
52 this is a write-only ioctl, it does not return the actual audio
67 .. flat-table:: struct v4l2_modulator
68 :header-rows: 0
69 :stub-columns: 0
72 * - __u32
73 - ``index``
74 - Identifies the modulator, set by the application.
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| /kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/ |
| D | vidioc-g-modulator.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
44 begin at index zero, incrementing by one until the driver returns
52 this is a write-only ioctl, it does not return the actual audio
67 .. flat-table:: struct v4l2_modulator
68 :header-rows: 0
69 :stub-columns: 0
72 * - __u32
73 - ``index``
74 - Identifies the modulator, set by the application.
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| /kernel/linux/linux-6.6/Documentation/staging/ |
| D | rpmsg.rst | 17 flavor of real-time OS.
19 OMAP4, for example, has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP.
20 Typically, the dual cortex-A9 is running Linux in a SMP configuration,
25 hardware accelerators, and therefore are often used to offload CPU-intensive
28 These remote processors could also be used to control latency-sensitive
34 hardware accessible only by the remote processor, reserving kernel-controlled
37 Rpmsg is a virtio-based messaging bus that allows kernel drivers to communicate
54 Every rpmsg device is a communication channel with a remote processor (thus
59 When a driver starts listening on a channel, its rx callback is bound with
60 a unique rpmsg local address (a 32-bit integer). This way when inbound messages
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| /kernel/linux/linux-5.10/Documentation/staging/ |
| D | rpmsg.rst | 17 flavor of real-time OS.
19 OMAP4, for example, has dual Cortex-A9, dual Cortex-M3 and a C64x+ DSP.
20 Typically, the dual cortex-A9 is running Linux in a SMP configuration,
25 hardware accelerators, and therefore are often used to offload CPU-intensive
28 These remote processors could also be used to control latency-sensitive
34 hardware accessible only by the remote processor, reserving kernel-controlled
37 Rpmsg is a virtio-based messaging bus that allows kernel drivers to communicate
54 Every rpmsg device is a communication channel with a remote processor (thus
59 When a driver starts listening on a channel, its rx callback is bound with
60 a unique rpmsg local address (a 32-bit integer). This way when inbound messages
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/ |
| D | arm,mhuv2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
16 communication with remote processor(s), where the number of channel windows
33 - Data-transfer: Each transfer is made of one or more words, using one or more
34 channel windows.
36 - Doorbell: Each transfer is made up of single bit flag, using any one of the
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Dan Murphy <dmurphy@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - const: ti,tlv320adc3140
29 - const: ti,tlv320adc5140
30 - const: ti,tlv320adc6140
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | tlv320adcx140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | xilinx-xadc.txt | 6 Currently two different frontends for the DRP interface exist. One that is only
8 other one is available on all series 7 platforms and is a softmacro with a AXI
13 - compatible: Should be one of
14 * "xlnx,zynq-xadc-1.00.a": When using the ZYNQ device
16 * "xlnx,axi-xadc-1.00.a": When using the axi-xadc pcore to
18 - reg: Address and length of the register set for the device
19 - interrupts: Interrupt for the XADC control interface.
20 - clocks: When using the ZYNQ this must be the ZYNQ PCAP clock,
21 when using the AXI-XADC pcore this must be the clock that provides the
25 - xlnx,external-mux:
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