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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dqcom,pdc.yaml4 $id: http://devicetree.org/schemas/interrupt-controller/qcom,pdc.yaml#
7 title: PDC interrupt controller
14 Power Domain Controller (PDC) that is on always-on domain. In addition to
20 controller PDC is next in hierarchy, followed by others. Drivers requiring
21 wakeup capabilities of their device interrupts routed through the PDC, must
22 specify PDC as their interrupt controller and request the PDC port associated
29 - qcom,qdu1000-pdc
30 - qcom,sa8775p-pdc
31 - qcom,sc7180-pdc
32 - qcom,sc7280-pdc
[all …]
Dimg,pdc-intc.txt1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
4 representation of a PDC IRQ controller. This has a number of input interrupt
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
52 * TZ1090 PDC block
54 pdc: pdc@02006000 {
65 compatible = "img,pdc-intc";
82 * An SoC peripheral that is wired through the PDC.
86 interrupt-parent = <&pdc>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dqcom,pdc.txt1 PDC interrupt controller
4 Power Domain Controller (PDC) that is on always-on domain. In addition to
10 controller PDC is next in hierarchy, followed by others. Drivers requiring
11 wakeup capabilities of their device interrupts routed through the PDC, must
12 specify PDC as their interrupt controller and request the PDC port associated
20 Definition: Should contain "qcom,<soc>-pdc" and "qcom,pdc"
21 - "qcom,sc7180-pdc": For SC7180
22 - "qcom,sdm845-pdc": For SDM845
27 Definition: Specifies the base physical address for PDC hardware.
35 The first element of the tuple is the PDC pin for the
[all …]
Dimg,pdc-intc.txt1 * ImgTec Powerdown Controller (PDC) Interrupt Controller Binding
4 representation of a PDC IRQ controller. This has a number of input interrupt
11 The type shall be <string> and the value shall include "img,pdc-intc".
13 - reg: Specifies the base PDC physical address(s) and size(s) of the
27 shared SysWake interrupt, and remaining specifies shall be PDC peripheral
52 * TZ1090 PDC block
54 pdc: pdc@02006000 {
65 compatible = "img,pdc-intc";
82 * An SoC peripheral that is wired through the PDC.
86 interrupt-parent = <&pdc>;
[all …]
/kernel/linux/linux-6.6/sound/soc/atmel/
Datmel-pcm.h32 unsigned int xpr; /* PDC recv/trans pointer */
33 unsigned int xcr; /* PDC recv/trans counter */
34 unsigned int xnpr; /* PDC next recv/trans pointer */
35 unsigned int xncr; /* PDC next recv/trans counter */
36 unsigned int ptcr; /* PDC transfer control */
45 u32 pdc_enable; /* PDC recv/trans enable */
46 u32 pdc_disable; /* PDC recv/trans disable */
52 * PDC DMA operation. All fields except dma_intr_handler() are initialized
59 int pdc_xfer_size; /* PDC counter increment in bytes */
61 struct atmel_pdc_regs *pdc; /* PDC receive or transmit registers */ member
[all …]
Datmel-pcm-pdc.c103 /* re-start the PDC */ in atmel_pcm_dma_irq()
110 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_dma_irq()
112 ssc_writex(params->ssc->regs, params->pdc->xcr, in atmel_pcm_dma_irq()
119 /* Load the PDC next pointer and counter registers */ in atmel_pcm_dma_irq()
124 ssc_writex(params->ssc->regs, params->pdc->xnpr, in atmel_pcm_dma_irq()
126 ssc_writex(params->ssc->regs, params->pdc->xncr, in atmel_pcm_dma_irq()
208 ssc_writex(params->ssc->regs, params->pdc->xpr, in atmel_pcm_trigger()
210 ssc_writex(params->ssc->regs, params->pdc->xcr, in atmel_pcm_trigger()
214 ssc_writex(params->ssc->regs, params->pdc->xnpr, in atmel_pcm_trigger()
216 ssc_writex(params->ssc->regs, params->pdc->xncr, in atmel_pcm_trigger()
[all …]
/kernel/linux/linux-5.10/sound/soc/atmel/
Datmel-pcm.h32 unsigned int xpr; /* PDC recv/trans pointer */
33 unsigned int xcr; /* PDC recv/trans counter */
34 unsigned int xnpr; /* PDC next recv/trans pointer */
35 unsigned int xncr; /* PDC next recv/trans counter */
36 unsigned int ptcr; /* PDC transfer control */
45 u32 pdc_enable; /* PDC recv/trans enable */
46 u32 pdc_disable; /* PDC recv/trans disable */
52 * PDC DMA operation. All fields except dma_intr_handler() are initialized
59 int pdc_xfer_size; /* PDC counter increment in bytes */
61 struct atmel_pdc_regs *pdc; /* PDC receive or transmit registers */ member
[all …]
/kernel/linux/linux-5.10/arch/parisc/kernel/
Dprocessor.c27 #include <asm/pdc.h>
55 ** The code path not shared is how PDC hands control of the CPU to the OS.
102 txn_addr = dev->hpa.start; /* for legacy PDC */ in processor_probe()
141 * We'll care when we need to query PAT PDC about a CPU *after* in processor_probe()
240 #define p ((unsigned long *)&boot_cpu_data.pdc.model) in collect_boot_cpu_data()
241 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) { in collect_boot_cpu_data()
246 add_device_randomness(&boot_cpu_data.pdc.model, in collect_boot_cpu_data()
247 sizeof(boot_cpu_data.pdc.model)); in collect_boot_cpu_data()
251 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) { in collect_boot_cpu_data()
253 boot_cpu_data.pdc.versions); in collect_boot_cpu_data()
[all …]
Dpdc_cons.c3 * PDC Console support - ie use firmware to dump text via boot console
20 * The PDC console is a simple console, which can be used for debugging
24 * This code uses the ROM (=PDC) based functions to read and write characters
25 * from and to PDC's boot path.
40 #include <asm/pdc.h> /* for iodc_call() proto and friends */
150 * It is unregistered if the pdc console was not selected as the in pdc_console_tty_driver_init()
162 printk(KERN_INFO "PDC console driver not registered anymore, not creating %s\n", pdc_cons.name); in pdc_console_tty_driver_init()
166 printk(KERN_INFO "The PDC console driver is still registered, removing CON_BOOT flag\n"); in pdc_console_tty_driver_init()
189 printk(KERN_ERR "Unable to register the PDC console TTY driver\n"); in pdc_console_tty_driver_init()
228 /* register the pdc console */ in pdc_console_init_force()
[all …]
Dfirmware.c3 * arch/parisc/kernel/firmware.c - safe PDC access routines
5 * PDC == Processor Dependent Code
7 * See PDC documentation at
20 * guidelines when writing PDC wrappers:
22 * - the name of the pdc wrapper should match one of the macros
25 * - use the static PDC result buffers and "copyout" to structs
27 * - hold pdc_lock while in PDC or using static result buffers
30 * - the name of the struct used for pdc return values should equal
32 * corresponding PDC call
64 #include <asm/pdc.h>
[all …]
Dpacache.S10 * NOTE: fdc,fic, and pdc instructions that use base register modification
858 1: pdc,m r31(%r28)
859 pdc,m r31(%r28)
860 pdc,m r31(%r28)
861 pdc,m r31(%r28)
862 pdc,m r31(%r28)
863 pdc,m r31(%r28)
864 pdc,m r31(%r28)
865 pdc,m r31(%r28)
866 pdc,m r31(%r28)
[all …]
Dpdc_chassis.c3 * interfaces to Chassis Codes via PDC (firmware)
31 #include <asm/pdc.h>
57 * @pdc_chassis_old: 1 if old pdc chassis style
83 * As soon as a panic occurs, we should inform the PDC.
103 * As soon as a reboot occurs, we should inform the PDC.
150 * @retval: PDC call return value.
152 * Only machines with 64 bits PDC PAT and those reported in
155 * returns 0 if no error, -1 if no supported PDC is present or invalid message,
156 * else returns the appropriate PDC error code.
269 printk(KERN_INFO "Enabling PDC chassis warnings support v%s\n", in pdc_chassis_create_procfs()
/kernel/linux/linux-6.6/arch/parisc/kernel/
Dprocessor.c28 #include <asm/pdc.h>
57 ** The code path not shared is how PDC hands control of the CPU to the OS.
104 txn_addr = dev->hpa.start; /* for legacy PDC */ in processor_probe()
143 * We'll care when we need to query PAT PDC about a CPU *after* in processor_probe()
242 #define p ((unsigned long *)&boot_cpu_data.pdc.model) in collect_boot_cpu_data()
243 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK) { in collect_boot_cpu_data()
248 add_device_randomness(&boot_cpu_data.pdc.model, in collect_boot_cpu_data()
249 sizeof(boot_cpu_data.pdc.model)); in collect_boot_cpu_data()
253 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK) { in collect_boot_cpu_data()
255 boot_cpu_data.pdc.versions); in collect_boot_cpu_data()
[all …]
Dpacache.S10 * NOTE: fdc,fic, and pdc instructions that use base register modification
806 1: pdc,m r31(%r28)
807 pdc,m r31(%r28)
808 pdc,m r31(%r28)
809 pdc,m r31(%r28)
810 pdc,m r31(%r28)
811 pdc,m r31(%r28)
812 pdc,m r31(%r28)
813 pdc,m r31(%r28)
814 pdc,m r31(%r28)
[all …]
Dfirmware.c3 * arch/parisc/kernel/firmware.c - safe PDC access routines
5 * PDC == Processor Dependent Code
7 * See PDC documentation at
20 * guidelines when writing PDC wrappers:
22 * - the name of the pdc wrapper should match one of the macros
25 * - use the static PDC result buffers and "copyout" to structs
27 * - hold pdc_lock while in PDC or using static result buffers
30 * - the name of the struct used for pdc return values should equal
32 * corresponding PDC call
64 #include <asm/pdc.h>
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/
Dbrcm,iproc-pdc-mbox.txt1 The PDC driver manages data transfer to and from various offload engines
2 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
3 one device tree entry per block. On some chips, the PDC functionality is
7 - compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for
9 - reg: Should contain PDC registers location and length.
10 - interrupts: Should contain the IRQ line for the PDC.
19 compatible = "brcm,iproc-pdc-mbox";
20 reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dbrcm,iproc-pdc-mbox.txt1 The PDC driver manages data transfer to and from various offload engines
2 on some Broadcom SoCs. An SoC may have multiple PDC hardware blocks. There is
3 one device tree entry per block. On some chips, the PDC functionality is
7 - compatible : Should be "brcm,iproc-pdc-mbox" or "brcm,iproc-fa2-mbox" for
9 - reg: Should contain PDC registers location and length.
10 - interrupts: Should contain the IRQ line for the PDC.
19 compatible = "brcm,iproc-pdc-mbox";
20 reg = <0 0x612c0000 0 0x445>; /* PDC FS0 regs */
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/
Dqcom,pdc-global.yaml4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
7 title: Qualcomm PDC Global
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
21 - const: "qcom,sc7180-pdc-global"
22 - const: "qcom,sdm845-pdc-global"
26 - const: "qcom,sc7280-pdc-global"
30 - const: "qcom,sdm845-pdc-global"
48 compatible = "qcom,sdm845-pdc-global";
/kernel/linux/linux-6.6/drivers/mailbox/
Dbcm-pdc-mailbox.c7 * Broadcom PDC Mailbox Driver
8 * The PDC provides a ring based programming interface to one or more hardware
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
10 * cryptographic offload hardware. In some chips the PDC is referred to as MDE,
11 * and in others the FA2/FA+ hardware is used with this PDC driver.
13 * The PDC driver registers with the Linux mailbox framework as a mailbox
14 * controller, once for each PDC instance. Ring 0 for each PDC is registered as
15 * a mailbox channel. The PDC driver uses interrupts to determine when data
16 * transfers to and from an offload engine are complete. The PDC driver uses
20 * The PDC driver allows multiple messages to be pending in the descriptor
[all …]
/kernel/linux/linux-5.10/drivers/mailbox/
Dbcm-pdc-mailbox.c7 * Broadcom PDC Mailbox Driver
8 * The PDC provides a ring based programming interface to one or more hardware
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
10 * cryptographic offload hardware. In some chips the PDC is referred to as MDE,
11 * and in others the FA2/FA+ hardware is used with this PDC driver.
13 * The PDC driver registers with the Linux mailbox framework as a mailbox
14 * controller, once for each PDC instance. Ring 0 for each PDC is registered as
15 * a mailbox channel. The PDC driver uses interrupts to determine when data
16 * transfers to and from an offload engine are complete. The PDC driver uses
20 * The PDC driver allows multiple messages to be pending in the descriptor
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/
Dqcom,pdc-global.yaml4 $id: http://devicetree.org/schemas/reset/qcom,pdc-global.yaml#
7 title: Qualcomm PDC Global
13 The bindings describes the reset-controller found on PDC-Global (Power Domain
21 - const: "qcom,sc7180-pdc-global"
22 - const: "qcom,sdm845-pdc-global"
26 - const: "qcom,sdm845-pdc-global"
44 compatible = "qcom,sdm845-pdc-global";
/kernel/linux/linux-6.6/drivers/irqchip/
Dqcom-pdc.c36 /* Notable PDC versions */
106 * active low interrupts to be handled at GIC, PDC has an inverter that inverts
128 * qcom_pdc_gic_set_type: Configure PDC for the interrupt
133 * If @type is edge triggered, forward that as Rising edge as PDC
135 * If @type is level, then forward that as level high as PDC
177 * When we change types the PDC can give a phantom interrupt. in qcom_pdc_gic_set_type()
192 .name = "PDC",
275 n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32)); in pdc_setup_pin_mapping()
287 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
292 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
[all …]
/kernel/linux/linux-5.10/drivers/irqchip/
Dqcom-pdc.c127 * active low interrupts to be handled at GIC, PDC has an inverter that inverts
149 * qcom_pdc_gic_set_type: Configure PDC for the interrupt
154 * If @type is edge triggered, forward that as Rising edge as PDC
156 * If @type is level, then forward that as level high as PDC
201 * When we change types the PDC can give a phantom interrupt. in qcom_pdc_gic_set_type()
216 .name = "PDC",
367 n = of_property_count_elems_of_size(np, "qcom,pdc-ranges", sizeof(u32)); in pdc_setup_pin_mapping()
379 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
384 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
389 ret = of_property_read_u32_index(np, "qcom,pdc-ranges", in pdc_setup_pin_mapping()
[all …]
/kernel/linux/linux-5.10/include/linux/
Datmel-ssc.h276 /* SSC PDC Receive Pointer Register */
279 /* SSC PDC Receive Counter Register */
282 /* SSC PDC Transmit Pointer Register */
285 /* SSC PDC Receive Next Pointer Register */
288 /* SSC PDC Receive Next Counter Register */
291 /* SSC PDC Transmit Counter Register */
294 /* SSC PDC Transmit Next Pointer Register */
297 /* SSC PDC Transmit Next Counter Register */
300 /* SSC PDC Transfer Control Register */
311 /* SSC PDC Transfer Status Register */
/kernel/linux/linux-6.6/include/linux/
Datmel-ssc.h276 /* SSC PDC Receive Pointer Register */
279 /* SSC PDC Receive Counter Register */
282 /* SSC PDC Transmit Pointer Register */
285 /* SSC PDC Receive Next Pointer Register */
288 /* SSC PDC Receive Next Counter Register */
291 /* SSC PDC Transmit Counter Register */
294 /* SSC PDC Transmit Next Pointer Register */
297 /* SSC PDC Transmit Next Counter Register */
300 /* SSC PDC Transfer Control Register */
311 /* SSC PDC Transfer Status Register */

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