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/kernel/linux/linux-5.10/drivers/dma/
Dxgene-dma.c215 struct xgene_dma *pdma; member
247 * @pdma: X-Gene DMA device structure reference
271 struct xgene_dma *pdma; member
343 static bool is_pq_enabled(struct xgene_dma *pdma) in is_pq_enabled() argument
347 val = ioread32(pdma->csr_efuse + XGENE_SOC_JTAG1_SHADOW); in is_pq_enabled()
1013 struct xgene_dma *pdma = (struct xgene_dma *)id; in xgene_dma_err_isr() local
1017 val = ioread32(pdma->csr_dma + XGENE_DMA_INT); in xgene_dma_err_isr()
1020 iowrite32(val, pdma->csr_dma + XGENE_DMA_INT); in xgene_dma_err_isr()
1025 dev_err(pdma->dev, in xgene_dma_err_isr()
1035 iowrite32(ring->num, ring->pdma->csr_ring + XGENE_DMA_RING_STATE); in xgene_dma_wr_ring_state()
[all …]
/kernel/linux/linux-6.6/drivers/dma/
Dxgene-dma.c216 struct xgene_dma *pdma; member
248 * @pdma: X-Gene DMA device structure reference
272 struct xgene_dma *pdma; member
344 static bool is_pq_enabled(struct xgene_dma *pdma) in is_pq_enabled() argument
348 val = ioread32(pdma->csr_efuse + XGENE_SOC_JTAG1_SHADOW); in is_pq_enabled()
1014 struct xgene_dma *pdma = (struct xgene_dma *)id; in xgene_dma_err_isr() local
1018 val = ioread32(pdma->csr_dma + XGENE_DMA_INT); in xgene_dma_err_isr()
1021 iowrite32(val, pdma->csr_dma + XGENE_DMA_INT); in xgene_dma_err_isr()
1026 dev_err(pdma->dev, in xgene_dma_err_isr()
1036 iowrite32(ring->num, ring->pdma->csr_ring + XGENE_DMA_RING_STATE); in xgene_dma_wr_ring_state()
[all …]
/kernel/linux/linux-6.6/drivers/dma/sf-pdma/
Dsf-pdma.c12 * - Chapter 12 "Platform DMA Engine (PDMA)" of
25 #include "sf-pdma.h"
90 dev_err(chan->pdma->dma_dev.dev, in sf_pdma_prep_dma_memcpy()
257 dev_err(chan->pdma->dma_dev.dev, "NULL desc.\n"); in sf_pdma_xfer_desc()
384 * sf_pdma_irq_init() - Init PDMA IRQ Handlers
386 * @pdma: pointer of PDMA engine. Caller should check NULL
398 static int sf_pdma_irq_init(struct platform_device *pdev, struct sf_pdma *pdma) in sf_pdma_irq_init() argument
403 for (i = 0; i < pdma->n_chans; i++) { in sf_pdma_irq_init()
404 chan = &pdma->chans[i]; in sf_pdma_irq_init()
438 * @pdma: pointer of PDMA engine. Caller should check NULL
[all …]
DKconfig2 tristate "Sifive PDMA controller driver"
7 Support the SiFive PDMA controller.
Dsf-pdma.h12 * - Chapter 12 "Platform DMA Engine (PDMA)" of
56 #define SF_PDMA_REG_BASE(ch) (pdma->membase + (PDMA_CHAN_OFFSET * (ch)))
95 struct sf_pdma *pdma; member
/kernel/linux/linux-5.10/drivers/dma/sf-pdma/
Dsf-pdma.c12 * - Chapter 12 "Platform DMA Engine (PDMA)" of
25 #include "sf-pdma.h"
90 dev_err(chan->pdma->dma_dev.dev, in sf_pdma_prep_dma_memcpy()
258 dev_err(chan->pdma->dma_dev.dev, "NULL desc.\n"); in sf_pdma_xfer_desc()
387 * sf_pdma_irq_init() - Init PDMA IRQ Handlers
389 * @pdma: pointer of PDMA engine. Caller should check NULL
401 static int sf_pdma_irq_init(struct platform_device *pdev, struct sf_pdma *pdma) in sf_pdma_irq_init() argument
406 for (i = 0; i < pdma->n_chans; i++) { in sf_pdma_irq_init()
407 chan = &pdma->chans[i]; in sf_pdma_irq_init()
445 * @pdma: pointer of PDMA engine. Caller should check NULL
[all …]
DKconfig2 tristate "Sifive PDMA controller driver"
7 Support the SiFive PDMA controller.
Dsf-pdma.h12 * - Chapter 12 "Platform DMA Engine (PDMA)" of
60 #define SF_PDMA_REG_BASE(ch) (pdma->membase + (PDMA_CHAN_OFFSET * (ch)))
100 struct sf_pdma *pdma; member
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/
Dsifive,fu540-c000-pdma.yaml4 $id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
32 - sifive,fu540-c000-pdma
35 Should be "sifive,<chip>-pdma" and "sifive,pdma<version>".
37 "sifive,fu540-c000-pdma" for the SiFive PDMA v0 as integrated onto the
38 SiFive FU540 chip resp and "sifive,pdma0" for the SiFive PDMA v0 IP block
67 compatible = "sifive,fu540-c000-pdma", "sifive,pdma0";
Dmmp-dma.txt7 - compatible: Should be "marvell,pdma-1.0"
10 or one irq for pdma device
20 "marvell,pdma-1.0"
30 * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq,
33 pdma: dma-controller@d4000000 {
34 compatible = "marvell,pdma-1.0";
46 pdma: dma-controller@d4000000 {
47 compatible = "marvell,pdma-1.0";
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dmmp-dma.txt7 - compatible: Should be "marvell,pdma-1.0"
10 or one irq for pdma device
18 "marvell,pdma-1.0"
28 * For example, pxa688 icu register 0x128, bit 0~15 is PDMA channel irq,
31 pdma: dma-controller@d4000000 {
32 compatible = "marvell,pdma-1.0";
44 pdma: dma-controller@d4000000 {
45 compatible = "marvell,pdma-1.0";
Dsifive,fu540-c000-pdma.yaml4 $id: http://devicetree.org/schemas/dma/sifive,fu540-c000-pdma.yaml#
28 - const: sifive,fu540-c000-pdma
51 compatible = "sifive,fu540-c000-pdma";
/kernel/linux/linux-5.10/include/linux/dma/
Dk3-psil.h31 * @PSIL_EP_PDMA_XY: XY mode PDMA
32 * @PSIL_EP_PDMA_MCAN: MCAN mode PDMA
33 * @PSIL_EP_PDMA_AASRC: AASRC mode PDMA
51 * @pdma_acc32: ACC32 must be enabled on the PDMA side
52 * @pdma_burst: BURST must be enabled on the PDMA side
63 /* PDMA properties, valid for PSIL_EP_PDMA_* */
/kernel/linux/linux-6.6/include/linux/dma/
Dk3-psil.h31 * @PSIL_EP_PDMA_XY: XY mode PDMA
32 * @PSIL_EP_PDMA_MCAN: MCAN mode PDMA
33 * @PSIL_EP_PDMA_AASRC: AASRC mode PDMA
50 * @pdma_acc32: ACC32 must be enabled on the PDMA side
51 * @pdma_burst: BURST must be enabled on the PDMA side
70 /* PDMA properties, valid for PSIL_EP_PDMA_* */
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/crypto/
Dartpec6-crypto.txt1 Axis crypto engine with PDMA interface.
7 - reg: Base address and size for the PDMA register area.
8 - interrupts: Interrupt handle for the PDMA interrupt line.
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/
Dartpec6-crypto.txt1 Axis crypto engine with PDMA interface.
7 - reg: Base address and size for the PDMA register area.
8 - interrupts: Interrupt handle for the PDMA interrupt line.
/kernel/linux/linux-5.10/drivers/net/ethernet/mediatek/
Dmtk_eth_soc.h69 /* PDMA HW LRO Alter Flow Timer Register */
96 /* PDMA RX Base Pointer Register */
100 /* PDMA RX Maximum Count Register */
104 /* PDMA RX CPU Pointer Register */
108 /* PDMA HW LRO Control Registers */
122 /* PDMA Global Configuration Register */
127 /* PDMA Reset Index Register */
132 /* PDMA Delay Interrupt Register */
142 /* PDMA Interrupt Status Register */
145 /* PDMA Interrupt Mask Register */
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/ingenic/
Dx1000.dtsi274 dmas = <&pdma X1000_DMA_SSI0_RX 0xffffffff>,
275 <&pdma X1000_DMA_SSI0_TX 0xffffffff>;
323 pdma: dma-controller@13420000 { label
349 dmas = <&pdma X1000_DMA_MSC0_RX 0xffffffff>,
350 <&pdma X1000_DMA_MSC0_TX 0xffffffff>;
370 dmas = <&pdma X1000_DMA_MSC1_RX 0xffffffff>,
371 <&pdma X1000_DMA_MSC1_TX 0xffffffff>;
434 dmas = <&pdma X1000_DMA_I2S0_RX 0xffffffff>,
435 <&pdma X1000_DMA_I2S0_TX 0xffffffff>;
Dx1830.dtsi256 dmas = <&pdma X1830_DMA_SSI0_RX 0xffffffff>,
257 <&pdma X1830_DMA_SSI0_TX 0xffffffff>;
275 dmas = <&pdma X1830_DMA_SSI1_RX 0xffffffff>,
276 <&pdma X1830_DMA_SSI1_TX 0xffffffff>;
333 pdma: dma-controller@13420000 { label
359 dmas = <&pdma X1830_DMA_MSC0_RX 0xffffffff>,
360 <&pdma X1830_DMA_MSC0_TX 0xffffffff>;
380 dmas = <&pdma X1830_DMA_MSC1_RX 0xffffffff>,
381 <&pdma X1830_DMA_MSC1_TX 0xffffffff>;
/kernel/linux/linux-6.6/arch/arm/boot/dts/intel/pxa/
Dpxa3xx.dtsi121 pdma: dma-controller@40000000 { label
122 compatible = "marvell,pdma-1.0";
150 dmas = <&pdma 97 3>;
188 dmas = <&pdma 21 3
189 &pdma 22 3>;
199 dmas = <&pdma 93 3
200 &pdma 94 3>;
210 dmas = <&pdma 46 3
211 &pdma 47 3>;
Dpxa27x.dtsi11 pdma: dma-controller@40000000 { label
12 compatible = "marvell,pdma-1.0";
107 dmas = <&pdma 68 0 /* Y channel */
108 &pdma 69 0 /* U channel */
109 &pdma 70 0>; /* V channel */
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dpxa3xx.dtsi121 pdma: dma-controller@40000000 { label
122 compatible = "marvell,pdma-1.0";
147 dmas = <&pdma 97 3>;
185 dmas = <&pdma 21 3
186 &pdma 22 3>;
196 dmas = <&pdma 93 3
197 &pdma 94 3>;
207 dmas = <&pdma 46 3
208 &pdma 47 3>;
Dpxa27x.dtsi11 pdma: dma-controller@40000000 { label
12 compatible = "marvell,pdma-1.0";
104 dmas = <&pdma 68 0 /* Y channel */
105 &pdma 69 0 /* U channel */
106 &pdma 70 0>; /* V channel */
/kernel/linux/linux-5.10/drivers/video/fbdev/riva/
Dnvreg.h84 #define PDMA_Write(reg,value) DEVICE_WRITE(PDMA,reg,value)
85 #define PDMA_Read(reg) DEVICE_READ(PDMA,reg)
86 #define PDMA_Print(reg) DEVICE_PRINT(PDMA,reg)
87 #define PDMA_Def(mask,value) DEVICE_DEF(PDMA,mask,value)
88 #define PDMA_Val(mask,value) DEVICE_VALUE(PDMA,mask,value)
89 #define PDMA_Mask(mask) DEVICE_MASK(PDMA,mask)
/kernel/linux/linux-6.6/drivers/video/fbdev/riva/
Dnvreg.h84 #define PDMA_Write(reg,value) DEVICE_WRITE(PDMA,reg,value)
85 #define PDMA_Read(reg) DEVICE_READ(PDMA,reg)
86 #define PDMA_Print(reg) DEVICE_PRINT(PDMA,reg)
87 #define PDMA_Def(mask,value) DEVICE_DEF(PDMA,mask,value)
88 #define PDMA_Val(mask,value) DEVICE_VALUE(PDMA,mask,value)
89 #define PDMA_Mask(mask) DEVICE_MASK(PDMA,mask)

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