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/kernel/linux/linux-6.6/drivers/net/phy/
Dlinkmode.c1 // SPDX-License-Identifier: GPL-2.0+
5 * linkmode_resolve_pause - resolve the allowable pause modes
21 * 1 X 1 X TX+RX
22 * 1 1 0 1 RX
47 * linkmode_set_pause - set the pause mode advertisement
50 * @rx: boolean from ethtool struct ethtool_pauseparam rx_pause member
53 * capabilities of provided in @tx and @rx.
56 * tx rx Pause AsymDir
62 * Note: this translation from ethtool tx/rx notation to the advertisement
65 * For tx=0 rx=1, meaning transmit is unsupported, receive is supported:
[all …]
/kernel/linux/linux-5.10/drivers/net/phy/
Dlinkmode.c1 // SPDX-License-Identifier: GPL-2.0+
5 * linkmode_resolve_pause - resolve the allowable pause modes
21 * 1 X 1 X TX+RX
22 * 1 1 0 1 RX
47 * linkmode_set_pause - set the pause mode advertisement
50 * @rx: boolean from ethtool struct ethtool_pauseparam rx_pause member
53 * capabilities of provided in @tx and @rx.
56 * tx rx Pause AsymDir
62 * Note: this translation from ethtool tx/rx notation to the advertisement
65 * For tx=0 rx=1, meaning transmit is unsupported, receive is supported:
[all …]
/kernel/linux/linux-6.6/Documentation/virt/kvm/
Dppc-pv.rst1 .. SPDX-License-Identifier: GPL-2.0
35 'hypercall-instructions'. This property contains at most 4 opcodes that make
43 r0 - volatile
53 r12 - volatile
80 applicable to the target. For now, we always map the page to -4096. This way we
84 ld rX, -4096(0)
89 registers. Only if the host supports the additional features, make use of them.
128 not require direct hypervisor intervention because they only get interpreted
133 - MSR_EE
134 - MSR_RI
[all …]
/kernel/linux/linux-5.10/Documentation/virt/kvm/
Dppc-pv.rst1 .. SPDX-License-Identifier: GPL-2.0
35 'hypercall-instructions'. This property contains at most 4 opcodes that make
43 r0 - volatile
53 r12 - volatile
80 applicable to the target. For now, we always map the page to -4096. This way we
84 ld rX, -4096(0)
89 registers. Only if the host supports the additional features, make use of them.
128 not require direct hypervisor intervention because they only get interpreted
133 - MSR_EE
134 - MSR_RI
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Drockchip,i2s-tdm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
18 - $ref: dai-common.yaml#
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
25 - rockchip,rk3308-i2s-tdm
26 - rockchip,rk3568-i2s-tdm
[all …]
/kernel/linux/linux-5.10/drivers/firmware/tegra/
Divc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
47 * This structure is divided into two-cache aligned parts, the first is only
48 * written through the tx.channel pointer, while the second is only written
49 * through the rx.channel pointer. This delineates ownership of the cache
50 * lines, which is critical to performance and necessary in non-cache coherent
68 } rx; member
73 if (!ivc->peer) in tegra_ivc_invalidate()
76 dma_sync_single_for_cpu(ivc->peer, phys, TEGRA_IVC_ALIGN, in tegra_ivc_invalidate()
82 if (!ivc->peer) in tegra_ivc_flush()
[all …]
/kernel/linux/linux-6.6/drivers/firmware/tegra/
Divc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
47 * This structure is divided into two-cache aligned parts, the first is only
48 * written through the tx.channel pointer, while the second is only written
49 * through the rx.channel pointer. This delineates ownership of the cache
50 * lines, which is critical to performance and necessary in non-cache coherent
68 } rx; member
79 if (!ivc->peer) in tegra_ivc_invalidate()
82 dma_sync_single_for_cpu(ivc->peer, phys, TEGRA_IVC_ALIGN, in tegra_ivc_invalidate()
88 if (!ivc->peer) in tegra_ivc_flush()
[all …]
/kernel/linux/linux-5.10/include/linux/dma/
Dk3-udma-glue.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com
10 #include <linux/soc/ti/k3-ringacc.h>
11 #include <linux/dma/ti-cppi5.h>
53 * k3_udma_glue_rx_flow_cfg - UDMA RX flow cfg
55 * @rx_cfg: RX ring configuration
56 * @rxfdq_cfg: RX free Host PD ring configuration
57 * @ring_rxq_id: RX ring id (or -1 for any)
58 * @ring_rxfdq0_id: RX free Host PD ring (FDQ) if (or -1 for any)
59 * @rx_error_handling: Rx Error Handling Mode (0 - drop, 1 - re-try)
[all …]
/kernel/linux/linux-5.10/drivers/usb/musb/
Dcppi_dma.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005-2006 by Texas Instruments
6 * For now it's DaVinci-only, but CPPI isn't specific to DaVinci or USB.
21 /* CPPI DMA status 7-mar-2006:
23 * - See musb_{host,gadget}.c for more info
25 * - Correct RX DMA generally forces the engine into irq-per-packet mode,
26 * which can easily saturate the CPU under non-mass-storage loads.
28 * NOTES 24-aug-2006 (2.6.18-rc4):
30 * - peripheral RXDMA wedged in a test with packets of length 512/512/1.
33 * and RX DMA0: 4 left, 80000000 8feff880, 8feff860 8feff860; 8f321401
[all …]
/kernel/linux/linux-6.6/include/linux/dma/
Dk3-udma-glue.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2019 Texas Instruments Incorporated - https://www.ti.com
10 #include <linux/soc/ti/k3-ringacc.h>
11 #include <linux/dma/ti-cppi5.h>
59 * k3_udma_glue_rx_flow_cfg - UDMA RX flow cfg
61 * @rx_cfg: RX ring configuration
62 * @rxfdq_cfg: RX free Host PD ring configuration
63 * @ring_rxq_id: RX ring id (or -1 for any)
64 * @ring_rxfdq0_id: RX free Host PD ring (FDQ) if (or -1 for any)
65 * @rx_error_handling: Rx Error Handling Mode (0 - drop, 1 - re-try)
[all …]
/kernel/linux/linux-6.6/drivers/spi/
Dspi-loopback-test.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/spi/spi-loopback-test.c
23 #include "spi-test.h"
25 /* flag to only simulate transfers */
37 /* the device is jumpered for loopback - enabling some rx_buf tests */
56 /* run tests only for a specific length */
57 static int run_only_iter_len = -1;
60 "only run tests for a length of this number in iterate_len list");
62 /* run only a specific test */
63 static int run_only_test = -1;
[all …]
Dspi-bcm2835.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * spi-ath79.c, Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
11 * spi-atmel.c, Copyright (C) 2006 Atmel Corporation
18 #include <linux/dma-mapping.h>
74 #define DRV_NAME "spi-bcm2835"
83 * struct bcm2835_spi - BCM2835 SPI controller
87 * @irq: interrupt, signals TX FIFO empty or RX FIFO ¾ full
96 * @rx_prologue: bytes received without DMA if first RX sglist entry's
99 * @debugfs_dir: the debugfs directory - neede to remove debugfs when
111 * @rx_dma_active: whether a RX DMA descriptor is in progress
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-loopback-test.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/spi/spi-loopback-test.c
23 #include "spi-test.h"
25 /* flag to only simulate transfers */
37 /* the device is jumpered for loopback - enabling some rx_buf tests */
56 /* run only a specific test */
57 static int run_only_test = -1;
60 "only run the test with this number (0-based !)");
68 /* check rx ranges */
77 .description = "tx/rx-transfer - start of page",
[all …]
Dspi-bcm2835.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 * spi-ath79.c, Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
11 * spi-atmel.c, Copyright (C) 2006 Atmel Corporation
18 #include <linux/dma-mapping.h>
75 #define DRV_NAME "spi-bcm2835"
84 * struct bcm2835_spi - BCM2835 SPI controller
88 * @irq: interrupt, signals TX FIFO empty or RX FIFO ¾ full
97 * @rx_prologue: bytes received without DMA if first RX sglist entry's
100 * @prepare_cs: precalculated CS register value for ->prepare_message()
101 * (uses slave-specific clock polarity and phase settings)
[all …]
/kernel/linux/linux-5.10/Documentation/networking/
Daf_xdp.rst1 .. SPDX-License-Identifier: GPL-2.0
20 XDP programs to redirect frames to a memory buffer in a user-space
24 syscall. Associated with each XSK are two rings: the RX ring and the
25 TX ring. A socket can receive packets on the RX ring and it can send
28 to have at least one of these rings for each socket. An RX or TX
30 UMEM. RX and TX can share the same UMEM so that a packet does not have
31 to be copied between RX and TX. Moreover, if a packet needs to be kept
44 to fill in with RX packet data. References to these frames will then
45 appear in the RX ring once each packet has been received. The
48 space, for either TX or RX. Thus, the frame addrs appearing in the
[all …]
/kernel/linux/linux-5.10/drivers/net/wan/
Dhd64572.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * hd64572.h Description of the Hitachi HD64572 (SCA-II), valid for
8 * Copyright: (c) 2000-2001 Cyclades Corp.
15 * PC300 initial CVS version (3.4.0-pre1)
47 #define DRX_REG(reg, chan) (reg + 0x40*chan) /* DMA Rx */
49 #define TRX_REG(reg, chan) (reg + 0x20*chan) /* Timer Rx */
52 #define IR0_DRX(val, chan) ((val)<<(8*(chan))) /* Int DMA Rx */
65 #define RXS 0x13c /* RX clock source */
69 #define TMCR 0x145 /* Time constant (Rx) */
85 #define TRBL 0x100 /* TX/RX buffer reg L */
[all …]
/kernel/linux/linux-6.6/drivers/net/wan/
Dhd64572.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * hd64572.h Description of the Hitachi HD64572 (SCA-II), valid for
8 * Copyright: (c) 2000-2001 Cyclades Corp.
15 * PC300 initial CVS version (3.4.0-pre1)
47 #define DRX_REG(reg, chan) (reg + 0x40*chan) /* DMA Rx */
49 #define TRX_REG(reg, chan) (reg + 0x20*chan) /* Timer Rx */
52 #define IR0_DRX(val, chan) ((val)<<(8*(chan))) /* Int DMA Rx */
65 #define RXS 0x13c /* RX clock source */
69 #define TMCR 0x145 /* Time constant (Rx) */
85 #define TRBL 0x100 /* TX/RX buffer reg L */
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/google/gve/
Dgve_rx.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2015-2021 Google, Inc.
19 dma_addr_t dma = (dma_addr_t)(be64_to_cpu(data_slot->addr) & in gve_rx_free_buffer()
22 page_ref_sub(page_info->page, page_info->pagecnt_bias - 1); in gve_rx_free_buffer()
23 gve_free_page(dev, page_info->page, dma, DMA_FROM_DEVICE); in gve_rx_free_buffer()
26 static void gve_rx_unfill_pages(struct gve_priv *priv, struct gve_rx_ring *rx) in gve_rx_unfill_pages() argument
28 u32 slots = rx->mask + 1; in gve_rx_unfill_pages()
31 if (rx->data.raw_addressing) { in gve_rx_unfill_pages()
33 gve_rx_free_buffer(&priv->pdev->dev, &rx->data.page_info[i], in gve_rx_unfill_pages()
34 &rx->data.data_ring[i]); in gve_rx_unfill_pages()
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/ath/ath10k/
Drx_desc.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
56 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
57 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
58 * 0. The PPDU start status will only be valid when this bit
63 * PPDU end status will only be valid when this bit is set.
66 * Multicast / broadcast indicator. Only set when the MAC
68 * matches one of the 4 BSSID registers. Only set when
73 * count. Only set when first_msdu is set.
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath10k/
Drx_desc.h1 /* SPDX-License-Identifier: ISC */
3 * Copyright (c) 2005-2011 Atheros Communications Inc.
4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
55 * A-MPDU frame but a stand alone MPDU. Interior MPDU in an
56 * A-MPDU shall have both first_mpdu and last_mpdu bits set to
57 * 0. The PPDU start status will only be valid when this bit
62 * PPDU end status will only be valid when this bit is set.
65 * Multicast / broadcast indicator. Only set when the MAC
67 * matches one of the 4 BSSID registers. Only set when
72 * count. Only set when first_msdu is set.
[all …]
/kernel/linux/linux-6.6/Documentation/networking/device_drivers/can/freescale/
Dflexcan.rst1 .. SPDX-License-Identifier: GPL-2.0+
7 Authors: Marc Kleine-Budde <mkl@pengutronix.de>,
13 For most flexcan IP cores the driver supports 2 RX modes:
15 - FIFO
16 - mailbox
19 and i.MX53 SOCs) only receive RTR frames if the controller is
20 configured for RX-FIFO mode.
22 The RX FIFO mode uses a hardware FIFO with a depth of 6 CAN frames,
30 With the "rx-rtr" private flag the ability to receive RTR frames can
34 "rx-rtr" on
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/
Dipaq-micro.h1 /* SPDX-License-Identifier: GPL-2.0 */
31 #define MSG_BACKLIGHT 0xd /* H3600 only */
32 #define MSG_CODEC_CTRL 0xe /* H3100 only */
33 #define MSG_DISPLAY_CTRL 0xf /* H3100 only */
44 * struct ipaq_micro_txdev - TX state
56 * struct ipaq_micro_rxdev - RX state
57 * @state: context of RX state machine
60 * @len: RX buffer length
61 * @index: RX buffer index
62 * @buf: RX buffer
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/
Dipaq-micro.h1 /* SPDX-License-Identifier: GPL-2.0 */
31 #define MSG_BACKLIGHT 0xd /* H3600 only */
32 #define MSG_CODEC_CTRL 0xe /* H3100 only */
33 #define MSG_DISPLAY_CTRL 0xf /* H3100 only */
44 * struct ipaq_micro_txdev - TX state
56 * struct ipaq_micro_rxdev - RX state
57 * @state: context of RX state machine
60 * @len: RX buffer length
61 * @index: RX buffer index
62 * @buf: RX buffer
[all …]
/kernel/linux/linux-6.6/Documentation/networking/
Daf_xdp.rst1 .. SPDX-License-Identifier: GPL-2.0
20 XDP programs to redirect frames to a memory buffer in a user-space
24 syscall. Associated with each XSK are two rings: the RX ring and the
25 TX ring. A socket can receive packets on the RX ring and it can send
28 to have at least one of these rings for each socket. An RX or TX
30 UMEM. RX and TX can share the same UMEM so that a packet does not have
31 to be copied between RX and TX. Moreover, if a packet needs to be kept
44 to fill in with RX packet data. References to these frames will then
45 appear in the RX ring once each packet has been received. The
48 space, for either TX or RX. Thus, the frame addrs appearing in the
[all …]
/kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/freescale/
Ddpaa.rst1 .. SPDX-License-Identifier: GPL-2.0
8 - Madalin Bucur <madalin.bucur@nxp.com>
9 - Camelia Groza <camelia.groza@nxp.com>
13 - DPAA Ethernet Overview
14 - DPAA Ethernet Supported SoCs
15 - Configuring DPAA Ethernet in your kernel
16 - DPAA Ethernet Frame Processing
17 - DPAA Ethernet Features
18 - DPAA IRQ Affinity and Receive Side Scaling
19 - Debugging
[all …]

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