| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | ti,lmk04832.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liam Beguin <liambeguin@gmail.com>
21 - ti,lmk04832
26 '#address-cells':
29 '#size-cells':
32 '#clock-cells':
35 spi-max-frequency:
40 - description: PLL2 reference clock.
[all …]
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| /kernel/linux/linux-6.6/drivers/usb/gadget/udc/ |
| D | at91_udc.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * at91_udc -- driver for at91-series USB peripheral controller
32 #include <linux/mfd/syscon/atmel-matrix.h>
38 * This controller is simple and PIO-only. It's used in many AT91-series
40 * at91sam926x (arm926ejs, with MMU), and several no-mmu versions.
50 * (and the transceiver) to stay gated off until they're necessary, saving
75 EP_INFO("ep3-int",
90 __raw_readl((udc)->udp_baseaddr + (reg))
92 __raw_writel((val), (udc)->udp_baseaddr + (reg))
94 /*-------------------------------------------------------------------------*/
[all …]
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| D | lpc32xx_udc.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/dma-mapping.h>
78 #define DATA_IN 1 /* Expect dev->host transfer */
79 #define DATA_OUT 2 /* Expect host->dev transfer */
161 /* USB device peripheral - various */
164 bool clocked; member
188 dev_dbg(epp->udc->dev, "%s: " fmt, __func__, ## arg)
190 dev_err(epp->udc->dev, "%s: " fmt, __func__, ## arg)
192 dev_info(epp->udc->dev, "%s: " fmt, __func__, ## arg)
194 dev_warn(epp->udc->dev, "%s:" fmt, __func__, ## arg)
[all …]
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| /kernel/linux/linux-5.10/sound/soc/ti/ |
| D | davinci-i2s.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * based on davinci-mcasp.c DT support
31 #include "edma-pcm.h"
32 #include "davinci-i2s.h"
34 #define DRV_NAME "davinci-i2s"
39 * - This driver supports the "Audio Serial Port" (ASP),
42 * - But it labels it a "Multi-channel Buffered Serial Port"
44 * backward-compatible, possibly explaining that confusion.
46 * - OMAP chips have a controller called McBSP, which is
49 * - Newer DaVinci chips have a controller called McASP,
[all …]
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| /kernel/linux/linux-6.6/sound/soc/ti/ |
| D | davinci-i2s.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * based on davinci-mcasp.c DT support
31 #include "edma-pcm.h"
32 #include "davinci-i2s.h"
34 #define DRV_NAME "davinci-i2s"
39 * - This driver supports the "Audio Serial Port" (ASP),
42 * - But it labels it a "Multi-channel Buffered Serial Port"
44 * backward-compatible, possibly explaining that confusion.
46 * - OMAP chips have a controller called McBSP, which is
49 * - Newer DaVinci chips have a controller called McASP,
[all …]
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| /kernel/linux/linux-5.10/drivers/usb/gadget/udc/ |
| D | at91_udc.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * at91_udc -- driver for at91-series USB peripheral controller
32 #include <linux/mfd/syscon/atmel-matrix.h>
38 * This controller is simple and PIO-only. It's used in many AT91-series
40 * at91sam926x (arm926ejs, with MMU), and several no-mmu versions.
50 * (and the transceiver) to stay gated off until they're necessary, saving
75 EP_INFO("ep3-int",
90 __raw_readl((udc)->udp_baseaddr + (reg))
92 __raw_writel((val), (udc)->udp_baseaddr + (reg))
94 /*-------------------------------------------------------------------------*/
[all …]
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| D | lpc32xx_udc.c | 1 // SPDX-License-Identifier: GPL-2.0+
20 #include <linux/dma-mapping.h>
78 #define DATA_IN 1 /* Expect dev->host transfer */
79 #define DATA_OUT 2 /* Expect host->dev transfer */
162 /* USB device peripheral - various */
165 bool clocked; member
189 dev_dbg(epp->udc->dev, "%s: " fmt, __func__, ## arg)
191 dev_err(epp->udc->dev, "%s: " fmt, __func__, ## arg)
193 dev_info(epp->udc->dev, "%s: " fmt, __func__, ## arg)
195 dev_warn(epp->udc->dev, "%s:" fmt, __func__, ## arg)
[all …]
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| /kernel/linux/linux-6.6/Documentation/networking/ |
| D | phy.rst | 26 #. Increase code-reuse
27 #. Increase overall code-maintainability
67 for one of the users. (e.g. "git grep fsl,.*-mdio arch/powerpc/boot/dts/")
72 The Reduced Gigabit Medium Independent Interface (RGMII) is a 12-pin
84 or the PCB traces insert the correct 1.5-2ns delay
97 * PHY devices may offer sub-nanosecond granularity in how they allow a
115 PHY_INTERFACE_MODE_RGMII, it should make sure that the MAC-level delays are
130 -----------------------------------------
197 PHY-specific flags should be set in phydev->dev_flags prior to the call
208 Now just make sure that phydev->supported and phydev->advertising have any
[all …]
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| /kernel/linux/linux-5.10/drivers/usb/musb/ |
| D | davinci.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005-2006 by Texas Instruments
18 #include <linux/dma-mapping.h>
24 #include <asm/mach-types.h>
54 /* power everything up; start the on-chip PHY and its PLL */ in phy_on()
68 /* powerdown the on-chip PHY, its PLL, and the OTG block */ in phy_off()
81 tmp = (musb->epmask & DAVINCI_USB_TX_ENDPTS_MASK) in davinci_musb_enable()
83 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); in davinci_musb_enable()
85 tmp = (musb->epmask & (0xfffe & DAVINCI_USB_RX_ENDPTS_MASK)) in davinci_musb_enable()
87 musb_writel(musb->ctrl_base, DAVINCI_USB_INT_MASK_SET_REG, tmp); in davinci_musb_enable()
[all …]
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| D | da8xx.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments DA8xx/OMAP-L1x "glue layer"
5 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
8 * Copyright (C) 2005-2006 by Texas Instruments
23 #include <linux/dma-mapping.h>
46 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
76 * - not read/write INTRUSB/INTRUSBE (except during
78 * - use INTSET/INTCLR instead.
82 * da8xx_musb_enable - enable interrupts
86 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_enable()
[all …]
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| /kernel/linux/linux-5.10/arch/mips/include/asm/sgi/ |
| D | ioc.h | 20 * All registers are 8-bit wide aligned on 32-bit boundary. Bad things
91 #define SGINT_TCWORD_MOS 0x02 /* One-shot IRQ mode. */
108 * The timer is the good old 8254. Unlike in PCs it's clocked at exactly 1MHz
113 * This is the constant we're using for calibrating the counter.
|
| /kernel/linux/linux-6.6/arch/mips/include/asm/sgi/ |
| D | ioc.h | 20 * All registers are 8-bit wide aligned on 32-bit boundary. Bad things
91 #define SGINT_TCWORD_MOS 0x02 /* One-shot IRQ mode. */
108 * The timer is the good old 8254. Unlike in PCs it's clocked at exactly 1MHz
113 * This is the constant we're using for calibrating the counter.
|
| /kernel/linux/linux-6.6/Documentation/arch/m68k/ |
| D | buddha-driver.rst | 8 ------------------------------------------------------------------------
11 Buddha-part of the Catweasel Zorro-II version
21 product number: 0 (42 for Catweasel Z-II)
23 Rom-vector: $1000
25 The card should be a Z-II board, size 64K, not for freemem
26 list, Rom-Vektor is valid, no second Autoconfig-board on the
30 as the Amiga Kickstart does: The lower nibble of the 8-Bit
32 $48, while it doesn't matter how often you're writing to $4a
36 otherwise your chance is only 1:16 to find the board :-).
38 The local memory-map is even active when mapped to $e8:
[all …]
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| /kernel/linux/linux-5.10/Documentation/m68k/ |
| D | buddha-driver.rst | 8 ------------------------------------------------------------------------
11 Buddha-part of the Catweasel Zorro-II version
21 product number: 0 (42 for Catweasel Z-II)
23 Rom-vector: $1000
25 The card should be a Z-II board, size 64K, not for freemem
26 list, Rom-Vektor is valid, no second Autoconfig-board on the
30 as the Amiga Kickstart does: The lower nibble of the 8-Bit
32 $48, while it doesn't matter how often you're writing to $4a
36 otherwise your chance is only 1:16 to find the board :-).
38 The local memory-map is even active when mapped to $e8:
[all …]
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| /kernel/linux/linux-5.10/Documentation/networking/ |
| D | phy.rst | 26 #. Increase code-reuse
27 #. Increase overall code-maintainability
67 for one of the users. (e.g. "git grep fsl,.*-mdio arch/powerpc/boot/dts/")
72 The Reduced Gigabit Medium Independent Interface (RGMII) is a 12-pin
84 or the PCB traces) insert the correct 1.5-2ns delay
97 * PHY devices may offer sub-nanosecond granularity in how they allow a
115 PHY_INTERFACE_MODE_RGMII, it should make sure that the MAC-level delays are
130 -----------------------------------------
197 PHY-specific flags should be set in phydev->dev_flags prior to the call
208 Now just make sure that phydev->supported and phydev->advertising have any
[all …]
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| /kernel/linux/linux-5.10/drivers/rtc/ |
| D | rtc-coh901331.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2007-2009 ST-Ericsson AB
4 * Real Time Clock interface for ST-Ericsson AB COH 901 331 RTC.
6 * Based on rtc-pl031.c by Deepak Saxena <dsaxena@plexity.net>
27 /* Indication if current time is valid 32bit (R/-) */
29 /* Read the current time 32bit (R/-) */
58 clk_enable(rtap->clk); in coh901331_interrupt()
60 writel(1, rtap->virtbase + COH901331_IRQ_EVENT); in coh901331_interrupt()
63 * the RTC lives on a lower-clocked line and will in coh901331_interrupt()
65 * clock cycles. The interrupt will be re-enabled when in coh901331_interrupt()
[all …]
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| /kernel/linux/linux-5.10/drivers/clocksource/ |
| D | arm_global_timer.c | 1 // SPDX-License-Identifier: GPL-2.0-only
43 * We are expecting to be clocked by the ARM peripheral clock.
55 * 1. Read the upper 32-bit timer counter register
56 * 2. Read the lower 32-bit timer counter register
57 * 3. Read the upper 32-bit timer counter register again. If the value is
58 * different to the 32-bit upper value read previously, go back to step 2.
59 * Otherwise the 64-bit timer counter value is correct.
89 * 2. Write the lower 32-bit Comparator Value Register.
90 * 3. Write the upper 32-bit Comparator Value Register.
147 * the same event in single-shot mode) in gt_clockevent_interrupt()
[all …]
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| /kernel/linux/linux-5.10/drivers/pwm/ |
| D | pwm-sl28cpld.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * enough to be briefly explained. It consists of one 8-bit counter. The PWM
14 * Let cnt[7:0] be the counter, clocked at 32kHz:
15 * +-----------+--------+--------------+-----------+---------------+
17 * +-----------+--------+--------------+-----------+---------------+
22 * +-----------+--------+--------------+-----------+---------------+
25 * - The hardware cannot generate a 100% duty cycle if the prescaler is 0.
26 * - The hardware cannot atomically set the prescaler and the counter value,
28 * - The counter is not reset if you switch the prescaler which leads
30 * - The duty cycle will switch immediately and not after a complete cycle.
[all …]
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| /kernel/linux/linux-6.6/drivers/pwm/ |
| D | pwm-sl28cpld.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * enough to be briefly explained. It consists of one 8-bit counter. The PWM
14 * Let cnt[7:0] be the counter, clocked at 32kHz:
15 * +-----------+--------+--------------+-----------+---------------+
17 * +-----------+--------+--------------+-----------+---------------+
22 * +-----------+--------+--------------+-----------+---------------+
25 * - The hardware cannot generate a 100% duty cycle if the prescaler is 0.
26 * - The hardware cannot atomically set the prescaler and the counter value,
28 * - The counter is not reset if you switch the prescaler which leads
30 * - The duty cycle will switch immediately and not after a complete cycle.
[all …]
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| /kernel/linux/linux-6.6/drivers/bcma/ |
| D | driver_chipcommon.c | 7 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
30 if (cc->capabilities & BCMA_CC_CAP_PMU) in bcma_chipco_get_alp_clock()
39 struct bcma_bus *bus = cc->core->bus; in bcma_core_cc_has_pmu_watchdog()
41 if (cc->capabilities & BCMA_CC_CAP_PMU) { in bcma_core_cc_has_pmu_watchdog()
42 if (bus->chipinfo.id == BCMA_CHIP_ID_BCM53573) { in bcma_core_cc_has_pmu_watchdog()
43 WARN(bus->chipinfo.rev <= 1, "No watchdog available\n"); in bcma_core_cc_has_pmu_watchdog()
58 struct bcma_bus *bus = cc->core->bus; in bcma_chipco_watchdog_get_max_timer()
62 if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) in bcma_chipco_watchdog_get_max_timer()
64 else if (cc->core->id.rev < 26) in bcma_chipco_watchdog_get_max_timer()
67 nb = (cc->core->id.rev >= 37) ? 32 : 24; in bcma_chipco_watchdog_get_max_timer()
[all …]
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| /kernel/linux/linux-5.10/drivers/bcma/ |
| D | driver_chipcommon.c | 7 * Copyright 2012, Hauke Mehrtens <hauke@hauke-m.de>
30 if (cc->capabilities & BCMA_CC_CAP_PMU) in bcma_chipco_get_alp_clock()
39 struct bcma_bus *bus = cc->core->bus; in bcma_core_cc_has_pmu_watchdog()
41 if (cc->capabilities & BCMA_CC_CAP_PMU) { in bcma_core_cc_has_pmu_watchdog()
42 if (bus->chipinfo.id == BCMA_CHIP_ID_BCM53573) { in bcma_core_cc_has_pmu_watchdog()
43 WARN(bus->chipinfo.rev <= 1, "No watchdog available\n"); in bcma_core_cc_has_pmu_watchdog()
58 struct bcma_bus *bus = cc->core->bus; in bcma_chipco_watchdog_get_max_timer()
62 if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) in bcma_chipco_watchdog_get_max_timer()
64 else if (cc->core->id.rev < 26) in bcma_chipco_watchdog_get_max_timer()
67 nb = (cc->core->id.rev >= 37) ? 32 : 24; in bcma_chipco_watchdog_get_max_timer()
[all …]
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| /kernel/linux/linux-6.6/drivers/clocksource/ |
| D | arm_global_timer.c | 1 // SPDX-License-Identifier: GPL-2.0-only
48 * We are expecting to be clocked by the ARM peripheral clock.
61 * 1. Read the upper 32-bit timer counter register
62 * 2. Read the lower 32-bit timer counter register
63 * 3. Read the upper 32-bit timer counter register again. If the value is
64 * different to the 32-bit upper value read previously, go back to step 2.
65 * Otherwise the 64-bit timer counter value is correct.
95 * 2. Write the lower 32-bit Comparator Value Register.
96 * 3. Write the upper 32-bit Comparator Value Register.
156 * the same event in single-shot mode) in gt_clockevent_interrupt()
[all …]
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| /kernel/linux/linux-6.6/drivers/usb/musb/ |
| D | da8xx.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments DA8xx/OMAP-L1x "glue layer"
5 * Copyright (c) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
8 * Copyright (C) 2005-2006 by Texas Instruments
23 #include <linux/dma-mapping.h>
46 #define DA8XX_USB_GENERIC_RNDIS_EP_SIZE_REG(n) (0x50 + (((n) - 1) << 2))
76 * - not read/write INTRUSB/INTRUSBE (except during
78 * - use INTSET/INTCLR instead.
82 * da8xx_musb_enable - enable interrupts
86 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_enable()
[all …]
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| /kernel/linux/linux-5.10/drivers/siox/ |
| D | siox-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2017 Pengutronix, Uwe Kleine-König <kernel@pengutronix.de>
14 * The lowest bit in the SIOX status word signals if the in-device watchdog is
23 * clocked in before. The value clocked in is changed in each cycle and so
29 * Each Siox-Device has a 4 bit type number that is neither 0 nor 15. This is
43 mutex_lock(&smaster->lock); in siox_master_lock()
48 mutex_unlock(&smaster->lock); in siox_master_unlock()
83 if (sdevice->statustype) { in siox_device_type_error()
84 if (statustype != sdevice->statustype) in siox_device_type_error()
107 if (siox_device_type_error(sdevice, sdevice->status_read_clean)) in siox_device_synced()
[all …]
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| /kernel/linux/linux-6.6/drivers/siox/ |
| D | siox-core.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2015-2017 Pengutronix, Uwe Kleine-König <kernel@pengutronix.de>
14 * The lowest bit in the SIOX status word signals if the in-device watchdog is
23 * clocked in before. The value clocked in is changed in each cycle and so
29 * Each Siox-Device has a 4 bit type number that is neither 0 nor 15. This is
43 mutex_lock(&smaster->lock); in siox_master_lock()
48 mutex_unlock(&smaster->lock); in siox_master_unlock()
83 if (sdevice->statustype) { in siox_device_type_error()
84 if (statustype != sdevice->statustype) in siox_device_type_error()
107 if (siox_device_type_error(sdevice, sdevice->status_read_clean)) in siox_device_synced()
[all …]
|