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/kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/
Drk3288-veyron-sdmmc.dtsi3 * Google Veyron (and derivatives) fragment for sdmmc cards
10 mmc1 = &sdmmc;
19 sdmmc {
21 * We run sdmmc at max speed; bump up drive strength.
24 sdmmc_bus4: sdmmc-bus4 {
31 sdmmc_clk: sdmmc-clk {
35 sdmmc_cmd: sdmmc-cmd {
45 sdmmc_cd_disabled: sdmmc-cd-disabled {
50 sdmmc_cd_pin: sdmmc-cd-pin {
80 &sdmmc {
Drk3288-phycore-rdk.dts175 sdmmc {
180 sdmmc_bus4: sdmmc-bus4 {
187 sdmmc_clk: sdmmc-clk {
191 sdmmc_cmd: sdmmc-cmd {
195 sdmmc_pwr: sdmmc-pwr {
223 &sdmmc {
Drk3288-veyron-mighty.dts20 &sdmmc {
29 sdmmc {
30 sdmmc_wp_pin: sdmmc-wp-pin {
Drk3288-evb.dtsi170 vcc_sd: sdmmc-regulator {
224 &sdmmc {
339 sdmmc {
344 sdmmc_bus4: sdmmc-bus4 {
351 sdmmc_clk: sdmmc-clk {
355 sdmmc_cmd: sdmmc-cmd {
359 sdmmc_pwr: sdmmc-pwr {
Drk3288-firefly-reload.dts110 vcc_sd: sdmmc-regulator {
241 &sdmmc {
346 sdmmc {
351 sdmmc_bus4: sdmmc-bus4 {
358 sdmmc_clk: sdmmc-clk {
362 sdmmc_cmd: sdmmc-cmd {
366 sdmmc_pwr: sdmmc-pwr {
Drk3288-miqi.dts61 vcc_sd: sdmmc-regulator {
341 sdmmc {
346 sdmmc_bus4: sdmmc-bus4 {
353 sdmmc_clk: sdmmc-clk {
357 sdmmc_cmd: sdmmc-cmd {
361 sdmmc_pwr: sdmmc-pwr {
378 &sdmmc {
Drk3288-veyron-pinky.dts107 sdmmc {
108 sdmmc_wp_pin: sdmmc-wp-pin {
127 &sdmmc {
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Drk3288-veyron-sdmmc.dtsi3 * Google Veyron (and derivatives) fragment for sdmmc cards
13 sdmmc {
15 * We run sdmmc at max speed; bump up drive strength.
18 sdmmc_bus4: sdmmc-bus4 {
25 sdmmc_clk: sdmmc-clk {
29 sdmmc_cmd: sdmmc-cmd {
39 sdmmc_cd_disabled: sdmmc-cd-disabled {
44 sdmmc_cd_pin: sdmmc-cd-pin {
74 &sdmmc {
Drk3288-phycore-rdk.dts175 sdmmc {
180 sdmmc_bus4: sdmmc-bus4 {
187 sdmmc_clk: sdmmc-clk {
191 sdmmc_cmd: sdmmc-cmd {
195 sdmmc_pwr: sdmmc-pwr {
223 &sdmmc {
Drk3288-veyron-mighty.dts20 &sdmmc {
29 sdmmc {
30 sdmmc_wp_pin: sdmmc-wp-pin {
Drk3288-evb.dtsi170 vcc_sd: sdmmc-regulator {
224 &sdmmc {
339 sdmmc {
344 sdmmc_bus4: sdmmc-bus4 {
351 sdmmc_clk: sdmmc-clk {
355 sdmmc_cmd: sdmmc-cmd {
359 sdmmc_pwr: sdmmc-pwr {
Drk3288-firefly-reload.dts110 vcc_sd: sdmmc-regulator {
241 &sdmmc {
346 sdmmc {
351 sdmmc_bus4: sdmmc-bus4 {
358 sdmmc_clk: sdmmc-clk {
362 sdmmc_cmd: sdmmc-cmd {
366 sdmmc_pwr: sdmmc-pwr {
Drk3288-miqi.dts61 vcc_sd: sdmmc-regulator {
337 sdmmc {
342 sdmmc_bus4: sdmmc-bus4 {
349 sdmmc_clk: sdmmc-clk {
353 sdmmc_cmd: sdmmc-cmd {
357 sdmmc_pwr: sdmmc-pwr {
374 &sdmmc {
Drk3288-veyron-pinky.dts107 sdmmc {
108 sdmmc_wp_pin: sdmmc-wp-pin {
127 &sdmmc {
Drk3288-tinker.dtsi99 vcc_sd: sdmmc-regulator {
409 sdmmc {
410 sdmmc_bus4: sdmmc-bus4 {
417 sdmmc_clk: sdmmc-clk {
421 sdmmc_cmd: sdmmc-cmd {
425 sdmmc_pwr: sdmmc-pwr {
457 &sdmmc {
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dnvidia,tegra20-sdhci.yaml228 - const: sdmmc-3v3
230 - const: sdmmc-1v8
232 - const: sdmmc-3v3-drv
234 - const: sdmmc-1v8-drv
237 - const: sdmmc-3v3-drv
239 - const: sdmmc-1v8-drv
242 - const: sdmmc-1v8-drv
257 - const: sdmmc-3v3
259 - const: sdmmc-1v8
296 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
[all …]
Dsynopsys-dw-mshc.yaml43 - description: register offset that controls the SDMMC clock phase
47 that contains the SDMMC clock-phase control register. The first value is
49 SDMMC clock phase register, and the 3rd value is the bit shift for the
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dnvidia,tegra20-sdhci.txt52 configurations. Valid pinctrl-names are "sdmmc-3v3" and "sdmmc-1v8"
56 - pinctrl-names : "sdmmc-3v3-drv" and "sdmmc-1v8-drv" are applicable for
116 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
135 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3368-orion-r68-meta.dts15 mmc0 = &sdmmc;
272 sdmmc {
273 sdmmc_clk: sdmmc-clk {
277 sdmmc_cmd: sdmmc-cmd {
281 sdmmc_cd: sdmmc-cd {
285 sdmmc_bus1: sdmmc-bus1 {
289 sdmmc_bus4: sdmmc-bus4 {
309 &sdmmc {
Drk3368-lion-haikou.dts14 mmc1 = &sdmmc;
71 &sdmmc {
131 sdmmc {
132 sdmmc_cd_pin: sdmmc-cd-pin {
/kernel/linux/linux-6.6/drivers/pinctrl/
Dpinctrl-lpc18xx.c163 [FUNC_SDMMC] = "sdmmc",
245 LPC_P(1,3, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND);
246 LPC_P(1,4, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND);
247 LPC_P(1,5, GPIO, CTOUT, R, EMC, USB0, SSP1, SGPIO, SDMMC, 0, ND);
248 LPC_P(1,6, GPIO, CTIN, R, EMC, R, R, SGPIO, SDMMC, 0, ND);
250 LPC_P(1,8, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND);
251 LPC_P(1,9, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND);
252 LPC_P(1,10, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND);
253 LPC_P(1,11, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND);
254 LPC_P(1,12, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, SDMMC, 0, ND);
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinctrl-lpc18xx.c161 [FUNC_SDMMC] = "sdmmc",
243 LPC_P(1,3, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND);
244 LPC_P(1,4, GPIO, CTOUT, SGPIO, EMC, USB0, SSP1, R, SDMMC, 0, ND);
245 LPC_P(1,5, GPIO, CTOUT, R, EMC, USB0, SSP1, SGPIO, SDMMC, 0, ND);
246 LPC_P(1,6, GPIO, CTIN, R, EMC, R, R, SGPIO, SDMMC, 0, ND);
248 LPC_P(1,8, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND);
249 LPC_P(1,9, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND);
250 LPC_P(1,10, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND);
251 LPC_P(1,11, GPIO, UART1, CTOUT, EMC, R, R, R, SDMMC, 0, ND);
252 LPC_P(1,12, GPIO, UART1, R, EMC, TIMER0, R, SGPIO, SDMMC, 0, ND);
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/rockchip/
Drk3368-orion-r68-meta.dts268 sdmmc {
269 sdmmc_clk: sdmmc-clk {
273 sdmmc_cmd: sdmmc-cmd {
277 sdmmc_cd: sdmmc-cd {
281 sdmmc_bus1: sdmmc-bus1 {
285 sdmmc_bus4: sdmmc-bus4 {
305 &sdmmc {
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/edac/
Dsocfpga-eccmgr.txt125 SDMMC FIFO ECC
127 - compatible : Should be "altr,socfpga-sdmmc-ecc"
224 sdmmc-ecc@ff8c2c00 {
225 compatible = "altr,socfpga-sdmmc-ecc";
296 SDMMC FIFO ECC
298 - compatible : Should be "altr,socfpga-s10-sdmmc-ecc"
376 sdmmc-ecc@ff8c8c00 {
377 compatible = "altr,socfpga-s10-sdmmc-ecc";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/edac/
Dsocfpga-eccmgr.txt125 SDMMC FIFO ECC
127 - compatible : Should be "altr,socfpga-sdmmc-ecc"
224 sdmmc-ecc@ff8c2c00 {
225 compatible = "altr,socfpga-sdmmc-ecc";
296 SDMMC FIFO ECC
298 - compatible : Should be "altr,socfpga-s10-sdmmc-ecc"
376 sdmmc-ecc@ff8c8c00 {
377 compatible = "altr,socfpga-s10-sdmmc-ecc";

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