Searched +full:setclk +full:- +full:- (Results 1 – 4 of 4) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0-only31 adap->setclk(adap, 0); in sendbyte()32 udelay(adap->data_hold); in sendbyte()33 adap->setdat(adap, byte & 1); in sendbyte()34 udelay(adap->data_setup); in sendbyte()35 adap->setclk(adap, 1); in sendbyte()36 udelay(adap->clock_high); in sendbyte()53 udelay(adap->mode_hold); in sendbytes()54 adap->setmode(adap, 0); in sendbytes()55 udelay(adap->mode); in sendbytes()[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)4 ---5 $id: http://devicetree.org/schemas/clock/baikal,bt1-ccu-div.yaml#6 $schema: http://devicetree.org/meta-schemas/core.yaml#8 title: Baikal-T1 Clock Control Unit Dividers11 - Serge Semin <fancer.lancer@gmail.com>14 Clocks Control Unit is the core of Baikal-T1 SoC System Controller18 IP-blocks or to groups of blocks (clock domains). The transformation is done19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The22 registers. Baikal-T1 CCU is logically divided into the next components:[all …]
1 /* SPDX-License-Identifier: GPL-2.0 */7 void (*setclk)(struct l3_pins *, int); member