| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iommu/ |
| D | arm,smmu.yaml | 4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml#
18 The SMMU may also raise interrupts in response to various fault
26 - description: Qcom SoCs implementing "arm,smmu-v2"
29 - qcom,msm8996-smmu-v2
30 - qcom,msm8998-smmu-v2
31 - qcom,sdm630-smmu-v2
32 - qcom,sm6375-smmu-v2
33 - const: qcom,smmu-v2
35 - description: Qcom SoCs implementing "qcom,smmu-500" and "arm,mmu-500"
38 - qcom,qcm2290-smmu-500
[all …]
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| /kernel/linux/linux-6.6/drivers/iommu/arm/arm-smmu/ |
| D | arm-smmu.c | 3 * IOMMU API for ARM architected SMMU implementations.
13 * - Non-secure access to the SMMU
18 #define pr_fmt(fmt) "arm-smmu: " fmt
40 #include "arm-smmu.h"
44 * Apparently, some Qualcomm arm64 platforms which appear to expose their SMMU
58 …"Force SMMU mappings to be installed at a particular stage of translation. A value of '1' or '2' f…
63 …domain will report an abort back to the device and will not be allowed to pass through the SMMU.");
71 static inline int arm_smmu_rpm_get(struct arm_smmu_device *smmu) in arm_smmu_rpm_get() argument
73 if (pm_runtime_enabled(smmu->dev)) in arm_smmu_rpm_get()
74 return pm_runtime_resume_and_get(smmu->dev); in arm_smmu_rpm_get()
[all …]
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| D | arm-smmu-qcom.c | 7 #include <linux/adreno-smmu-priv.h>
12 #include "arm-smmu.h"
13 #include "arm-smmu-qcom.h"
17 static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu) in to_qcom_smmu() argument
19 return container_of(smmu, struct qcom_smmu, smmu); in to_qcom_smmu()
22 static void qcom_smmu_tlb_sync(struct arm_smmu_device *smmu, int page, in qcom_smmu_tlb_sync() argument
28 arm_smmu_writel(smmu, page, sync, QCOM_DUMMY_VAL); in qcom_smmu_tlb_sync()
31 reg = arm_smmu_readl(smmu, page, status); in qcom_smmu_tlb_sync()
39 qcom_smmu_tlb_sync_debug(smmu); in qcom_smmu_tlb_sync()
42 static void qcom_adreno_smmu_write_sctlr(struct arm_smmu_device *smmu, int idx, in qcom_adreno_smmu_write_sctlr() argument
[all …]
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| D | arm-smmu-impl.c | 2 // Miscellaneous Arm SMMU implementation and integration quirks
5 #define pr_fmt(fmt) "arm-smmu: " fmt
10 #include "arm-smmu.h"
28 static u32 arm_smmu_read_ns(struct arm_smmu_device *smmu, int page, in arm_smmu_read_ns() argument
33 return readl_relaxed(arm_smmu_page(smmu, page) + offset); in arm_smmu_read_ns()
36 static void arm_smmu_write_ns(struct arm_smmu_device *smmu, int page, in arm_smmu_write_ns() argument
41 writel_relaxed(val, arm_smmu_page(smmu, page) + offset); in arm_smmu_write_ns()
52 struct arm_smmu_device smmu; member
56 static int cavium_cfg_probe(struct arm_smmu_device *smmu) in cavium_cfg_probe() argument
59 struct cavium_smmu *cs = container_of(smmu, struct cavium_smmu, smmu); in cavium_cfg_probe()
[all …]
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| D | arm-smmu-nvidia.c | 12 #include "arm-smmu.h"
21 * In addition, the SMMU driver needs to coordinate with the memory controller
30 * SMMU instance.
35 struct arm_smmu_device smmu; member
41 static inline struct nvidia_smmu *to_nvidia_smmu(struct arm_smmu_device *smmu) in to_nvidia_smmu() argument
43 return container_of(smmu, struct nvidia_smmu, smmu); in to_nvidia_smmu()
46 static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu, in nvidia_smmu_page() argument
51 nvidia_smmu = container_of(smmu, struct nvidia_smmu, smmu); in nvidia_smmu_page()
52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page()
55 static u32 nvidia_smmu_read_reg(struct arm_smmu_device *smmu, in nvidia_smmu_read_reg() argument
[all …]
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| D | arm-smmu.h | 3 * IOMMU API for ARM architected SMMU implementations.
242 /* Maximum number of context banks per SMMU */
368 struct arm_smmu_device *smmu; member
374 struct mutex init_mutex; /* Protects smmu pointer */
380 struct arm_smmu_device *smmu; member
425 u32 (*read_reg)(struct arm_smmu_device *smmu, int page, int offset);
426 void (*write_reg)(struct arm_smmu_device *smmu, int page, int offset,
428 u64 (*read_reg64)(struct arm_smmu_device *smmu, int page, int offset);
429 void (*write_reg64)(struct arm_smmu_device *smmu, int page, int offset,
431 int (*cfg_probe)(struct arm_smmu_device *smmu);
[all …]
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| D | arm-smmu-qcom-debug.c | 10 #include "arm-smmu.h"
11 #include "arm-smmu-qcom.h"
13 void qcom_smmu_tlb_sync_debug(struct arm_smmu_device *smmu) in qcom_smmu_tlb_sync_debug() argument
17 struct qcom_smmu *qsmmu = container_of(smmu, struct qcom_smmu, smmu); in qcom_smmu_tlb_sync_debug()
23 dev_err(smmu->dev, "TLB sync timed out -- SMMU may be deadlocked\n"); in qcom_smmu_tlb_sync_debug()
29 ret = qcom_scm_io_readl(smmu->ioaddr + cfg->reg_offset[QCOM_SMMU_TBU_PWR_STATUS], in qcom_smmu_tlb_sync_debug()
32 dev_err(smmu->dev, in qcom_smmu_tlb_sync_debug()
35 ret = qcom_scm_io_readl(smmu->ioaddr + cfg->reg_offset[QCOM_SMMU_STATS_SYNC_INV_TBU_ACK], in qcom_smmu_tlb_sync_debug()
38 dev_err(smmu->dev, in qcom_smmu_tlb_sync_debug()
41 ret = qcom_scm_io_readl(smmu->ioaddr + cfg->reg_offset[QCOM_SMMU_MMU2QSS_AND_SAFE_WAIT_CNTR], in qcom_smmu_tlb_sync_debug()
[all …]
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| /kernel/linux/linux-5.10/drivers/iommu/arm/arm-smmu/ |
| D | arm-smmu.c | 3 * IOMMU API for ARM architected SMMU implementations.
13 * - Non-secure access to the SMMU
18 #define pr_fmt(fmt) "arm-smmu: " fmt
44 #include "arm-smmu.h"
47 * Apparently, some Qualcomm arm64 platforms which appear to expose their SMMU
61 …"Force SMMU mappings to be installed at a particular stage of translation. A value of '1' or '2' f…
66 …domain will report an abort back to the device and will not be allowed to pass through the SMMU.");
74 static inline int arm_smmu_rpm_get(struct arm_smmu_device *smmu) in arm_smmu_rpm_get() argument
76 if (pm_runtime_enabled(smmu->dev)) in arm_smmu_rpm_get()
77 return pm_runtime_resume_and_get(smmu->dev); in arm_smmu_rpm_get()
[all …]
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| D | arm-smmu-impl.c | 2 // Miscellaneous Arm SMMU implementation and integration quirks
5 #define pr_fmt(fmt) "arm-smmu: " fmt
10 #include "arm-smmu.h"
28 static u32 arm_smmu_read_ns(struct arm_smmu_device *smmu, int page, in arm_smmu_read_ns() argument
33 return readl_relaxed(arm_smmu_page(smmu, page) + offset); in arm_smmu_read_ns()
36 static void arm_smmu_write_ns(struct arm_smmu_device *smmu, int page, in arm_smmu_write_ns() argument
41 writel_relaxed(val, arm_smmu_page(smmu, page) + offset); in arm_smmu_write_ns()
52 struct arm_smmu_device smmu; member
56 static int cavium_cfg_probe(struct arm_smmu_device *smmu) in cavium_cfg_probe() argument
59 struct cavium_smmu *cs = container_of(smmu, struct cavium_smmu, smmu); in cavium_cfg_probe()
[all …]
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| D | arm-smmu-nvidia.c | 10 #include "arm-smmu.h"
20 * The third instance usage is through standard arm-smmu driver itself and
26 struct arm_smmu_device smmu; member
30 static inline void __iomem *nvidia_smmu_page(struct arm_smmu_device *smmu, in nvidia_smmu_page() argument
35 nvidia_smmu = container_of(smmu, struct nvidia_smmu, smmu); in nvidia_smmu_page()
36 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page()
39 static u32 nvidia_smmu_read_reg(struct arm_smmu_device *smmu, in nvidia_smmu_read_reg() argument
42 void __iomem *reg = nvidia_smmu_page(smmu, 0, page) + offset; in nvidia_smmu_read_reg()
47 static void nvidia_smmu_write_reg(struct arm_smmu_device *smmu, in nvidia_smmu_write_reg() argument
53 void __iomem *reg = nvidia_smmu_page(smmu, i, page) + offset; in nvidia_smmu_write_reg()
[all …]
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| D | arm-smmu-qcom.c | 9 #include "arm-smmu.h"
12 struct arm_smmu_device smmu; member
17 static struct qcom_smmu *to_qcom_smmu(struct arm_smmu_device *smmu) in to_qcom_smmu() argument
19 return container_of(smmu, struct qcom_smmu, smmu); in to_qcom_smmu()
34 static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) in qcom_smmu_cfg_probe() argument
36 struct qcom_smmu *qsmmu = to_qcom_smmu(smmu); in qcom_smmu_cfg_probe()
43 * Some platforms support more than the Arm SMMU architected maximum of in qcom_smmu_cfg_probe()
49 if (smmu->num_mapping_groups > 128) { in qcom_smmu_cfg_probe()
50 dev_notice(smmu->dev, "\tLimiting the stream matching groups to 128\n"); in qcom_smmu_cfg_probe()
51 smmu->num_mapping_groups = 128; in qcom_smmu_cfg_probe()
[all …]
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| D | arm-smmu.h | 3 * IOMMU API for ARM architected SMMU implementations.
239 /* Maximum number of context banks per SMMU */
364 struct arm_smmu_device *smmu; member
370 struct mutex init_mutex; /* Protects smmu pointer */
376 struct arm_smmu_device *smmu; member
421 u32 (*read_reg)(struct arm_smmu_device *smmu, int page, int offset);
422 void (*write_reg)(struct arm_smmu_device *smmu, int page, int offset,
424 u64 (*read_reg64)(struct arm_smmu_device *smmu, int page, int offset);
425 void (*write_reg64)(struct arm_smmu_device *smmu, int page, int offset,
427 int (*cfg_probe)(struct arm_smmu_device *smmu);
[all …]
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| /kernel/linux/linux-5.10/drivers/iommu/ |
| D | tegra-smmu.c | 23 struct tegra_smmu *smmu; member
53 struct tegra_smmu *smmu; member
69 static inline void smmu_writel(struct tegra_smmu *smmu, u32 value, in smmu_writel() argument
72 writel(value, smmu->regs + offset); in smmu_writel()
75 static inline u32 smmu_readl(struct tegra_smmu *smmu, unsigned long offset) in smmu_readl() argument
77 return readl(smmu->regs + offset); in smmu_readl()
86 #define SMMU_TLB_CONFIG_ACTIVE_LINES(smmu) \ argument
87 ((smmu)->soc->num_tlb_lines & (smmu)->tlb_mask)
165 static bool smmu_dma_addr_valid(struct tegra_smmu *smmu, dma_addr_t addr) in smmu_dma_addr_valid() argument
168 return (addr & smmu->pfn_mask) == addr; in smmu_dma_addr_valid()
[all …]
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| /kernel/linux/linux-6.6/drivers/iommu/ |
| D | tegra-smmu.c | 24 struct tegra_smmu *smmu; member
54 struct tegra_smmu *smmu; member
70 static inline void smmu_writel(struct tegra_smmu *smmu, u32 value, in smmu_writel() argument
73 writel(value, smmu->regs + offset); in smmu_writel()
76 static inline u32 smmu_readl(struct tegra_smmu *smmu, unsigned long offset) in smmu_readl() argument
78 return readl(smmu->regs + offset); in smmu_readl()
87 #define SMMU_TLB_CONFIG_ACTIVE_LINES(smmu) \ argument
88 ((smmu)->soc->num_tlb_lines & (smmu)->tlb_mask)
166 static bool smmu_dma_addr_valid(struct tegra_smmu *smmu, dma_addr_t addr) in smmu_dma_addr_valid() argument
169 return (addr & smmu->pfn_mask) == addr; in smmu_dma_addr_valid()
[all …]
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| /kernel/linux/linux-6.6/drivers/iommu/arm/arm-smmu-v3/ |
| D | arm-smmu-v3.c | 30 #include "arm-smmu-v3.h"
37 …domain will report an abort back to the device and will not be allowed to pass through the SMMU.");
89 static void parse_driver_options(struct arm_smmu_device *smmu) in parse_driver_options() argument
94 if (of_property_read_bool(smmu->dev->of_node, in parse_driver_options()
96 smmu->options |= arm_smmu_options[i].opt; in parse_driver_options()
97 dev_notice(smmu->dev, "option %s\n", in parse_driver_options()
192 static void queue_poll_init(struct arm_smmu_device *smmu, in queue_poll_init() argument
197 qp->wfe = !!(smmu->features & ARM_SMMU_FEAT_SEV); in queue_poll_init()
348 static struct arm_smmu_cmdq *arm_smmu_get_cmdq(struct arm_smmu_device *smmu) in arm_smmu_get_cmdq() argument
350 return &smmu->cmdq; in arm_smmu_get_cmdq()
[all …]
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| /kernel/linux/linux-5.10/drivers/iommu/arm/arm-smmu-v3/ |
| D | arm-smmu-v3.c | 34 #include "arm-smmu-v3.h"
39 …domain will report an abort back to the device and will not be allowed to pass through the SMMU.");
86 struct arm_smmu_device *smmu) in arm_smmu_page1_fixup() argument
89 return smmu->page1 + offset - SZ_64K; in arm_smmu_page1_fixup()
91 return smmu->base + offset; in arm_smmu_page1_fixup()
99 static void parse_driver_options(struct arm_smmu_device *smmu) in parse_driver_options() argument
104 if (of_property_read_bool(smmu->dev->of_node, in parse_driver_options()
106 smmu->options |= arm_smmu_options[i].opt; in parse_driver_options()
107 dev_notice(smmu->dev, "option %s\n", in parse_driver_options()
202 static void queue_poll_init(struct arm_smmu_device *smmu, in queue_poll_init() argument
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iommu/ |
| D | arm,smmu.yaml | 4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml#
18 The SMMU may also raise interrupts in response to various fault
26 - description: Qcom SoCs implementing "arm,smmu-v2"
29 - qcom,msm8996-smmu-v2
30 - qcom,msm8998-smmu-v2
31 - qcom,sc7180-smmu-v2
32 - qcom,sdm845-smmu-v2
33 - const: qcom,smmu-v2
38 - qcom,sc7180-smmu-500
39 - qcom,sdm845-smmu-500
[all …]
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| /kernel/linux/linux-5.10/drivers/memory/tegra/ |
| D | tegra30.c | 43 .smmu = {
57 .smmu = {
71 .smmu = {
85 .smmu = {
99 .smmu = {
113 .smmu = {
127 .smmu = {
141 .smmu = {
155 .smmu = {
169 .smmu = {
[all …]
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| D | tegra210.c | 19 .smmu = {
33 .smmu = {
47 .smmu = {
61 .smmu = {
75 .smmu = {
89 .smmu = {
103 .smmu = {
117 .smmu = {
131 .smmu = {
145 .smmu = {
[all …]
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| D | tegra114.c | 22 .smmu = {
36 .smmu = {
50 .smmu = {
64 .smmu = {
78 .smmu = {
92 .smmu = {
106 .smmu = {
120 .smmu = {
134 .smmu = {
148 .smmu = {
[all …]
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| D | tegra124.c | 22 .smmu = {
36 .smmu = {
50 .smmu = {
64 .smmu = {
78 .smmu = {
92 .smmu = {
106 .smmu = {
120 .smmu = {
134 .smmu = {
148 .smmu = {
[all …]
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| /kernel/linux/linux-6.6/drivers/memory/tegra/ |
| D | tegra210.c | 20 .smmu = {
36 .smmu = {
52 .smmu = {
68 .smmu = {
84 .smmu = {
100 .smmu = {
116 .smmu = {
132 .smmu = {
148 .smmu = {
164 .smmu = {
[all …]
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| D | tegra114.c | 31 .smmu = {
47 .smmu = {
63 .smmu = {
79 .smmu = {
95 .smmu = {
111 .smmu = {
127 .smmu = {
143 .smmu = {
159 .smmu = {
175 .smmu = {
[all …]
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| D | tegra124.c | 32 .smmu = {
48 .smmu = {
64 .smmu = {
80 .smmu = {
96 .smmu = {
112 .smmu = {
128 .smmu = {
144 .smmu = {
160 .smmu = {
176 .smmu = {
[all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/ |
| D | armada-8040.dtsi | 20 <0x0 &smmu 0x480 0x20>,
21 <0x100 &smmu 0x4a0 0x20>,
22 <0x200 &smmu 0x4c0 0x20>;
36 iommus = <&smmu 0x444>;
40 iommus = <&smmu 0x445>;
44 iommus = <&smmu 0x440>;
48 iommus = <&smmu 0x441>;
52 iommus = <&smmu 0x454>;
56 iommus = <&smmu 0x450>;
60 iommus = <&smmu 0x451>;
|