| /kernel/linux/linux-6.6/drivers/mtd/spi-nor/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 spi-nor-objs := core.o sfdp.o swp.o otp.o sysfs.o
4 spi-nor-objs += atmel.o
5 spi-nor-objs += catalyst.o
6 spi-nor-objs += eon.o
7 spi-nor-objs += esmt.o
8 spi-nor-objs += everspin.o
9 spi-nor-objs += fujitsu.o
10 spi-nor-objs += gigadevice.o
11 spi-nor-objs += intel.o
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| D | sysfs.c | 1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/mtd/spi-nor.h>
4 #include <linux/spi/spi.h>
5 #include <linux/spi/spi-mem.h>
13 struct spi_device *spi = to_spi_device(dev); in manufacturer_show() local
14 struct spi_mem *spimem = spi_get_drvdata(spi); in manufacturer_show()
15 struct spi_nor *nor = spi_mem_get_drvdata(spimem); in manufacturer_show() local
17 return sysfs_emit(buf, "%s\n", nor->manufacturer->name); in manufacturer_show()
24 struct spi_device *spi = to_spi_device(dev); in partname_show() local
25 struct spi_mem *spimem = spi_get_drvdata(spi); in partname_show()
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| D | core.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 /* Standard SPI NOR flash operations. */
155 /* Dual SPI */
161 /* Quad SPI */
167 /* Octal SPI */
180 /* Quad SPI */
185 /* Octal SPI */
195 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
201 * @opcode: the SPI command op code to erase the sector/block.
216 * struct spi_nor_erase_command - Used for non-uniform erases
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| D | core.c | 1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mtd/spi-nor.h>
23 #include <linux/spi/flash.h>
30 * For everything but full-chip erase; probably could be much smaller, but kept
36 * For full-chip erase, calibrated to a 2MB flash (M25P16); should be scaled up
47 * spi_nor_get_cmd_ext() - Get the command opcode extension based on the
49 * @nor: pointer to a 'struct spi_nor'
57 static u8 spi_nor_get_cmd_ext(const struct spi_nor *nor, in spi_nor_get_cmd_ext() argument
60 switch (nor->cmd_ext_type) { in spi_nor_get_cmd_ext()
62 return ~op->cmd.opcode; in spi_nor_get_cmd_ext()
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| /kernel/linux/linux-5.10/drivers/mtd/spi-nor/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0
3 spi-nor-objs := core.o sfdp.o
4 spi-nor-objs += atmel.o
5 spi-nor-objs += catalyst.o
6 spi-nor-objs += eon.o
7 spi-nor-objs += esmt.o
8 spi-nor-objs += everspin.o
9 spi-nor-objs += fujitsu.o
10 spi-nor-objs += gigadevice.o
11 spi-nor-objs += intel.o
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| D | core.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
48 /* Dual SPI */
54 /* Quad SPI */
60 /* Octal SPI */
72 /* Quad SPI */
77 /* Octal SPI */
86 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
92 * @opcode: the SPI command op code to erase the sector/block.
107 * struct spi_nor_erase_command - Used for non-uniform erases
110 * are run-length encoded.
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| D | core.c | 1 // SPDX-License-Identifier: GPL-2.0
22 #include <linux/spi/flash.h>
23 #include <linux/mtd/spi-nor.h>
30 * For everything but full-chip erase; probably could be much smaller, but kept
36 * For full-chip erase, calibrated to a 2MB flash (M25P16); should be scaled up
44 * spi_nor_spimem_bounce() - check if a bounce buffer is needed for the data
46 * @nor: pointer to 'struct spi_nor'
53 static bool spi_nor_spimem_bounce(struct spi_nor *nor, struct spi_mem_op *op) in spi_nor_spimem_bounce() argument
55 /* op->data.buf.in occupies the same memory as op->data.buf.out */ in spi_nor_spimem_bounce()
56 if (object_is_on_stack(op->data.buf.in) || in spi_nor_spimem_bounce()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/ |
| D | mediatek,spi-mtk-nor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Serial NOR flash controller for MediaTek ARM SoCs
10 - Bayi Cheng <bayi.cheng@mediatek.com>
11 - Chuanhong Guo <gch981213@gmail.com>
14 This spi controller support single, dual, or quad mode transfer for
15 SPI NOR flash. There should be only one spi slave device following
16 generic spi bindings. It's not recommended to use this controller
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| D | cdns,xspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 # Copyright 2020-21 Cadence
4 ---
5 $id: http://devicetree.org/schemas/spi/cdns,xspi.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Parshuram Thombare <pthombar@cadence.com>
14 The XSPI controller allows SPI protocol communication in
16 read/write access to slaves such as SPI-NOR flash.
19 - $ref: spi-controller.yaml#
23 const: cdns,xspi-nor
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| /kernel/linux/linux-5.10/Documentation/driver-api/mtd/ |
| D | spi-nor.rst | 2 SPI NOR framework
5 Part I - Why do we need this framework?
6 ---------------------------------------
8 SPI bus controllers (drivers/spi/) only deal with streams of bytes; the bus
11 arbitrary streams of bytes, but rather are designed specifically for SPI NOR.
13 In particular, Freescale's QuadSPI controller must know the NOR commands to
14 find the right LUT sequence. Unfortunately, the SPI subsystem has no notion of
15 opcodes, addresses, or data payloads; a SPI controller simply knows to send or
18 details of the SPI NOR protocol.
20 Part II - How does the framework work?
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/ |
| D | mediatek,spi-mtk-nor.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Serial NOR flash controller for MediaTek ARM SoCs
10 - Bayi Cheng <bayi.cheng@mediatek.com>
11 - Chuanhong Guo <gch981213@gmail.com>
14 This spi controller support single, dual, or quad mode transfer for
15 SPI NOR flash. There should be only one spi slave device following
16 generic spi bindings. It's not recommended to use this controller
[all …]
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| /kernel/linux/linux-6.6/Documentation/driver-api/mtd/ |
| D | spi-nor.rst | 2 SPI NOR framework
5 Part I - Why do we need this framework?
6 ---------------------------------------
8 SPI bus controllers (drivers/spi/) only deal with streams of bytes; the bus
11 arbitrary streams of bytes, but rather are designed specifically for SPI NOR.
13 In particular, Freescale's QuadSPI controller must know the NOR commands to
14 find the right LUT sequence. Unfortunately, the SPI subsystem has no notion of
15 opcodes, addresses, or data payloads; a SPI controller simply knows to send or
18 details of the SPI NOR protocol.
20 Part II - How does the framework work?
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| /kernel/linux/linux-5.10/include/linux/mtd/ |
| D | spi-nor.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
12 #include <linux/spi/spi-mem.h>
19 * requires a 4-byte (32-bit) address.
31 #define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */
32 #define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */
33 #define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */
34 #define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */
35 #define SPINOR_OP_READ_1_1_8 0x8b /* Read data bytes (Octal Output SPI) */
36 #define SPINOR_OP_READ_1_8_8 0xcb /* Read data bytes (Octal I/O SPI) */
55 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | hisilicon,fmc-spi-nor.txt | 1 HiSilicon SPI-NOR Flash Controller
4 - compatible : Should be "hisilicon,fmc-spi-nor" and one of the following strings:
5 "hisilicon,hi3519-spi-nor"
6 - address-cells : Should be 1.
7 - size-cells : Should be 0.
8 - reg : Offset and length of the register set for the controller device.
9 - reg-names : Must include the following two entries: "control", "memory".
10 - clocks : handle to spi-nor flash controller clock.
13 spi-nor-controller@10000000 {
14 compatible = "hisilicon,hi3519-spi-nor", "hisilicon,fmc-spi-nor";
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-bus-spi-devices-spi-nor | 1 What: /sys/bus/spi/devices/.../spi-nor/jedec_id
4 Contact: linux-mtd@lists.infradead.org
5 Description: (RO) The JEDEC ID of the SPI NOR flash as reported by the
10 non-JEDEC compliant flashes.
12 What: /sys/bus/spi/devices/.../spi-nor/manufacturer
15 Contact: linux-mtd@lists.infradead.org
16 Description: (RO) Manufacturer of the SPI NOR flash.
22 What: /sys/bus/spi/devices/.../spi-nor/partname
25 Contact: linux-mtd@lists.infradead.org
26 Description: (RO) Part name of the SPI NOR flash.
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| /kernel/linux/linux-6.6/include/linux/mtd/ |
| D | spi-nor.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #include <linux/spi/spi-mem.h>
18 * requires a 4-byte (32-bit) address.
30 #define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */
31 #define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */
32 #define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */
33 #define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */
34 #define SPINOR_OP_READ_1_1_8 0x8b /* Read data bytes (Octal Output SPI) */
35 #define SPINOR_OP_READ_1_8_8 0xcb /* Read data bytes (Octal I/O SPI) */
53 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | hisilicon,fmc-spi-nor.txt | 1 HiSilicon SPI-NOR Flash Controller
4 - compatible : Should be "hisilicon,fmc-spi-nor" and one of the following strings:
5 "hisilicon,hi3519-spi-nor"
6 - address-cells : Should be 1.
7 - size-cells : Should be 0.
8 - reg : Offset and length of the register set for the controller device.
9 - reg-names : Must include the following two entries: "control", "memory".
10 - clocks : handle to spi-nor flash controller clock.
13 spi-nor-controller@10000000 {
14 compatible = "hisilicon,hi3519-spi-nor", "hisilicon,fmc-spi-nor";
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| D | jedec,spi-nor.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI NOR flash ST M25Pxx (and similar) serial flash chips
10 - Rob Herring <robh@kernel.org>
13 - $ref: mtd.yaml#
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
19 - items:
20 - pattern: "^((((micron|spansion|st),)?\
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1028a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1028a.dtsi"
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
29 stdout-path = "serial0:115200n8";
37 sys_mclk: clock-mclk {
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <25000000>;
43 reg_1p8v: regulator-1p8v {
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| D | fsl-ls1088a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
29 spi-max-frequency = <1000000>;
33 #address-cells = <1>;
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | fsl-ls1088a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
29 spi-max-frequency = <1000000>;
33 #address-cells = <1>;
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| D | fsl-ls1028a-qds.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1028a.dtsi"
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
32 stdout-path = "serial0:115200n8";
40 sys_mclk: clock-mclk {
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <25000000>;
46 reg_1p8v: regulator-1p8v {
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| /kernel/linux/linux-5.10/drivers/mtd/spi-nor/controllers/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Aspeed flash controllers in SPI mode"
8 in the Aspeed AST2500/AST2400 SoCs when attached to SPI NOR chips,
9 and support for the SPI flash memory controller (SPI) for
10 the host firmware. The implementation only supports SPI NOR.
13 tristate "Hisilicon FMC SPI NOR Flash Controller(SFC)"
17 This enables support for HiSilicon FMC SPI NOR flash controller.
20 tristate "NXP SPI Flash Interface (SPIFI)"
24 Enable support for the NXP LPC SPI Flash Interface controller.
26 SPIFI is a specialized controller for connecting serial SPI
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| /kernel/linux/linux-6.6/drivers/mtd/spi-nor/controllers/ |
| D | nxp-spifi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI NOR driver for NXP SPI Flash Interface (SPIFI)
18 #include <linux/mtd/spi-nor.h>
21 #include <linux/spi/spi.h>
58 struct spi_nor nor; member
68 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_wait_for_cmd()
71 dev_warn(spifi->dev, "command timed out\n"); in nxp_spifi_wait_for_cmd()
81 writel(SPIFI_STAT_RESET, spifi->io_base + SPIFI_STAT); in nxp_spifi_reset()
82 ret = readb_poll_timeout(spifi->io_base + SPIFI_STAT, stat, in nxp_spifi_reset()
85 dev_warn(spifi->dev, "state reset timed out\n"); in nxp_spifi_reset()
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| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/ |
| D | mpc8536ds.dtsi | 2 * MPC8536DS Device Tree Source stub (no addresses or top-level ranges)
13 * * Neither the name of Freescale Semiconductor nor the
36 nor@0,0 {
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 label = "ramdisk-nor";
51 label = "diagnostic-nor";
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