| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/stm32/ |
| D | stm32.yaml | 17 - description: emtrion STM32MP1 Argon based Boards
111 - description: DH STM32MP1 SoM based Boards
118 - description: DH STM32MP1 SoM based Boards
126 - description: Engicam i.Core STM32MP1 SoM based Boards
129 - engicam,icore-stm32mp1-ctouch2 # STM32MP1 Engicam i.Core STM32MP1 C.TOUCH 2.0
130 … - engicam,icore-stm32mp1-ctouch2-of10 # STM32MP1 Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1" OF
131 … - engicam,icore-stm32mp1-edimm2.2 # STM32MP1 Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
132 - const: engicam,icore-stm32mp1 # STM32MP1 Engicam i.Core STM32MP1 SoM
135 - description: Engicam MicroGEA STM32MP1 SoM based Boards
138 - engicam,microgea-stm32mp1-microdev2.0
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | st,stm32mp1-rcc.yaml | 4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
7 title: STMicroelectronics STM32MP1 Reset Clock Controller
24 dt-bindings/clock/stm32mp1-clks.h header and can be used in device
38 For example on STM32MP1, for LTDC reset:
42 The list of valid indices for STM32MP1 is available in:
43 include/dt-bindings/reset-controller/stm32mp1-resets.h
59 - st,stm32mp1-rcc-secure
60 - st,stm32mp1-rcc
80 - st,stm32mp1-rcc-secure
112 #include <dt-bindings/clock/stm32mp1-clks.h>
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/adc/ |
| D | st,stm32-adc.yaml | 29 - st,stm32mp1-adc-core
38 - stm32mp1 has two separate interrupt lines, one for each ADC within
48 It's optional on stm32h7 and stm32mp1.
51 It's required on stm32h7 and stm32mp1.
68 analog input switches on stm32h7 and stm32mp1.
73 input switches on stm32mp1.
78 analog circuitry on stm32mp1.
158 const: st,stm32mp1-adc-core
210 - st,stm32mp1-adc
248 - can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/ |
| D | st,stm32mp1-rcc.yaml | 4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
24 dt-bindings/clock/stm32mp1-clks.h header and can be used in device
38 For example on STM32MP1, for LTDC reset:
42 The list of valid indices for STM32MP1 is available in:
43 include/dt-bindings/reset-controller/stm32mp1-resets.h
57 - const: st,stm32mp1-rcc
74 compatible = "st,stm32mp1-rcc", "syscon";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/adc/ |
| D | st,stm32-adc.yaml | 29 - st,stm32mp1-adc-core
39 - stm32mp1 has two separate interrupt lines, one for each ADC within
52 It's optional on stm32h7 and stm32mp1.
55 It's required on stm32h7 and stm32mp1.
72 analog input switches on stm32h7 and stm32mp1.
77 input switches on stm32mp1.
82 analog circuitry on stm32mp1.
161 const: st,stm32mp1-adc-core
239 - st,stm32mp1-adc
284 - can be 8, 10, 12, 14 or 16 on stm32h7 and stm32mp1
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | Makefile | 43 stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \
44 stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dtb \
45 stm32mp157a-icore-stm32mp1-ctouch2.dtb \
46 stm32mp157a-icore-stm32mp1-ctouch2-of10.dtb \
47 stm32mp157a-icore-stm32mp1-edimm2.2.dtb \
62 stm32mp157c-phycore-stm32mp1-3.dtb
|
| D | stm32mp157a-icore-stm32mp1-ctouch2.dts | 10 #include "stm32mp157a-icore-stm32mp1.dtsi"
16 model = "Engicam i.Core STM32MP1 C.TOUCH 2.0";
17 compatible = "engicam,icore-stm32mp1-ctouch2",
18 "engicam,icore-stm32mp1", "st,stm32mp157";
|
| D | stm32mp157a-microgea-stm32mp1-microdev2.0.dts | 10 #include "stm32mp157a-microgea-stm32mp1.dtsi"
16 model = "Engicam MicroGEA STM32MP1 MicroDev 2.0 Carrier Board";
17 compatible = "engicam,microgea-stm32mp1-microdev2.0",
18 "engicam,microgea-stm32mp1", "st,stm32mp157";
|
| D | stm32mp157a-icore-stm32mp1-edimm2.2.dts | 10 #include "stm32mp157a-icore-stm32mp1.dtsi"
16 model = "Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit";
17 compatible = "engicam,icore-stm32mp1-edimm2.2",
18 "engicam,icore-stm32mp1", "st,stm32mp157";
|
| D | stm32mp157a-icore-stm32mp1-ctouch2-of10.dts | 10 #include "stm32mp157a-icore-stm32mp1.dtsi"
16 model = "Engicam i.Core STM32MP1 C.TOUCH 2.0 10.1\" Open Frame";
17 compatible = "engicam,icore-stm32mp1-ctouch2-of10",
18 "engicam,icore-stm32mp1", "st,stm32mp157";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/crypto/ |
| D | st,stm32-cryp.yaml | 16 - st,stm32mp1-cryp
41 #include <dt-bindings/clock/stm32mp1-clks.h>
42 #include <dt-bindings/reset/stm32mp1-resets.h>
44 compatible = "st,stm32mp1-cryp";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/regulator/ |
| D | st,stm32mp1-pwr-reg.yaml | 4 $id: http://devicetree.org/schemas/regulator/st,stm32mp1-pwr-reg.yaml#
7 title: STM32MP1 PWR voltage regulators
14 const: st,stm32mp1,pwr-reg
40 compatible = "st,stm32mp1,pwr-reg";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/regulator/ |
| D | st,stm32mp1-pwr-reg.yaml | 4 $id: http://devicetree.org/schemas/regulator/st,stm32mp1-pwr-reg.yaml#
7 title: STM32MP1 PWR voltage regulators
14 const: st,stm32mp1,pwr-reg
40 compatible = "st,stm32mp1,pwr-reg";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/crypto/ |
| D | st,stm32-cryp.yaml | 22 - st,stm32mp1-cryp
60 #include <dt-bindings/clock/stm32mp1-clks.h>
61 #include <dt-bindings/reset/stm32mp1-resets.h>
63 compatible = "st,stm32mp1-cryp";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | st,stm32-fmc2-ebi.yaml | 26 const: st,stm32mp1-fmc2-ebi
67 #include <dt-bindings/clock/stm32mp1-clks.h>
68 #include <dt-bindings/reset/stm32mp1-resets.h>
72 compatible = "st,stm32mp1-fmc2-ebi";
97 compatible = "st,stm32mp1-fmc2-nfc";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | stm32-dwmac.yaml | 24 - st,stm32mp1-dwmac
36 - st,stm32mp1-dwmac
96 #include <dt-bindings/clock/stm32mp1-clks.h>
97 #include <dt-bindings/reset/stm32mp1-resets.h>
101 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | st,stm32-fmc2-nand.yaml | 16 - st,stm32mp1-fmc2-nfc
80 const: st,stm32mp1-fmc2-nfc
102 #include <dt-bindings/clock/stm32mp1-clks.h>
103 #include <dt-bindings/reset/stm32mp1-resets.h>
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | st,stm32-fmc2-nand.yaml | 16 - st,stm32mp1-fmc2-nfc
83 const: st,stm32mp1-fmc2-nfc
105 #include <dt-bindings/clock/stm32mp1-clks.h>
106 #include <dt-bindings/reset/stm32mp1-resets.h>
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/rtc/ |
| D | st,stm32-rtc.yaml | 17 - st,stm32mp1-rtc
93 const: st,stm32mp1-rtc
132 #include <dt-bindings/clock/stm32mp1-clks.h>
134 compatible = "st,stm32mp1-rtc";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/rtc/ |
| D | st,stm32-rtc.yaml | 17 - st,stm32mp1-rtc
93 const: st,stm32mp1-rtc
131 #include <dt-bindings/clock/stm32mp1-clks.h>
133 compatible = "st,stm32mp1-rtc";
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | stm32-dwmac.yaml | 24 - st,stm32mp1-dwmac
36 - st,stm32mp1-dwmac
107 #include <dt-bindings/clock/stm32mp1-clks.h>
108 #include <dt-bindings/reset/stm32mp1-resets.h>
112 compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/ |
| D | st,stm32-iwdg.yaml | 20 - st,stm32mp1-iwdg
50 #include <dt-bindings/clock/stm32mp1-clks.h>
52 compatible = "st,stm32mp1-iwdg";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/watchdog/ |
| D | st,stm32-iwdg.yaml | 20 - st,stm32mp1-iwdg
49 #include <dt-bindings/clock/stm32mp1-clks.h>
51 compatible = "st,stm32mp1-iwdg";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | st,stm32-rproc.yaml | 19 const: st,stm32mp1-m4
165 #include <dt-bindings/reset/stm32mp1-resets.h>
167 compatible = "st,stm32mp1-m4";
179 #include <dt-bindings/reset/stm32mp1-resets.h>
181 compatible = "st,stm32mp1-m4";
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/ |
| D | st,stm32-ipcc.yaml | 21 const: st,stm32mp1-ipcc
63 #include <dt-bindings/clock/stm32mp1-clks.h>
65 compatible = "st,stm32mp1-ipcc";
|