| /kernel/linux/linux-5.10/drivers/clk/bcm/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
61 Enable common clock framework support for the Broadcom Cygnus SoC
70 SoC
87 Enable common clock framework support for the Broadcom Northstar 2 SoC
95 Enable common clock framework support for the Broadcom Stingray SoC
102 dependent clocks
|
| /kernel/linux/linux-6.6/drivers/pinctrl/intel/ |
| D | pinctrl-intel.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
26 * struct intel_pingroup - Description about group of pins
38 * struct intel_function - Description about a function
48 * struct intel_padgroup - Hardware pad group information
67 * enum - Special treatment for GPIO base in pad group
74 INTEL_GPIO_BASE_ZERO = -2,
75 INTEL_GPIO_BASE_NOMAP = -1,
80 * struct intel_community - Intel pin community description
100 * @pad_map: Optional non-linear mapping of the pads
145 #define __INTEL_COMMUNITY(b, s, e, g, n, gs, gn, soc) \ argument
[all …]
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| /kernel/linux/linux-6.6/drivers/clk/bcm/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
70 Enable common clock framework support for the Broadcom Cygnus SoC
79 SoC
96 Enable common clock framework support for the Broadcom Northstar 2 SoC
104 Enable common clock framework support for the Broadcom Stingray SoC
111 dependent clocks
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| /kernel/linux/linux-5.10/Documentation/driver-api/memory-devices/ |
| D | ti-emif.rst | 1 .. SPDX-License-Identifier: GPL-2.0
32 functions of the driver includes re-configuring AC timing
38 DDR device details and other board dependent and SoC dependent
41 - DDR device details: 'struct ddr_device_info'
42 - Device AC timings: 'struct lpddr2_timings' and 'struct lpddr2_min_tck'
43 - Custom configurations: customizable policy options through
45 - IP revision
46 - PHY type
53 - freq_pre_notify_handling()
54 - freq_post_notify_handling()
[all …]
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| D | ti-gpmc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 * Pseudo-SRAM devices
16 GPMC is found on Texas Instruments SoC's (OMAP based)
85 4. read async non-muxed
107 6. read sync non-muxed
131 8. write async non-muxed
157 10. write sync non-muxed
172 Many of gpmc timings are dependent on other gpmc timings (a few
173 gpmc timings purely dependent on other gpmc timings, a reason that
|
| /kernel/linux/linux-6.6/Documentation/driver-api/memory-devices/ |
| D | ti-emif.rst | 1 .. SPDX-License-Identifier: GPL-2.0
32 functions of the driver includes re-configuring AC timing
38 DDR device details and other board dependent and SoC dependent
41 - DDR device details: 'struct ddr_device_info'
42 - Device AC timings: 'struct lpddr2_timings' and 'struct lpddr2_min_tck'
43 - Custom configurations: customizable policy options through
45 - IP revision
46 - PHY type
53 - freq_pre_notify_handling()
54 - freq_post_notify_handling()
[all …]
|
| D | ti-gpmc.rst | 1 .. SPDX-License-Identifier: GPL-2.0
14 * Pseudo-SRAM devices
16 GPMC is found on Texas Instruments SoC's (OMAP based)
85 4. read async non-muxed
107 6. read sync non-muxed
131 8. write async non-muxed
157 10. write sync non-muxed
172 Many of gpmc timings are dependent on other gpmc timings (a few
173 gpmc timings purely dependent on other gpmc timings, a reason that
|
| /kernel/linux/linux-5.10/drivers/pinctrl/intel/ |
| D | pinctrl-intel.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
26 * struct intel_pingroup - Description about group of pins
43 * struct intel_function - Description about a function
55 * struct intel_padgroup - Hardware pad group information
74 * enum - Special treatment for GPIO base in pad group
81 INTEL_GPIO_BASE_ZERO = -2,
82 INTEL_GPIO_BASE_NOMAP = -1,
87 * struct intel_community - Intel pin community description
108 * @pad_map: Optional non-linear mapping of the pads
148 * PIN_GROUP - Declare a pin group
[all …]
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| /kernel/linux/linux-6.6/drivers/thermal/st/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
22 functionalities and to access to SoC sensor functionalities. This
23 configuration is fully dependent of MACH_STM32MP157.
|
| /kernel/linux/linux-5.10/drivers/thermal/st/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
26 functionalities and to access to SoC sensor functionalities. This
27 configuration is fully dependent of MACH_STM32MP157.
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/reset/ |
| D | img,pistachio-reset.txt | 5 disable individual IP blocks within the Pistachio SoC using "soft reset"
6 control bits found in the Pistachio SoC top level registers.
8 The actual action taken when soft reset is asserted is hardware dependent.
18 - compatible: Contains "img,pistachio-reset"
20 - #reset-cells: Contains 1
25 compatible = "img,pistachio-cr-periph", "syscon", "simple-mfd";
28 clock-names = "sys";
29 #clock-cells = <1>;
31 pistachio_reset: reset-controller {
32 compatible = "img,pistachio-reset";
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/ |
| D | img,pistachio-reset.txt | 5 disable individual IP blocks within the Pistachio SoC using "soft reset"
6 control bits found in the Pistachio SoC top level registers.
8 The actual action taken when soft reset is asserted is hardware dependent.
18 - compatible: Contains "img,pistachio-reset"
20 - #reset-cells: Contains 1
25 compatible = "img,pistachio-cr-periph", "syscon", "simple-mfd";
28 clock-names = "sys";
29 #clock-cells = <1>;
31 pistachio_reset: reset-controller {
32 compatible = "img,pistachio-reset";
[all …]
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| D | st,stih407-picophyreset.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/st,stih407-picophyreset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Griffin <peter.griffin@linaro.org>
14 disable on-chip PicoPHY USB2 phy(s) using "softreset" control bits found in
15 the STi family SoC system configuration registers.
17 The actual action taken when softreset is asserted is hardware dependent.
24 const: st,stih407-picophyreset
26 '#reset-cells':
[all …]
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| D | st,stih407-powerdown.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/st,stih407-powerdown.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@st.com>
14 disable on-chip peripheral controllers such as USB and SATA, using
15 "powerdown" control bits found in the STi family SoC system configuration
19 The actual action taken when powerdown is asserted is hardware dependent.
26 const: st,stih407-powerdown
28 '#reset-cells':
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/loongson/ |
| D | loongson,ls2k-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/loongson/loongson,ls2k-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-2 Power Manager controller
10 - Yinbo Zhu <zhuyinbo@loongson.cn>
15 - items:
16 - const: loongson,ls2k0500-pmc
17 - const: syscon
18 - items:
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/ |
| D | sti-dwmac.txt | 1 STMicroelectronics SoC DWMAC glue layer controller
10 - compatible : Can be "st,stih415-dwmac", "st,stih416-dwmac",
11 "st,stih407-dwmac", "st,stid127-dwmac".
12 - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
14 - st,gmac_en: this is to enable the gmac into a dedicated sysctl control
15 register available on STiH407 SoC.
16 - pinctrl-0: pin-control for all the MII mode supported.
19 - resets : phandle pointing to the system reset controller with correct
21 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
23 - st,tx-retime-src: This specifies which clk is wired up to the mac for
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/ |
| D | sti-dwmac.txt | 1 STMicroelectronics SoC DWMAC glue layer controller
10 - compatible : "st,stih407-dwmac"
11 - st,syscon : Should be phandle/offset pair. The phandle to the syscon node which
13 - st,gmac_en: this is to enable the gmac into a dedicated sysctl control
14 register available on STiH407 SoC.
15 - pinctrl-0: pin-control for all the MII mode supported.
18 - resets : phandle pointing to the system reset controller with correct
20 - st,ext-phyclk: valid only for RMII where PHY can generate 50MHz clock or
22 - st,tx-retime-src: This specifies which clk is wired up to the mac for
23 retimeing tx lines. This is totally board dependent and can take one of the
[all …]
|
| D | cdns,macb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nicolas Ferre <nicolas.ferre@microchip.com>
11 - Claudiu Beznea <claudiu.beznea@microchip.com>
16 - items:
17 - enum:
18 - cdns,at91rm9200-emac # Atmel at91rm9200 SoC
19 - const: cdns,emac # Generic
21 - items:
[all …]
|
| /kernel/linux/linux-6.6/Documentation/sound/kernel-api/ |
| D | alsa-driver-api.rst | 9 ---------------
10 .. kernel-doc:: sound/core/init.c
13 -----------------
14 .. kernel-doc:: sound/core/device.c
17 ---------------------------------------
18 .. kernel-doc:: sound/core/sound.c
21 -------------------------
22 .. kernel-doc:: sound/core/memory.c
23 .. kernel-doc:: sound/core/memalloc.c
30 --------
[all …]
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| /kernel/linux/linux-5.10/Documentation/sound/kernel-api/ |
| D | alsa-driver-api.rst | 9 ---------------
10 .. kernel-doc:: sound/core/init.c
13 -----------------
14 .. kernel-doc:: sound/core/device.c
17 ---------------------------------------
18 .. kernel-doc:: sound/core/sound.c
21 -------------------------
22 .. kernel-doc:: sound/core/memory.c
23 .. kernel-doc:: sound/core/memalloc.c
30 --------
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | orion-nand.txt | 1 NAND support for Marvell Orion SoC platforms
4 - compatible : "marvell,orion-nand".
5 - reg : Base physical address of the NAND and length of memory mapped
9 - cle : Address line number connected to CLE. Default is 0
10 - ale : Address line number connected to ALE. Default is 1
11 - bank-width : Width in bytes of the device. Default is 1
12 - chip-delay : Chip dependent delay for transferring data from array to read
15 The device tree may optionally contain sub-nodes describing partitions of the
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | orion-nand.txt | 1 NAND support for Marvell Orion SoC platforms
4 - compatible : "marvell,orion-nand".
5 - reg : Base physical address of the NAND and length of memory mapped
9 - cle : Address line number connected to CLE. Default is 0
10 - ale : Address line number connected to ALE. Default is 1
11 - bank-width : Width in bytes of the device. Default is 1
12 - chip-delay : Chip dependent delay for transferring data from array to read
15 The device tree may optionally contain sub-nodes describing partitions of the
21 #address-cells = <1>;
22 #size-cells = <1>;
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/ |
| D | kgd_pp_interface.h | 219 * APU power is managed to system-level requirements through the PPT
229 * enum pp_power_limit_level - Used to query the power limits
238 PP_PWR_LIMIT_MIN = -1,
245 * enum pp_power_type - Used to specify the type of the requested power
588 /* Throttle status (ASIC dependent) */
693 uint16_t temperature_soc; // soc temperature on APUs
740 uint16_t temperature_soc; // soc temperature on APUs
790 uint16_t temperature_soc; // soc temperature on APUs
826 /* Throttle status (ASIC dependent) */
843 uint16_t temperature_soc; // soc temperature on APUs
[all …]
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| /kernel/linux/linux-6.6/arch/arm/mach-omap2/ |
| D | clockdomain.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2008-2011 Texas Instruments, Inc.
6 * Copyright (C) 2008-2011 Nokia Corporation
22 #include <linux/clk-provider.h>
29 #include "soc.h"
56 if (!strcmp(name, temp_clkdm->name)) { in _clkdm_lookup()
66 * _clkdm_register - register a clockdomain
70 * Returns -EINVAL if given a null pointer, -EEXIST if a clockdomain is
77 if (!clkdm || !clkdm->name) in _clkdm_register()
78 return -EINVAL; in _clkdm_register()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/ |
| D | nxp,imx8-isi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/nxp,imx8-isi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
16 number and nature is SoC-dependent. They cover both capture interfaces (MIPI
17 CSI-2 RX, HDMI RX, ...) and display engine outputs for writeback support.
22 - fsl,imx8mn-isi
23 - fsl,imx8mp-isi
24 - fsl,imx93-isi
[all …]
|