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/kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/runtime/pipeline/src/
Dpipeline.c49 static void pipeline_stage_destroy(struct ia_css_pipeline_stage *stage);
260 /* @brief Add a stage to pipeline.
263 * @param[in] stage_desc The description of the stage
264 * @param[out] stage The successor of the stage.
267 * Add a new stage to a non-NULL pipeline.
268 * The stage consists of an ISP binary or firmware and input and
274 struct ia_css_pipeline_stage **stage) in ia_css_pipeline_create_and_add_stage() argument
294 /* Find the last stage */ in ia_css_pipeline_create_and_add_stage()
299 * stage, if no previous stage, it's an error. in ia_css_pipeline_create_and_add_stage()
313 /* Create the new stage */ in ia_css_pipeline_create_and_add_stage()
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/runtime/pipeline/src/
Dpipeline.c49 static void pipeline_stage_destroy(struct ia_css_pipeline_stage *stage);
261 /* @brief Add a stage to pipeline.
264 * @param[in] stage_desc The description of the stage
265 * @param[out] stage The successor of the stage.
268 * Add a new stage to a non-NULL pipeline.
269 * The stage consists of an ISP binary or firmware and input and
275 struct ia_css_pipeline_stage **stage) in ia_css_pipeline_create_and_add_stage() argument
295 /* Find the last stage */ in ia_css_pipeline_create_and_add_stage()
300 * stage, if no previous stage, it's an error. in ia_css_pipeline_create_and_add_stage()
314 /* Create the new stage */ in ia_css_pipeline_create_and_add_stage()
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/css_2401_system/hive/
Dia_css_isp_params.c72 const struct ia_css_pipeline_stage *stage, in ia_css_process_aa() argument
76 stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; in ia_css_process_aa()
78 stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; in ia_css_process_aa()
82 … &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; in ia_css_process_aa()
92 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr() argument
99 stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; in ia_css_process_anr()
102 stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; in ia_css_process_anr()
109 &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], in ia_css_process_anr()
113 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_anr()
127 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr2() argument
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/css_2400_system/hive/
Dia_css_isp_params.c71 const struct ia_css_pipeline_stage *stage, in ia_css_process_aa() argument
75 stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; in ia_css_process_aa()
77 stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; in ia_css_process_aa()
81 … &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; in ia_css_process_aa()
85 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_aa()
94 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr() argument
101 stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; in ia_css_process_anr()
104 stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; in ia_css_process_anr()
111 &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], in ia_css_process_anr()
115 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_anr()
[all …]
/kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/
Dia_css_isp_params.c72 const struct ia_css_pipeline_stage *stage, in ia_css_process_aa() argument
76 stage->binary->info->mem_offsets.offsets.param->dmem.aa.size; in ia_css_process_aa()
78 stage->binary->info->mem_offsets.offsets.param->dmem.aa.offset; in ia_css_process_aa()
82 … &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset]; in ia_css_process_aa()
92 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr() argument
99 stage->binary->info->mem_offsets.offsets.param->dmem.anr.size; in ia_css_process_anr()
102 stage->binary->info->mem_offsets.offsets.param->dmem.anr.offset; in ia_css_process_anr()
109 &stage->binary->mem_params.params[IA_CSS_PARAM_CLASS_PARAM][IA_CSS_ISP_DMEM].address[offset], in ia_css_process_anr()
113 params->isp_mem_params_changed[pipe_id][stage->stage_num][IA_CSS_ISP_DMEM] = in ia_css_process_anr()
127 const struct ia_css_pipeline_stage *stage, in ia_css_process_anr2() argument
[all …]
/kernel/linux/linux-6.6/arch/riscv/errata/thead/
Derrata.c20 static bool errata_probe_pbmt(unsigned int stage, in errata_probe_pbmt() argument
29 if (stage == RISCV_ALTERNATIVES_EARLY_BOOT || in errata_probe_pbmt()
30 stage == RISCV_ALTERNATIVES_MODULE) in errata_probe_pbmt()
36 static bool errata_probe_cmo(unsigned int stage, in errata_probe_cmo() argument
45 if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) in errata_probe_cmo()
48 if (stage == RISCV_ALTERNATIVES_BOOT) { in errata_probe_cmo()
56 static bool errata_probe_pmu(unsigned int stage, in errata_probe_pmu() argument
66 if (stage == RISCV_ALTERNATIVES_EARLY_BOOT) in errata_probe_pmu()
72 static u32 thead_errata_probe(unsigned int stage, in thead_errata_probe() argument
77 if (errata_probe_pbmt(stage, archid, impid)) in thead_errata_probe()
[all …]
/kernel/linux/linux-6.6/drivers/thermal/qcom/
Dqcom-spmi-temp-alarm.c66 /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
76 unsigned int stage; member
79 /* protects .thresh, .stage and chip registers */
87 /* This array maps from GEN2 alarm state to GEN1 alarm stage */
110 * specified over-temperature stage
112 * @stage: Over-temperature stage
116 static long qpnp_tm_decode_temp(struct qpnp_tm_chip *chip, unsigned int stage) in qpnp_tm_decode_temp() argument
118 if (!chip->temp_map || chip->thresh >= THRESH_COUNT || stage == 0 || in qpnp_tm_decode_temp()
119 stage > STAGE_COUNT) in qpnp_tm_decode_temp()
122 return (*chip->temp_map)[chip->thresh][stage - 1]; in qpnp_tm_decode_temp()
[all …]
/kernel/linux/linux-5.10/drivers/thermal/qcom/
Dqcom-spmi-temp-alarm.c48 #define TEMP_STAGE_STEP 20000 /* Stage step: 20.000 C */
57 /* Stage 2 Threshold Min: 125 C */
59 /* Stage 2 Threshold Max: 140 C */
62 /* Temperature in Milli Celsius reported during stage 0 if no ADC is present */
72 unsigned int stage; member
75 /* protects .thresh, .stage and chip registers */
82 /* This array maps from GEN2 alarm state to GEN1 alarm stage */
104 * qpnp_tm_get_temp_stage() - return over-temperature stage
107 * Return: stage (GEN1) or state (GEN2) on success, or errno on failure.
128 * current thermal stage and threshold as well as the previous stage
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/
Dia_css_pipeline.h25 /* Pipeline stage to be executed on SP/ISP */
31 /* SP function for SP stage */
42 /* Pipeline of n stages to be executed on SP/ISP per stage */
71 /* Stage descriptor used to create a new stage in the pipeline */
151 /* @brief Add a stage to pipeline.
154 * @param[in] stage_desc The description of the stage
155 * @param[out] stage The successor of the stage.
158 * Add a new stage to a non-NULL pipeline.
159 * The stage consists of an ISP binary or firmware and input and output
165 struct ia_css_pipeline_stage **stage);
[all …]
/kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/runtime/pipeline/interface/
Dia_css_pipeline.h25 /* Pipeline stage to be executed on SP/ISP */
31 /* SP function for SP stage */
42 /* Pipeline of n stages to be executed on SP/ISP per stage */
69 /* Stage descriptor used to create a new stage in the pipeline */
149 /* @brief Add a stage to pipeline.
152 * @param[in] stage_desc The description of the stage
153 * @param[out] stage The successor of the stage.
156 * Add a new stage to a non-NULL pipeline.
157 * The stage consists of an ISP binary or firmware and input and output
163 struct ia_css_pipeline_stage **stage);
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/
Dpipeline.json39 …on is stalled and there is an interlock. Stall cycles due to a stall in the Wr stage are excluded",
42 …ion is stalled and there is an interlock. Stall cycles due to a stall in the Wr stage are excluded"
45 …iting for data to calculate the address. Stall cycles due to a stall in the Wr stage are excluded",
48 …aiting for data to calculate the address. Stall cycles due to a stall in the Wr stage are excluded"
51 …ock that is caused by a VPU instruction. Stall cycles due to a stall in the Wr stage are excluded",
54 …lock that is caused by a VPU instruction. Stall cycles due to a stall in the Wr stage are excluded"
57 …backend, load. This event counts every cycle where there is a stall in the Wr stage due to a load",
60 … backend, load. This event counts every cycle where there is a stall in the Wr stage due to a load"
63 …ckend, store. This event counts every cycle where there is a stall in the Wr stage due to a store",
66 …ackend, store. This event counts every cycle where there is a stall in the Wr stage due to a store"
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/ampere/emag/
Dcache.json126 "PublicDescription": "Level 1 stage 2 TLB refill",
129 "BriefDescription": "L1 stage 2 TLB refill"
132 "PublicDescription": "Page walk cache level-0 stage-1 hit",
135 "BriefDescription": "Page walk, L0 stage-1 hit"
138 "PublicDescription": "Page walk cache level-1 stage-1 hit",
141 "BriefDescription": "Page walk, L1 stage-1 hit"
144 "PublicDescription": "Page walk cache level-2 stage-1 hit",
147 "BriefDescription": "Page walk, L2 stage-1 hit"
150 "PublicDescription": "Page walk cache level-1 stage-2 hit",
153 "BriefDescription": "Page walk, L1 stage-2 hit"
[all …]
/kernel/linux/linux-6.6/drivers/watchdog/
Dkempld_wdt.c10 * First the pretimeout stage runs out before the timeout stage gets
77 struct kempld_wdt_stage stage[KEMPLD_WDT_MAX_STAGES]; member
103 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_action() argument
109 if (!stage || !stage->mask) in kempld_wdt_set_stage_action()
113 stage_cfg = kempld_read8(pld, KEMPLD_WDT_STAGE_CFG(stage->id)); in kempld_wdt_set_stage_action()
122 kempld_write8(pld, KEMPLD_WDT_STAGE_CFG(stage->id), stage_cfg); in kempld_wdt_set_stage_action()
129 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_timeout() argument
141 if (!stage) in kempld_wdt_set_stage_timeout()
149 if (stage_timeout64 > stage->mask) in kempld_wdt_set_stage_timeout()
152 stage_timeout = stage_timeout64 & stage->mask; in kempld_wdt_set_stage_timeout()
[all …]
/kernel/linux/linux-5.10/tools/testing/selftests/kvm/x86_64/
Dvmx_preemption_timer_test.c164 int stage; in main() local
187 for (stage = 1;; stage++) { in main()
190 "Stage %d: unexpected exit reason: %u (%s),\n", in main()
191 stage, run->exit_reason, in main()
209 uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx", in main()
210 stage, (ulong)uc.args[1]); in main()
212 * If this stage 2 then we should verify the vmx pt expiry in main()
219 if (stage == 2) { in main()
221 pr_info("Stage %d: L1 PT expiry TSC (%lu) , L1 TSC deadline (%lu)\n", in main()
222 stage, uc.args[2], uc.args[3]); in main()
[all …]
/kernel/linux/linux-6.6/tools/testing/selftests/kvm/aarch64/
Dhypercalls.c50 static int stage = TEST_STAGE_REG_IFACE; variable
104 switch (stage) { in guest_test_hvc()
108 "a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%llx, stage = %u", in guest_test_hvc()
109 res.a0, hc_info->func_id, hc_info->arg1, stage); in guest_test_hvc()
113 "a0 = 0x%lx, func_id = 0x%x, arg1 = 0x%llx, stage = %u", in guest_test_hvc()
114 res.a0, hc_info->func_id, hc_info->arg1, stage); in guest_test_hvc()
117 GUEST_FAIL("Unexpected stage = %u", stage); in guest_test_hvc()
124 while (stage != TEST_STAGE_END) { in guest_code()
125 switch (stage) { in guest_code()
136 GUEST_FAIL("Unexpected stage = %u", stage); in guest_code()
[all …]
/kernel/linux/linux-6.6/tools/testing/selftests/kvm/x86_64/
Dvmx_preemption_timer_test.c163 int stage; in main() local
181 for (stage = 1;; stage++) { in main()
199 uc.args[1] == stage, "Stage %d: Unexpected register values vmexit, got %lx", in main()
200 stage, (ulong)uc.args[1]); in main()
202 * If this stage 2 then we should verify the vmx pt expiry in main()
209 if (stage == 2) { in main()
211 pr_info("Stage %d: L1 PT expiry TSC (%lu) , L1 TSC deadline (%lu)\n", in main()
212 stage, uc.args[2], uc.args[3]); in main()
214 pr_info("Stage %d: L2 PT expiry TSC (%lu) , L2 TSC deadline (%lu)\n", in main()
215 stage, uc.args[4], uc.args[5]); in main()
[all …]
Dset_boot_cpu_id.c48 int stage; in run_vcpu() local
50 for (stage = 0; stage < 2; stage++) { in run_vcpu()
57 uc.args[1] == stage + 1, in run_vcpu()
58 "Stage %d: Unexpected register values vmexit, got %lx", in run_vcpu()
59 stage + 1, (ulong)uc.args[1]); in run_vcpu()
63 TEST_ASSERT(stage == 1, in run_vcpu()
64 "Expected GUEST_DONE in stage 2, got stage %d", in run_vcpu()
65 stage); in run_vcpu()
Dhyperv_ipi.c92 int stage = 1, ipis_expected[2] = {0}; in sender_guest_code() local
95 GUEST_SYNC(stage++); in sender_guest_code()
109 GUEST_SYNC(stage++); in sender_guest_code()
116 GUEST_SYNC(stage++); in sender_guest_code()
129 GUEST_SYNC(stage++); in sender_guest_code()
138 GUEST_SYNC(stage++); in sender_guest_code()
151 GUEST_SYNC(stage++); in sender_guest_code()
160 GUEST_SYNC(stage++); in sender_guest_code()
174 GUEST_SYNC(stage++); in sender_guest_code()
183 GUEST_SYNC(stage++); in sender_guest_code()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_lm.c18 /* These register are offset to mixer base + stage base */
35 * for the stage to be setup
37 * @stage: stage index to setup
39 static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage) in _stage_offset() argument
42 if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages) in _stage_offset()
43 return sblk->blendstage_base[stage - DPU_STAGE_0]; in _stage_offset()
95 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config_combined_alpha() argument
101 if (stage == DPU_STAGE_BASE) in dpu_hw_lm_setup_blend_config_combined_alpha()
104 stage_off = _stage_offset(ctx, stage); in dpu_hw_lm_setup_blend_config_combined_alpha()
114 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config() argument
[all …]
/kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/arm/cortex-a55/
Dpipeline.json39 … is due to an FPU/NEON instruction. Stall cycles due to a stall in the Wr stage (typically awaitin…
42 … is due to an FPU/NEON instruction. Stall cycles due to a stall in the Wr stage (typically awaitin…
45 …to the backend, load.This event counts every cycle there is a stall in the Wr stage due to a load",
48 … to the backend, load.This event counts every cycle there is a stall in the Wr stage due to a load"
51 … the backend, store.This event counts every cycle there is a stall in the Wr stage due to a store",
54 …o the backend, store.This event counts every cycle there is a stall in the Wr stage due to a store"
57 …load, cache miss.This event counts every cycle there is a stall in the Wr stage due to a load whic…
60 …load, cache miss.This event counts every cycle there is a stall in the Wr stage due to a load whic…
63 …, load, TLB miss.This event counts every cycle there is a stall in the Wr stage due to a load whic…
66 …, load, TLB miss.This event counts every cycle there is a stall in the Wr stage due to a load whic…
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hw_lm.c16 /* These register are offset to mixer base + stage base */
50 * for the stage to be setup
52 * @stage: stage index to setup
54 static inline int _stage_offset(struct dpu_hw_mixer *ctx, enum dpu_stage stage) in _stage_offset() argument
57 if (stage != DPU_STAGE_BASE && stage <= sblk->maxblendstages) in _stage_offset()
58 return sblk->blendstage_base[stage - DPU_STAGE_0]; in _stage_offset()
100 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config_sdm845() argument
106 if (stage == DPU_STAGE_BASE) in dpu_hw_lm_setup_blend_config_sdm845()
109 stage_off = _stage_offset(ctx, stage); in dpu_hw_lm_setup_blend_config_sdm845()
119 u32 stage, u32 fg_alpha, u32 bg_alpha, u32 blend_op) in dpu_hw_lm_setup_blend_config() argument
[all …]
/kernel/linux/linux-5.10/drivers/watchdog/
Dkempld_wdt.c10 * First the pretimeout stage runs out before the timeout stage gets
77 struct kempld_wdt_stage stage[KEMPLD_WDT_MAX_STAGES]; member
105 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_action() argument
111 if (!stage || !stage->mask) in kempld_wdt_set_stage_action()
115 stage_cfg = kempld_read8(pld, KEMPLD_WDT_STAGE_CFG(stage->id)); in kempld_wdt_set_stage_action()
124 kempld_write8(pld, KEMPLD_WDT_STAGE_CFG(stage->id), stage_cfg); in kempld_wdt_set_stage_action()
131 struct kempld_wdt_stage *stage, in kempld_wdt_set_stage_timeout() argument
143 if (!stage) in kempld_wdt_set_stage_timeout()
151 if (stage_timeout64 > stage->mask) in kempld_wdt_set_stage_timeout()
154 stage_timeout = stage_timeout64 & stage->mask; in kempld_wdt_set_stage_timeout()
[all …]
/kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/ampere/emag/
Dcache.json156 "PublicDescription": "Level 1 stage 2 TLB refill",
159 "BriefDescription": "L1 stage 2 TLB refill"
162 "PublicDescription": "Page walk cache level-0 stage-1 hit",
165 "BriefDescription": "Page walk, L0 stage-1 hit"
168 "PublicDescription": "Page walk cache level-1 stage-1 hit",
171 "BriefDescription": "Page walk, L1 stage-1 hit"
174 "PublicDescription": "Page walk cache level-2 stage-1 hit",
177 "BriefDescription": "Page walk, L2 stage-1 hit"
180 "PublicDescription": "Page walk cache level-1 stage-2 hit",
183 "BriefDescription": "Page walk, L1 stage-2 hit"
[all …]
/kernel/linux/linux-6.6/Documentation/leds/
Dleds-sc27xx.rst16 for the high stage. To be compatible with the hardware pattern
17 format, we should set brightness as 0 for rise stage, fall
18 stage and low stage.
20 - Min stage duration: 125 ms
21 - Max stage duration: 31875 ms
23 Since the stage duration step is 125 ms, the duration should be
/kernel/linux/linux-5.10/Documentation/leds/
Dleds-sc27xx.rst16 for the high stage. To be compatible with the hardware pattern
17 format, we should set brightness as 0 for rise stage, fall
18 stage and low stage.
20 - Min stage duration: 125 ms
21 - Max stage duration: 31875 ms
23 Since the stage duration step is 125 ms, the duration should be

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