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/kernel/linux/linux-5.10/include/asm-generic/
Datomic-long.h26 static __always_inline long
32 static __always_inline long
38 static __always_inline void
44 static __always_inline void
50 static __always_inline void
56 static __always_inline long
62 static __always_inline long
68 static __always_inline long
74 static __always_inline long
80 static __always_inline long
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/kernel/linux/linux-6.6/drivers/pinctrl/meson/
Dpinctrl-meson-g12a.c15 static const struct pinctrl_pin_desc meson_g12a_periphs_pins[] = {
103 static const struct pinctrl_pin_desc meson_g12a_aobus_pins[] = {
122 static const unsigned int emmc_nand_d0_pins[] = { BOOT_0 };
123 static const unsigned int emmc_nand_d1_pins[] = { BOOT_1 };
124 static const unsigned int emmc_nand_d2_pins[] = { BOOT_2 };
125 static const unsigned int emmc_nand_d3_pins[] = { BOOT_3 };
126 static const unsigned int emmc_nand_d4_pins[] = { BOOT_4 };
127 static const unsigned int emmc_nand_d5_pins[] = { BOOT_5 };
128 static const unsigned int emmc_nand_d6_pins[] = { BOOT_6 };
129 static const unsigned int emmc_nand_d7_pins[] = { BOOT_7 };
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Dpinctrl-amlogic-c3.c13 static const struct pinctrl_pin_desc c3_periphs_pins[] = {
72 static const unsigned int pwm_a_pins[] = { GPIOE_0 };
73 static const unsigned int pwm_b_pins[] = { GPIOE_1 };
74 static const unsigned int i2c2_sda_pins[] = { GPIOE_2 };
75 static const unsigned int i2c2_scl_pins[] = { GPIOE_3 };
76 static const unsigned int gen_clk_e_pins[] = { GPIOE_4 };
79 static const unsigned int i2c0_sda_e_pins[] = { GPIOE_0 };
80 static const unsigned int i2c0_scl_e_pins[] = { GPIOE_1 };
81 static const unsigned int clk_32k_in_pins[] = { GPIOE_4 };
84 static const unsigned int i2c_slave_scl_pins[] = { GPIOE_0 };
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Dpinctrl-meson-s4.c13 static const struct pinctrl_pin_desc meson_s4_periphs_pins[] = {
106 static const unsigned int i2c0_sda_pins[] = { GPIOE_0 };
107 static const unsigned int i2c0_scl_pins[] = { GPIOE_1 };
110 static const unsigned int uart_b_tx_e_pins[] = { GPIOE_0 };
111 static const unsigned int uart_b_rx_e_pins[] = { GPIOE_1 };
114 static const unsigned int pwm_h_pins[] = { GPIOE_0 };
115 static const unsigned int pwm_j_pins[] = { GPIOE_1 };
118 static const unsigned int emmc_nand_d0_pins[] = { GPIOB_0 };
119 static const unsigned int emmc_nand_d1_pins[] = { GPIOB_1 };
120 static const unsigned int emmc_nand_d2_pins[] = { GPIOB_2 };
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Dpinctrl-meson-axg.c13 static const struct pinctrl_pin_desc meson_axg_periphs_pins[] = {
102 static const struct pinctrl_pin_desc meson_axg_aobus_pins[] = {
121 static const unsigned int emmc_nand_d0_pins[] = {BOOT_0};
122 static const unsigned int emmc_nand_d1_pins[] = {BOOT_1};
123 static const unsigned int emmc_nand_d2_pins[] = {BOOT_2};
124 static const unsigned int emmc_nand_d3_pins[] = {BOOT_3};
125 static const unsigned int emmc_nand_d4_pins[] = {BOOT_4};
126 static const unsigned int emmc_nand_d5_pins[] = {BOOT_5};
127 static const unsigned int emmc_nand_d6_pins[] = {BOOT_6};
128 static const unsigned int emmc_nand_d7_pins[] = {BOOT_7};
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Dpinctrl-meson-a1.c13 static const struct pinctrl_pin_desc meson_a1_periphs_pins[] = {
79 static const unsigned int psram_clkn_pins[] = { GPIOP_0 };
80 static const unsigned int psram_clkp_pins[] = { GPIOP_1 };
81 static const unsigned int psram_ce_n_pins[] = { GPIOP_2 };
82 static const unsigned int psram_rst_n_pins[] = { GPIOP_3 };
83 static const unsigned int psram_adq0_pins[] = { GPIOP_4 };
84 static const unsigned int psram_adq1_pins[] = { GPIOP_5 };
85 static const unsigned int psram_adq2_pins[] = { GPIOP_6 };
86 static const unsigned int psram_adq3_pins[] = { GPIOP_7 };
87 static const unsigned int psram_adq4_pins[] = { GPIOP_8 };
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Dpinctrl-meson8b.c13 static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
105 static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
131 static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
132 static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
133 static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
134 static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
135 static const unsigned int sdxc_d0_0_a_pins[] = { GPIOX_4 };
136 static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5,
138 static const unsigned int sdxc_d13_0_a_pins[] = { GPIOX_5, GPIOX_6,
140 static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
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Dpinctrl-meson8.c12 static const struct pinctrl_pin_desc meson8_cbus_pins[] = {
135 static const struct pinctrl_pin_desc meson8_aobus_pins[] = {
155 static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
156 static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
157 static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
158 static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
159 static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
160 static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 };
162 static const unsigned int sdxc_d0_a_pins[] = { GPIOX_0 };
163 static const unsigned int sdxc_d13_a_pins[] = { GPIOX_1, GPIOX_2, GPIOX_3 };
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Dpinctrl-meson-gxl.c13 static const struct pinctrl_pin_desc meson_gxl_periphs_pins[] = {
122 static const unsigned int emmc_nand_d07_pins[] = {
125 static const unsigned int emmc_clk_pins[] = { BOOT_8 };
126 static const unsigned int emmc_cmd_pins[] = { BOOT_10 };
127 static const unsigned int emmc_ds_pins[] = { BOOT_15 };
129 static const unsigned int nor_d_pins[] = { BOOT_11 };
130 static const unsigned int nor_q_pins[] = { BOOT_12 };
131 static const unsigned int nor_c_pins[] = { BOOT_13 };
132 static const unsigned int nor_cs_pins[] = { BOOT_15 };
134 static const unsigned int spi_mosi_pins[] = { GPIOX_8 };
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/kernel/linux/linux-5.10/drivers/pinctrl/meson/
Dpinctrl-meson-g12a.c14 static const struct pinctrl_pin_desc meson_g12a_periphs_pins[] = {
102 static const struct pinctrl_pin_desc meson_g12a_aobus_pins[] = {
121 static const unsigned int emmc_nand_d0_pins[] = { BOOT_0 };
122 static const unsigned int emmc_nand_d1_pins[] = { BOOT_1 };
123 static const unsigned int emmc_nand_d2_pins[] = { BOOT_2 };
124 static const unsigned int emmc_nand_d3_pins[] = { BOOT_3 };
125 static const unsigned int emmc_nand_d4_pins[] = { BOOT_4 };
126 static const unsigned int emmc_nand_d5_pins[] = { BOOT_5 };
127 static const unsigned int emmc_nand_d6_pins[] = { BOOT_6 };
128 static const unsigned int emmc_nand_d7_pins[] = { BOOT_7 };
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Dpinctrl-meson-axg.c14 static const struct pinctrl_pin_desc meson_axg_periphs_pins[] = {
103 static const struct pinctrl_pin_desc meson_axg_aobus_pins[] = {
122 static const unsigned int emmc_nand_d0_pins[] = {BOOT_0};
123 static const unsigned int emmc_nand_d1_pins[] = {BOOT_1};
124 static const unsigned int emmc_nand_d2_pins[] = {BOOT_2};
125 static const unsigned int emmc_nand_d3_pins[] = {BOOT_3};
126 static const unsigned int emmc_nand_d4_pins[] = {BOOT_4};
127 static const unsigned int emmc_nand_d5_pins[] = {BOOT_5};
128 static const unsigned int emmc_nand_d6_pins[] = {BOOT_6};
129 static const unsigned int emmc_nand_d7_pins[] = {BOOT_7};
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Dpinctrl-meson-a1.c13 static const struct pinctrl_pin_desc meson_a1_periphs_pins[] = {
79 static const unsigned int psram_clkn_pins[] = { GPIOP_0 };
80 static const unsigned int psram_clkp_pins[] = { GPIOP_1 };
81 static const unsigned int psram_ce_n_pins[] = { GPIOP_2 };
82 static const unsigned int psram_rst_n_pins[] = { GPIOP_3 };
83 static const unsigned int psram_adq0_pins[] = { GPIOP_4 };
84 static const unsigned int psram_adq1_pins[] = { GPIOP_5 };
85 static const unsigned int psram_adq2_pins[] = { GPIOP_6 };
86 static const unsigned int psram_adq3_pins[] = { GPIOP_7 };
87 static const unsigned int psram_adq4_pins[] = { GPIOP_8 };
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Dpinctrl-meson8b.c13 static const struct pinctrl_pin_desc meson8b_cbus_pins[] = {
105 static const struct pinctrl_pin_desc meson8b_aobus_pins[] = {
131 static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
132 static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
133 static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
134 static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
135 static const unsigned int sdxc_d0_0_a_pins[] = { GPIOX_4 };
136 static const unsigned int sdxc_d47_a_pins[] = { GPIOX_4, GPIOX_5,
138 static const unsigned int sdxc_d13_0_a_pins[] = { GPIOX_5, GPIOX_6,
140 static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
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Dpinctrl-meson8.c12 static const struct pinctrl_pin_desc meson8_cbus_pins[] = {
135 static const struct pinctrl_pin_desc meson8_aobus_pins[] = {
155 static const unsigned int sd_d0_a_pins[] = { GPIOX_0 };
156 static const unsigned int sd_d1_a_pins[] = { GPIOX_1 };
157 static const unsigned int sd_d2_a_pins[] = { GPIOX_2 };
158 static const unsigned int sd_d3_a_pins[] = { GPIOX_3 };
159 static const unsigned int sd_clk_a_pins[] = { GPIOX_8 };
160 static const unsigned int sd_cmd_a_pins[] = { GPIOX_9 };
162 static const unsigned int sdxc_d0_a_pins[] = { GPIOX_0 };
163 static const unsigned int sdxc_d13_a_pins[] = { GPIOX_1, GPIOX_2, GPIOX_3 };
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/kernel/linux/linux-5.10/drivers/pinctrl/mediatek/
Dpinctrl-mt7622.c14 static const struct mtk_pin_field_calc mt7622_pin_mode_range[] = {
43 static const struct mtk_pin_field_calc mt7622_pin_dir_range[] = {
47 static const struct mtk_pin_field_calc mt7622_pin_di_range[] = {
51 static const struct mtk_pin_field_calc mt7622_pin_do_range[] = {
55 static const struct mtk_pin_field_calc mt7622_pin_sr_range[] = {
65 static const struct mtk_pin_field_calc mt7622_pin_smt_range[] = {
75 static const struct mtk_pin_field_calc mt7622_pin_pu_range[] = {
85 static const struct mtk_pin_field_calc mt7622_pin_pd_range[] = {
95 static const struct mtk_pin_field_calc mt7622_pin_e4_range[] = {
105 static const struct mtk_pin_field_calc mt7622_pin_e8_range[] = {
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/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinctrl-ingenic.c103 static const u32 jz4740_pull_ups[4] = {
107 static const u32 jz4740_pull_downs[4] = {
111 static int jz4740_mmc_1bit_pins[] = { 0x69, 0x68, 0x6a, };
112 static int jz4740_mmc_4bit_pins[] = { 0x6b, 0x6c, 0x6d, };
113 static int jz4740_uart0_data_pins[] = { 0x7a, 0x79, };
114 static int jz4740_uart0_hwflow_pins[] = { 0x7e, 0x7f, };
115 static int jz4740_uart1_data_pins[] = { 0x7e, 0x7f, };
116 static int jz4740_lcd_8bit_pins[] = {
119 static int jz4740_lcd_16bit_pins[] = {
122 static int jz4740_lcd_18bit_pins[] = { 0x50, 0x51, };
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Dpinctrl-bm1880.c80 static const struct pinctrl_pin_desc bm1880_pins[] = {
218 static const unsigned int nand_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
220 static const unsigned int spi_pins[] = { 0, 1, 8, 10, 11, 12, 13 };
221 static const unsigned int emmc_pins[] = { 2, 3, 4, 5, 6, 7, 9, 14, 15, 16 };
222 static const unsigned int sdio_pins[] = { 17, 18, 19, 20, 21, 22, 23, 24,
224 static const unsigned int eth0_pins[] = { 27, 28, 29, 30, 31, 32, 33, 34, 35,
226 static const unsigned int pwm0_pins[] = { 29 };
227 static const unsigned int pwm1_pins[] = { 30 };
228 static const unsigned int pwm2_pins[] = { 34 };
229 static const unsigned int pwm3_pins[] = { 35 };
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/kernel/linux/linux-6.6/drivers/pinctrl/mediatek/
Dpinctrl-mt7622.c14 static const struct mtk_pin_field_calc mt7622_pin_mode_range[] = {
43 static const struct mtk_pin_field_calc mt7622_pin_dir_range[] = {
47 static const struct mtk_pin_field_calc mt7622_pin_di_range[] = {
51 static const struct mtk_pin_field_calc mt7622_pin_do_range[] = {
55 static const struct mtk_pin_field_calc mt7622_pin_sr_range[] = {
65 static const struct mtk_pin_field_calc mt7622_pin_smt_range[] = {
75 static const struct mtk_pin_field_calc mt7622_pin_pu_range[] = {
85 static const struct mtk_pin_field_calc mt7622_pin_pd_range[] = {
95 static const struct mtk_pin_field_calc mt7622_pin_e4_range[] = {
105 static const struct mtk_pin_field_calc mt7622_pin_e8_range[] = {
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5.xml.h180 static inline uint32_t MDSS_HW_VERSION_STEP(uint32_t val) in MDSS_HW_VERSION_STEP()
186 static inline uint32_t MDSS_HW_VERSION_MINOR(uint32_t val) in MDSS_HW_VERSION_MINOR()
192 static inline uint32_t MDSS_HW_VERSION_MAJOR(uint32_t val) in MDSS_HW_VERSION_MAJOR()
207 static inline uint32_t MDP5_HW_VERSION_STEP(uint32_t val) in MDP5_HW_VERSION_STEP()
213 static inline uint32_t MDP5_HW_VERSION_MINOR(uint32_t val) in MDP5_HW_VERSION_MINOR()
219 static inline uint32_t MDP5_HW_VERSION_MAJOR(uint32_t val) in MDP5_HW_VERSION_MAJOR()
227 static inline uint32_t MDP5_DISP_INTF_SEL_INTF0(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF0()
233 static inline uint32_t MDP5_DISP_INTF_SEL_INTF1(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF1()
239 static inline uint32_t MDP5_DISP_INTF_SEL_INTF2(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF2()
245 static inline uint32_t MDP5_DISP_INTF_SEL_INTF3(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF3()
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/kernel/linux/linux-6.6/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5.xml.h191 static inline uint32_t MDSS_HW_VERSION_STEP(uint32_t val) in MDSS_HW_VERSION_STEP()
197 static inline uint32_t MDSS_HW_VERSION_MINOR(uint32_t val) in MDSS_HW_VERSION_MINOR()
203 static inline uint32_t MDSS_HW_VERSION_MAJOR(uint32_t val) in MDSS_HW_VERSION_MAJOR()
218 static inline uint32_t MDP5_HW_VERSION_STEP(uint32_t val) in MDP5_HW_VERSION_STEP()
224 static inline uint32_t MDP5_HW_VERSION_MINOR(uint32_t val) in MDP5_HW_VERSION_MINOR()
230 static inline uint32_t MDP5_HW_VERSION_MAJOR(uint32_t val) in MDP5_HW_VERSION_MAJOR()
238 static inline uint32_t MDP5_DISP_INTF_SEL_INTF0(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF0()
244 static inline uint32_t MDP5_DISP_INTF_SEL_INTF1(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF1()
250 static inline uint32_t MDP5_DISP_INTF_SEL_INTF2(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF2()
256 static inline uint32_t MDP5_DISP_INTF_SEL_INTF3(enum mdp5_intf_type val) in MDP5_DISP_INTF_SEL_INTF3()
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/kernel/linux/linux-6.6/drivers/pinctrl/
Dpinctrl-bm1880.c82 static const struct pinctrl_pin_desc bm1880_pins[] = {
220 static const unsigned int nand_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
222 static const unsigned int spi_pins[] = { 0, 1, 8, 10, 11, 12, 13 };
223 static const unsigned int emmc_pins[] = { 2, 3, 4, 5, 6, 7, 9, 14, 15, 16 };
224 static const unsigned int sdio_pins[] = { 17, 18, 19, 20, 21, 22, 23, 24,
226 static const unsigned int eth0_pins[] = { 27, 28, 29, 30, 31, 32, 33, 34, 35,
228 static const unsigned int pwm0_pins[] = { 29 };
229 static const unsigned int pwm1_pins[] = { 30 };
230 static const unsigned int pwm2_pins[] = { 34 };
231 static const unsigned int pwm3_pins[] = { 35 };
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/kernel/linux/linux-5.10/drivers/pinctrl/actions/
Dpinctrl-s900.c208 static const struct pinctrl_pin_desc s900_pads[] = {
417 static unsigned int lvds_oxx_uart4_mfp_pads[] = { LVDS_OAP, LVDS_OAN };
418 static unsigned int lvds_oxx_uart4_mfp_funcs[] = { S900_MUX_ERAM,
421 static unsigned int rmii_mdc_mfp_pads[] = { ETH_MDC };
422 static unsigned int rmii_mdc_mfp_funcs[] = { S900_MUX_ETH_RMII,
426 static unsigned int rmii_mdio_mfp_pads[] = { ETH_MDIO };
427 static unsigned int rmii_mdio_mfp_funcs[] = { S900_MUX_ETH_RMII,
432 static unsigned int sirq0_mfp_pads[] = { SIRQ0 };
433 static unsigned int sirq0_mfp_funcs[] = { S900_MUX_SIRQ0,
435 static unsigned int sirq1_mfp_pads[] = { SIRQ1 };
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Dpinctrl-s500.c187 static const struct pinctrl_pin_desc s500_pads[] = {
380 static unsigned int lcd0_d18_mfp_pads[] = { LCD0_D18 };
381 static unsigned int lcd0_d18_mfp_funcs[] = { S500_MUX_NOR,
387 static unsigned int rmii_crs_dv_mfp_pads[] = { ETH_CRS_DV };
388 static unsigned int rmii_crs_dv_mfp_funcs[] = { S500_MUX_ETH_RMII,
394 static unsigned int rmii_txd0_mfp_pads[] = { ETH_TXD0 };
395 static unsigned int rmii_txd0_mfp_funcs[] = { S500_MUX_ETH_RMII,
401 static unsigned int rmii_txd1_mfp_pads[] = { ETH_TXD1 };
402 static unsigned int rmii_txd1_mfp_funcs[] = { S500_MUX_ETH_RMII,
408 static unsigned int rmii_txen_mfp_pads[] = { ETH_TXEN };
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/kernel/linux/linux-6.6/drivers/pinctrl/actions/
Dpinctrl-s900.c208 static const struct pinctrl_pin_desc s900_pads[] = {
417 static unsigned int lvds_oxx_uart4_mfp_pads[] = { LVDS_OAP, LVDS_OAN };
418 static unsigned int lvds_oxx_uart4_mfp_funcs[] = { S900_MUX_ERAM,
421 static unsigned int rmii_mdc_mfp_pads[] = { ETH_MDC };
422 static unsigned int rmii_mdc_mfp_funcs[] = { S900_MUX_ETH_RMII,
426 static unsigned int rmii_mdio_mfp_pads[] = { ETH_MDIO };
427 static unsigned int rmii_mdio_mfp_funcs[] = { S900_MUX_ETH_RMII,
432 static unsigned int sirq0_mfp_pads[] = { SIRQ0 };
433 static unsigned int sirq0_mfp_funcs[] = { S900_MUX_SIRQ0,
435 static unsigned int sirq1_mfp_pads[] = { SIRQ1 };
[all …]
Dpinctrl-s500.c187 static const struct pinctrl_pin_desc s500_pads[] = {
380 static unsigned int lcd0_d18_mfp_pads[] = { LCD0_D18 };
381 static unsigned int lcd0_d18_mfp_funcs[] = { S500_MUX_NOR,
387 static unsigned int rmii_crs_dv_mfp_pads[] = { ETH_CRS_DV };
388 static unsigned int rmii_crs_dv_mfp_funcs[] = { S500_MUX_ETH_RMII,
394 static unsigned int rmii_txd0_mfp_pads[] = { ETH_TXD0 };
395 static unsigned int rmii_txd0_mfp_funcs[] = { S500_MUX_ETH_RMII,
401 static unsigned int rmii_txd1_mfp_pads[] = { ETH_TXD1 };
402 static unsigned int rmii_txd1_mfp_funcs[] = { S500_MUX_ETH_RMII,
408 static unsigned int rmii_txen_mfp_pads[] = { ETH_TXEN };
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12345678910>>...674