| /kernel/linux/linux-5.10/drivers/soc/qcom/ |
| D | rpmh-rsc.c | 25 #include <soc/qcom/tcs.h>
41 /* DRV TCS Configuration Information Register */
48 /* Offsets for common TCS Registers, one bit per TCS */
54 * Offsets for per TCS Registers.
57 * Multiply tcs_id by RSC_DRV_TCS_OFFSET to find a given TCS and add one
62 #define RSC_DRV_STATUS 0x18 /* zero if tcs is busy */
66 * Offsets for per command in a TCS.
68 * Commands (up to 16) start at 0x30 in a TCS; multiply command index
80 /* TCS CMD register bit mask */
94 * space are all the TCS blocks. The offset of the TCS blocks is
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| D | rpmh-internal.h | 12 #include <soc/qcom/tcs.h>
23 * struct tcs_group: group of Trigger Command Sets (TCS) to send state requests
27 * @type: Type of the TCS in this group - active, sleep, wake.
29 * @offset: Start of the TCS group relative to the TCSes in the RSC.
31 * @ncpt: Number of commands in each TCS.
32 * @req: Requests that are sent from the TCS; only used for ACTIVE_ONLY
33 * transfers (could be on a wake/sleep TCS if we are borrowing for
42 * MAX_CMDS_PER_TCS = 16 then bit[2] = the first bit in 2nd TCS.
94 * @tcs_base: Start address of the TCS registers in this controller.
101 * @tcs: TCS groups.
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| /kernel/linux/linux-6.6/drivers/soc/qcom/ |
| D | rpmh-rsc.c | 32 #include <soc/qcom/tcs.h>
71 /* DRV TCS Configuration Information Register */
77 /* Offsets for CONTROL TCS Registers */
88 /* TCS CMD register bit mask */
102 * space are all the TCS blocks. The offset of the TCS blocks is
103 * specified in the device tree by "qcom,tcs-offset" and used to
105 * - TCS blocks come one after another. Type, count, and order are
106 * specified by the device tree as "qcom,tcs-config".
107 * - Each TCS block has some registers, then space for up to 16 commands.
109 * might be present. See ncpt (num cmds per TCS).
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| D | rpmh-internal.h | 12 #include <soc/qcom/tcs.h>
23 * struct tcs_group: group of Trigger Command Sets (TCS) to send state requests
27 * @type: Type of the TCS in this group - active, sleep, wake.
29 * @offset: Start of the TCS group relative to the TCSes in the RSC.
31 * @ncpt: Number of commands in each TCS.
32 * @req: Requests that are sent from the TCS; only used for ACTIVE_ONLY
33 * transfers (could be on a wake/sleep TCS if we are borrowing for
42 * MAX_CMDS_PER_TCS = 16 then bit[2] = the first bit in 2nd TCS.
98 * @tcs_base: Start address of the TCS registers in this controller.
106 * @tcs: TCS groups.
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/qcom/ |
| D | rpmh-rsc.txt | 6 can be written to the Trigger Command Set (TCS) registers and using a (addr,
7 val) pair and triggered. Messages in the TCS are then sent in sequence over an
16 A TCS may be triggered from Linux or triggered by the F/W after all the CPUs
17 have powered off to facilitate idle power saving. TCS could be classified as -
45 The tcs-offset specifies the start address of the
46 TCS in the DRVs.
52 "drv-0", "drv-1", "drv-2" etc and "tcs-offset". The
66 - qcom,tcs-config:
69 Definition: The tuple defining the configuration of TCS.
70 Must have 2 cells which describe each TCS type.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,rpmh-rsc.yaml | 15 resources can be written to the Trigger Command Set (TCS) registers and
16 using a (addr, val) pair and triggered. Messages in the TCS are then sent in
25 A TCS may be triggered from Linux or triggered by the F/W after all the CPUs
26 have powered off to facilitate idle power saving. TCS could be classified as::
66 qcom,tcs-config:
73 TCS type::
79 - description: Number of TCS
81 The tuple defining the configuration of TCS. Must have two cells which
82 describe each TCS type. The order of the TCS must match the hardware
85 qcom,tcs-offset:
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| /kernel/linux/linux-6.6/drivers/scsi/aic94xx/ |
| D | aic94xx_tmf.c | 47 #define DECLARE_TCS(tcs) \ argument
48 struct tasklet_completion_status tcs = { \
59 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_clear_nexus_tasklet_complete() local
66 tcs->dl_opcode = dl->opcode; in asd_clear_nexus_tasklet_complete()
74 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_clear_nexus_timedout() local
77 tcs->dl_opcode = TMF_RESP_FUNC_FAILED; in asd_clear_nexus_timedout()
86 DECLARE_TCS(tcs); \
95 ascb->uldd_task = &tcs; \
107 res = tcs.dl_opcode; \
248 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_tmf_timedout() local
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| /kernel/linux/linux-5.10/drivers/scsi/aic94xx/ |
| D | aic94xx_tmf.c | 47 #define DECLARE_TCS(tcs) \ argument
48 struct tasklet_completion_status tcs = { \
59 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_clear_nexus_tasklet_complete() local
66 tcs->dl_opcode = dl->opcode; in asd_clear_nexus_tasklet_complete()
74 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_clear_nexus_timedout() local
77 tcs->dl_opcode = TMF_RESP_FUNC_FAILED; in asd_clear_nexus_timedout()
86 DECLARE_TCS(tcs); \
95 ascb->uldd_task = &tcs; \
107 res = tcs.dl_opcode; \
248 struct tasklet_completion_status *tcs = ascb->uldd_task; in asd_tmf_timedout() local
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| /kernel/linux/linux-6.6/tools/testing/selftests/sgx/ |
| D | test_encl.c | 75 void *tcs = (void *)op->tcs_page; in do_encl_init_tcs_page() local
78 memset(tcs, 0, 16); /* STATE and FLAGS */ in do_encl_init_tcs_page()
79 memcpy(tcs + 16, &op->ssa, 8); /* OSSA */ in do_encl_init_tcs_page()
80 memset(tcs + 24, 0, 4); /* CSSA */ in do_encl_init_tcs_page()
82 memcpy(tcs + 28, &val_32, 4); /* NSSA */ in do_encl_init_tcs_page()
83 memcpy(tcs + 32, &op->entry, 8); /* OENTRY */ in do_encl_init_tcs_page()
84 memset(tcs + 40, 0, 24); /* AEP, OFSBASE, OGSBASE */ in do_encl_init_tcs_page()
86 memcpy(tcs + 64, &val_32, 4); /* FSLIMIT */ in do_encl_init_tcs_page()
87 memcpy(tcs + 68, &val_32, 4); /* GSLIMIT */ in do_encl_init_tcs_page()
88 memset(tcs + 72, 0, 4024); /* Reserved */ in do_encl_init_tcs_page()
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| D | test_encl_bootstrap.S | 10 .section ".tcs", "aw"
43 # RBX contains the base address for TCS, which is the first address
44 # inside the enclave for TCS #1 and one page into the enclave for
45 # TCS #2. By adding the value of encl_stack to it, we get
50 # Entry point for dynamically created TCS page expected to follow
97 # Stack of TCS #1
101 # Stack of TCS #2
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| D | main.c | 134 * Return the offset in the enclave where the TCS segment can be found.
135 * The first RW segment loaded is the TCS.
153 * The first RW segment loaded is the TCS, skip that to get info on the
290 self->run.tcs = self->encl.encl_base; in TEST_F()
363 self->run.tcs = self->encl.encl_base; in TEST_F()
429 self->run.tcs = self->encl.encl_base;
512 self->run.tcs = self->encl.encl_base; in TEST_F()
548 self->run.tcs = self->encl.encl_base; in TEST_F()
572 * Sanity check that it is possible to enter either of the two hardcoded TCS
581 self->run.tcs = self->encl.encl_base; in TEST_F()
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| D | test_encl.lds | 5 tcs PT_LOAD;
13 .tcs : {
14 *(.tcs*)
15 } : tcs
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/ixgbe/ |
| D | ixgbe_lib.c | 25 u8 tcs = adapter->hw_tcs; in ixgbe_cache_ring_dcb_sriov() local
28 if (tcs <= 1) in ixgbe_cache_ring_dcb_sriov()
39 if ((reg_idx & ~vmdq->mask) >= tcs) { in ixgbe_cache_ring_dcb_sriov()
50 if ((reg_idx & ~vmdq->mask) >= tcs) in ixgbe_cache_ring_dcb_sriov()
61 if (fcoe->offset < tcs) in ixgbe_cache_ring_dcb_sriov()
112 * TCs : TC0/1 TC2/3 TC4-7 in ixgbe_get_first_reg_idx()
125 * TCs : TC0 TC1 TC2/3 in ixgbe_get_first_reg_idx()
329 u8 tcs = adapter->hw_tcs; in ixgbe_set_dcb_sriov_queues() local
332 if (tcs <= 1) in ixgbe_set_dcb_sriov_queues()
340 vmdq_i = min_t(u16, vmdq_i, MAX_TX_QUEUES / tcs); in ixgbe_set_dcb_sriov_queues()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/ixgbe/ |
| D | ixgbe_lib.c | 25 u8 tcs = adapter->hw_tcs; in ixgbe_cache_ring_dcb_sriov() local
28 if (tcs <= 1) in ixgbe_cache_ring_dcb_sriov()
39 if ((reg_idx & ~vmdq->mask) >= tcs) { in ixgbe_cache_ring_dcb_sriov()
50 if ((reg_idx & ~vmdq->mask) >= tcs) in ixgbe_cache_ring_dcb_sriov()
61 if (fcoe->offset < tcs) in ixgbe_cache_ring_dcb_sriov()
112 * TCs : TC0/1 TC2/3 TC4-7 in ixgbe_get_first_reg_idx()
125 * TCs : TC0 TC1 TC2/3 in ixgbe_get_first_reg_idx()
333 u8 tcs = adapter->hw_tcs; in ixgbe_set_dcb_sriov_queues() local
336 if (tcs <= 1) in ixgbe_set_dcb_sriov_queues()
344 vmdq_i = min_t(u16, vmdq_i, MAX_TX_QUEUES / tcs); in ixgbe_set_dcb_sriov_queues()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/ice/ |
| D | ice_dcb_lib.c | 9 * ice_dcb_get_ena_tc - return bitmap of enabled TCs
10 * @dcbcfg: DCB config to evaluate for enabled TCs
103 * ice_dcb_get_num_tc - Get the number of TCs from DCBX config
104 * @dcbcfg: config to retrieve number of TCs from
114 * enabled and create a bitmask of enabled TCs in ice_dcb_get_num_tc()
119 /* Scan bitmask for contiguous TCs starting with TC0 */ in ice_dcb_get_num_tc()
125 pr_err("Non-contiguous TCs - Disabling DCB\n"); in ice_dcb_get_num_tc()
158 /* get bitmap of enabled TCs */ in ice_get_first_droptc()
161 /* get bitmap of PFC enabled TCs */ in ice_get_first_droptc()
318 /* returns number of contigous TCs and 1 TC for non-contigous TCs, in ice_dcb_bwchk()
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| /kernel/linux/linux-6.6/Documentation/networking/device_drivers/ethernet/intel/ |
| D | iavf.rst | 155 1. Create traffic classes (TCs). Maximum of 8 TCs can be created per interface.
158 Example: Sets up two tcs, tc0 and tc1, with 16 queues each and max tx rate set
167 map: priority mapping for up to 16 priorities to tcs (e.g. map 0 0 0 0 1 1 1 1
172 number of queues for all tcs is 64 or number of cores, whichever is lower.)
176 TCs, the queue configurations, and the QoS parameters.
186 TCs are configured using mqprio.
192 3. Apply TCs to ingress (RX) flow of interface::
199 - Setting up channels via ethtool (ethtool -L) is not supported when the TCs
216 - If traffic matches multiple TC filters that point to different TCs, that
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| /kernel/linux/linux-5.10/Documentation/networking/device_drivers/ethernet/intel/ |
| D | iavf.rst | 155 1. Create traffic classes (TCs). Maximum of 8 TCs can be created per interface.
158 Example: Sets up two tcs, tc0 and tc1, with 16 queues each and max tx rate set
167 map: priority mapping for up to 16 priorities to tcs (e.g. map 0 0 0 0 1 1 1 1
172 number of queues for all tcs is 64 or number of cores, whichever is lower.)
176 TCs, the queue configurations, and the QoS parameters.
186 TCs are configured using mqprio.
192 3. Apply TCs to ingress (RX) flow of interface::
199 - Setting up channels via ethtool (ethtool -L) is not supported when the TCs
216 - If traffic matches multiple TC filters that point to different TCs, that
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/interconnect/ |
| D | qcom,bcm-voter.yaml | 24 qcom,tcs-wait:
30 The AMC TCS is triggered immediately when icc_set_bw() is called. The
63 qcom,tcs-wait = <QCOM_ICC_TAG_AMC>;
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interconnect/ |
| D | qcom,bcm-voter.yaml | 24 qcom,tcs-wait:
30 The AMC TCS is triggered immediately when icc_set_bw() is called. The
63 qcom,tcs-wait = <QCOM_ICC_TAG_AMC>;
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| /kernel/linux/linux-6.6/arch/x86/include/asm/ |
| D | sgx.h | 190 * enum sgx_tcs_flags - execution flags for TCS
203 * struct sgx_tcs - Thread Control Structure (TCS)
204 * @state: used to mark an entered TCS
219 * Thread Control Structure (TCS) is an enclave page visible in its address
221 * an enclave by supplying address of TCS to ENCLU(EENTER). A TCS can be entered
257 * %SGX_PAGE_TYPE_TCS: a TCS page
282 * %SGX_SECINFO_TCS: a TCS page
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| /kernel/linux/linux-5.10/drivers/net/ethernet/aquantia/atlantic/ |
| D | aq_nic.c | 81 if (cfg->tcs > 2) in aq_nic_cfg_update_num_vecs()
101 cfg->tcs = AQ_CFG_TCS_DEF; in aq_nic_cfg_start()
153 cfg->prio_tc_map[i] = cfg->tcs * i / 8; in aq_nic_cfg_start()
544 self->aq_vecs * cfg->tcs); in aq_nic_start()
549 self->aq_vecs * cfg->tcs); in aq_nic_start()
553 for (i = 0; i < cfg->tcs; i++) { in aq_nic_start()
921 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) { in aq_nic_get_stats()
1451 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map) in aq_nic_setup_tc_mqprio() argument
1460 * disable request (tcs is 0) and we already is disabled in aq_nic_setup_tc_mqprio()
1462 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos)) in aq_nic_setup_tc_mqprio()
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| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/ice/ |
| D | ice_dcb_lib.c | 50 * ice_dcb_get_ena_tc - return bitmap of enabled TCs
51 * @dcbcfg: DCB config to evaluate for enabled TCs
144 * ice_dcb_get_num_tc - Get the number of TCs from DCBX config
145 * @dcbcfg: config to retrieve number of TCs from
155 * enabled and create a bitmask of enabled TCs in ice_dcb_get_num_tc()
160 /* Scan bitmask for contiguous TCs starting with TC0 */ in ice_dcb_get_num_tc()
166 pr_err("Non-contiguous TCs - Disabling DCB\n"); in ice_dcb_get_num_tc()
240 /* returns number of contigous TCs and 1 TC for non-contigous TCs, in ice_dcb_bwchk()
577 * ice_dcb_tc_contig - Check that TCs are contiguous
580 * Check if TCs begin with TC0 and are contiguous
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| /kernel/linux/linux-5.10/drivers/net/ethernet/aquantia/atlantic/hw_atl2/ |
| D | hw_atl2.c | 115 unsigned int tcs, q_per_tc; in hw_atl2_hw_queue_to_tc_map_set() local
124 tcs = 8; in hw_atl2_hw_queue_to_tc_map_set()
128 tcs = 4; in hw_atl2_hw_queue_to_tc_map_set()
135 for (tc = 0; tc != tcs; tc++) { in hw_atl2_hw_queue_to_tc_map_set()
177 tx_buff_size /= cfg->tcs; in hw_atl2_hw_qos_set()
178 rx_buff_size /= cfg->tcs; in hw_atl2_hw_qos_set()
179 for (tc = 0; tc < cfg->tcs; tc++) { in hw_atl2_hw_qos_set()
263 (BIT(nic_cfg->tcs) - 1); in hw_atl2_hw_init_tx_tc_rate_limit()
269 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit()
295 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/aquantia/atlantic/hw_atl2/ |
| D | hw_atl2.c | 115 unsigned int tcs, q_per_tc; in hw_atl2_hw_queue_to_tc_map_set() local
124 tcs = 8; in hw_atl2_hw_queue_to_tc_map_set()
128 tcs = 4; in hw_atl2_hw_queue_to_tc_map_set()
135 for (tc = 0; tc != tcs; tc++) { in hw_atl2_hw_queue_to_tc_map_set()
177 tx_buff_size /= cfg->tcs; in hw_atl2_hw_qos_set()
178 rx_buff_size /= cfg->tcs; in hw_atl2_hw_qos_set()
179 for (tc = 0; tc < cfg->tcs; tc++) { in hw_atl2_hw_qos_set()
263 (BIT(nic_cfg->tcs) - 1); in hw_atl2_hw_init_tx_tc_rate_limit()
269 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit()
295 for (tc = 0; tc != nic_cfg->tcs; tc++) { in hw_atl2_hw_init_tx_tc_rate_limit()
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| /kernel/linux/linux-6.6/drivers/net/ethernet/aquantia/atlantic/ |
| D | aq_nic.c | 81 if (cfg->tcs > 2) in aq_nic_cfg_update_num_vecs()
101 cfg->tcs = AQ_CFG_TCS_DEF; in aq_nic_cfg_start()
153 cfg->prio_tc_map[i] = cfg->tcs * i / 8; in aq_nic_cfg_start()
555 self->aq_vecs * cfg->tcs); in aq_nic_start()
560 self->aq_vecs * cfg->tcs); in aq_nic_start()
564 for (i = 0; i < cfg->tcs; i++) { in aq_nic_start()
1070 for (tc = 0U; tc < self->aq_nic_cfg.tcs; tc++) { in aq_nic_get_stats()
1602 int aq_nic_setup_tc_mqprio(struct aq_nic_s *self, u32 tcs, u8 *prio_tc_map) in aq_nic_setup_tc_mqprio() argument
1611 * disable request (tcs is 0) and we already is disabled in aq_nic_setup_tc_mqprio()
1613 if (tcs == cfg->tcs || (tcs == 0 && !cfg->is_qos)) in aq_nic_setup_tc_mqprio()
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