Searched +full:tightly +full:- +full:coupled (Results 1 – 25 of 54) sorted by relevance
123
| /kernel/linux/linux-5.10/arch/csky/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
119 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
162 # VA_BITS - PAGE_SHIFT - 3
196 prompt "C-SKY PMU type"
226 bool "Tightly-Coupled/Sram Memory"
229 The implementation are not only used by TCM (Tightly-Coupled Meory)
232 re-used directly.
276 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
281 int "Maximum number of CPUs (2-32)"
296 hex "DRAM start addr (the same with memory-section in dts)"
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| /kernel/linux/linux-6.6/arch/csky/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
39 select ARCH_WANT_FRAME_POINTERS if !CPU_CK610 && $(cc-option,-mbacktrace)
151 In kernel we parse the *regs->pc to determine whether to send SIGTRAP or not.
186 # VA_BITS - PAGE_SHIFT - 3
236 prompt "C-SKY PMU type"
266 bool "Tightly-Coupled/Sram Memory"
269 The implementation are not only used by TCM (Tightly-Coupled Memory)
272 re-used directly.
316 bool "Symmetric Multi-Processing (SMP) support for C-SKY"
321 int "Maximum number of CPUs (2-32)"
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| /kernel/linux/linux-6.6/Documentation/arch/arm/ |
| D | tcm.rst | 2 ARM TCM (Tightly-Coupled Memory) handling in Linux
7 Some ARM SoCs have a so-called TCM (Tightly-Coupled Memory).
8 This is usually just a few (4-64) KiB of RAM inside the ARM
12 Harvard-architecture, so there is an ITCM (instruction TCM)
24 determine if ITCM (bits 1-0) and/or DTCM (bit 17-16) is present
52 - FIQ and other interrupt handlers that need deterministic
55 - Idle loops where all external RAM is set to self-refresh
56 retention mode, so only on-chip RAM is accessible by
60 - Other operations which implies shutting off or reconfiguring
66 - Define the physical address and size of ITCM and DTCM.
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| /kernel/linux/linux-5.10/Documentation/arm/ |
| D | tcm.rst | 2 ARM TCM (Tightly-Coupled Memory) handling in Linux
7 Some ARM SoCs have a so-called TCM (Tightly-Coupled Memory).
8 This is usually just a few (4-64) KiB of RAM inside the ARM
12 Harvard-architecture, so there is an ITCM (instruction TCM)
24 determine if ITCM (bits 1-0) and/or DTCM (bit 17-16) is present
52 - FIQ and other interrupt handlers that need deterministic
55 - Idle loops where all external RAM is set to self-refresh
56 retention mode, so only on-chip RAM is accessible by
60 - Other operations which implies shutting off or reconfiguring
66 - Define the physical address and size of ITCM and DTCM.
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,nvic.txt | 3 The NVIC provides an interrupt controller that is tightly coupled to
4 Cortex-M based processor cores. The NVIC implemented on different SoCs
9 - compatible : should be one of:
10 "arm,v6m-nvic"
11 "arm,v7m-nvic"
12 "arm,v8m-nvic"
13 - interrupt-controller : Identifies the node as an interrupt controller
14 - #interrupt-cells : Specifies the number of cells needed to encode an
21 - reg : Specifies base physical address(s) and size of the NVIC registers.
24 - arm,num-irq-priority-bits: The number of priority bits implemented by the
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | arm,nvic.txt | 3 The NVIC provides an interrupt controller that is tightly coupled to
4 Cortex-M based processor cores. The NVIC implemented on different SoCs
9 - compatible : should be one of:
10 "arm,v6m-nvic"
11 "arm,v7m-nvic"
12 "arm,v8m-nvic"
13 - interrupt-controller : Identifies the node as an interrupt controller
14 - #interrupt-cells : Specifies the number of cells needed to encode an
21 - reg : Specifies base physical address(s) and size of the NVIC registers.
24 - arm,num-irq-priority-bits: The number of priority bits implemented by the
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| /kernel/linux/linux-6.6/Documentation/driver-api/hte/ |
| D | tegra-hte.rst | 1 .. SPDX-License-Identifier: GPL-2.0+
7 -----------
15 --------
19 instance supports timestamping GPIOs in real time as it is tightly coupled with
31 specified during IOCTL calls. Refer to ``tools/gpio/gpio-event-mon.c``, which
35 -----------------------------------------
40 one-to-one mapping with IRQ GTE provider, consumers can simply specify the IRQ
45 ``drivers/hte/hte-tegra194.c``. The test driver
46 ``drivers/hte/hte-tegra194-test.c`` demonstrates HTE API usage for both IRQ
|
| /kernel/linux/linux-6.6/Documentation/sound/soc/ |
| D | overview.rst | 6 provide better ALSA support for embedded system-on-chip processors (e.g.
9 had some limitations:-
11 * Codec drivers were often tightly coupled to the underlying SoC
12 CPU. This is not ideal and leads to code duplication - for example,
18 machine specific code to re-route audio, enable amps, etc., after such an
31 features :-
54 multiple re-usable component drivers :-
|
| /kernel/linux/linux-5.10/Documentation/sound/soc/ |
| D | overview.rst | 6 provide better ALSA support for embedded system-on-chip processors (e.g.
9 had some limitations:-
11 * Codec drivers were often tightly coupled to the underlying SoC
12 CPU. This is not ideal and leads to code duplication - for example,
18 machine specific code to re-route audio, enable amps, etc., after such an
31 features :-
54 multiple re-usable component drivers :-
|
| /kernel/linux/linux-5.10/drivers/cpuidle/ |
| D | coupled.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * coupled.c - helper functions to enter the same idle state on multiple cpus
21 * DOC: Coupled cpuidle states
30 * WFI), and one or more "coupled" power states that affect blocks
32 * sometimes the whole SoC). Entering a coupled power state must
33 * be tightly controlled on both cpus.
36 * WFI state until all cpus are ready to enter a coupled state, at
37 * which point the coupled state function will be called on all
46 * ready counter matches the number of online coupled cpus. If any
50 * requested_state stores the deepest coupled idle state each cpu
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| /kernel/linux/linux-6.6/drivers/cpuidle/ |
| D | coupled.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * coupled.c - helper functions to enter the same idle state on multiple cpus
21 * DOC: Coupled cpuidle states
30 * WFI), and one or more "coupled" power states that affect blocks
32 * sometimes the whole SoC). Entering a coupled power state must
33 * be tightly controlled on both cpus.
36 * WFI state until all cpus are ready to enter a coupled state, at
37 * which point the coupled state function will be called on all
46 * ready counter matches the number of online coupled cpus. If any
50 * requested_state stores the deepest coupled idle state each cpu
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | xlnx,zynqmp-r5fss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/xlnx,zynqmp-r5fss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ben Levinsky <ben.levinsky@amd.com>
11 - Tanmay Shah <tanmay.shah@amd.com>
14 The Xilinx platforms include a pair of Cortex-R5F processors (RPU) for
15 real-time processing based on the Cortex-R5F processor core from ARM.
16 The Cortex-R5F processor implements the Arm v7-R architecture and includes a
17 floating-point unit that implements the Arm VFPv3 instruction set.
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| /kernel/linux/linux-6.6/arch/arm/include/asm/ |
| D | cp15.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #define CR_P (1 << 4) /* 32-bit exception handler */
15 #define CR_D (1 << 5) /* 32-bit data address range */
55 extern unsigned long cr_alignment; /* defined in entry-armv.S */
107 * cr_alignment is tightly coupled to cp15 (at least in the minds of the
109 * read-only) is fine for most cases and saves quite some #ifdeffery.
|
| /kernel/linux/linux-5.10/arch/arm/include/asm/ |
| D | cp15.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
14 #define CR_P (1 << 4) /* 32-bit exception handler */
15 #define CR_D (1 << 5) /* 32-bit data address range */
55 extern unsigned long cr_alignment; /* defined in entry-armv.S */
107 * cr_alignment is tightly coupled to cp15 (at least in the minds of the
109 * read-only) is fine for most cases and saves quite some #ifdeffery.
|
| /kernel/linux/linux-6.6/drivers/media/platform/mediatek/vpu/ |
| D | mtk_vpu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
25 * enum ipi_id - the id of inter-processor interrupt
67 * enum rst_id - reset id to register reset function for VPU watchdog timeout
82 * vpu_ipi_register - register an ipi function
98 * vpu_ipi_send - send data from AP to vpu.
105 * This function is thread-safe. When this function returns,
117 * vpu_get_plat_device - get VPU's platform device
128 * vpu_wdt_reg_handler - register a VPU watchdog handler
146 * vpu_get_vdec_hw_capa - get video decoder hardware capability
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| D | mtk_vpu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
18 #include <linux/dma-mapping.h>
33 /* maximum program/data TCM (Tightly-Coupled Memory) size */
68 /* vpu inter-processor communication interrupt */
74 * enum vpu_fw_type - VPU firmware type
86 * struct vpu_mem - VPU extended program/data memory information
98 * struct vpu_regs - VPU TCM and configuration registers
100 * @tcm: the register for VPU Tightly-Coupled Memory
111 * struct vpu_wdt_handler - VPU watchdog reset handler
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| /kernel/linux/linux-5.10/drivers/media/platform/mtk-vpu/ |
| D | mtk_vpu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
23 * enum ipi_id - the id of inter-processor interrupt
65 * enum rst_id - reset id to register reset function for VPU watchdog timeout
80 * vpu_ipi_register - register an ipi function
96 * vpu_ipi_send - send data from AP to vpu.
103 * This function is thread-safe. When this function returns,
115 * vpu_get_plat_device - get VPU's platform device
126 * vpu_wdt_reg_handler - register a VPU watchdog handler
144 * vpu_get_vdec_hw_capa - get video decoder hardware capability
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| D | mtk_vpu.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
18 #include <linux/dma-mapping.h>
32 /* maximum program/data TCM (Tightly-Coupled Memory) size */
63 /* vpu inter-processor communication interrupt */
67 * enum vpu_fw_type - VPU firmware type
79 * struct vpu_mem - VPU extended program/data memory information
91 * struct vpu_regs - VPU TCM and configuration registers
93 * @tcm: the register for VPU Tightly-Coupled Memory
104 * struct vpu_wdt_handler - VPU watchdog reset handler
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/ |
| D | k3-am62a-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "pinctrl-single";
12 #pinctrl-cells = <1>;
13 pinctrl-single,register-width = <32>;
14 pinctrl-single,function-mask = <0xffffffff>;
24 compatible = "ti,am654-timer";
27 clock-names = "fck";
28 power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
29 ti,timer-pwm;
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| D | k3-am62-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "pinctrl-single";
12 #pinctrl-cells = <1>;
13 pinctrl-single,register-width = <32>;
14 pinctrl-single,function-mask = <0xffffffff>;
18 compatible = "ti,j721e-esm";
20 ti,esm-pins = <0>, <1>, <2>, <85>;
29 compatible = "ti,am654-timer";
32 clock-names = "fck";
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| /kernel/linux/linux-5.10/drivers/bus/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
53 errors counter. The counter and the APB-bus operations timeout can be
57 bool "Baikal-T1 AXI-bus driver"
61 AXI3-bus is the main communication bus connecting all high-speed
62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
103 cores. This bus is for per-CPU tightly coupled devices such as the
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/leds/ |
| D | common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
21 have to be tightly coupled with the LED device binding. They are represented
25 led-sources:
30 $ref: /schemas/types.yaml#definitions/uint32-array
35 from the header include/dt-bindings/leds/common.h. If there is no
42 the header include/dt-bindings/leds/common.h. If there is no matching
[all …]
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| /kernel/linux/linux-6.6/drivers/bus/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
53 errors counter. The counter and the APB-bus operations timeout can be
57 bool "Baikal-T1 AXI-bus driver"
61 AXI3-bus is the main communication bus connecting all high-speed
62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
114 cores. This bus is for per-CPU tightly coupled devices such as the
[all …]
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| /kernel/linux/linux-6.6/drivers/power/supply/ |
| D | ab8500_bmdata.c | 1 // SPDX-License-Identifier: GPL-2.0
6 #include "ab8500-bm.h"
57 { .temp = -10, .resistance = 158 /* 445 mOhm */ },
58 { .temp = -20, .resistance = 198 /* 595 mOhm */ },
144 struct device *dev = &psy->dev; in ab8500_bm_of_probe()
147 ret = power_supply_get_battery_info(psy, &bm->bi); in ab8500_bm_of_probe()
152 bi = bm->bi; in ab8500_bm_of_probe()
155 if (bi->charge_full_design_uah < 0) in ab8500_bm_of_probe()
157 bi->charge_full_design_uah = 612000; in ab8500_bm_of_probe()
163 if ((bi->voltage_min_design_uv < 0) || in ab8500_bm_of_probe()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/leds/ |
| D | common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
21 have to be tightly coupled with the LED device binding. They are represented
25 led-sources:
30 $ref: /schemas/types.yaml#/definitions/uint32-array
35 from the header include/dt-bindings/leds/common.h. If there is no
42 the header include/dt-bindings/leds/common.h. If there is no matching
[all …]
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