| /kernel/linux/linux-5.10/drivers/pinctrl/tegra/ |
| D | pinctrl-tegra.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
44 /* argument: Integer, range is HW-dependant */
46 /* argument: Integer, range is HW-dependant */
48 /* argument: Integer, range is HW-dependant */
50 /* argument: Integer, range is HW-dependant */
52 /* argument: Integer, range is HW-dependant */
72 * struct tegra_function - Tegra pinctrl mux function
84 * struct tegra_pingroup - Tegra pin group
94 * @pupd_reg: Pull-up/down register offset.
95 * @pupd_bank: Pull-up/down register bank.
[all …]
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| /kernel/linux/linux-6.6/drivers/pinctrl/tegra/ |
| D | pinctrl-tegra.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
28 /* Array of size soc->ngroups */
53 /* argument: Integer, range is HW-dependant */
55 /* argument: Integer, range is HW-dependant */
57 /* argument: Integer, range is HW-dependant */
59 /* argument: Integer, range is HW-dependant */
61 /* argument: Integer, range is HW-dependant */
81 * struct tegra_function - Tegra pinctrl mux function
93 * struct tegra_pingroup - Tegra pin group
103 * @pupd_reg: Pull-up/down register offset.
[all …]
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| /kernel/linux/linux-6.6/scripts/kconfig/ |
| D | symbol.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
47 enum symbol_type type = sym->type; in sym_get_type()
50 if (sym_is_choice_value(sym) && sym->visible == yes) in sym_get_type()
91 prop->visible.tri = expr_calc_value(prop->visible.expr); in sym_get_default_prop()
92 if (prop->visible.tri != no) in sym_get_default_prop()
103 prop->visible.tri = expr_calc_value(prop->visible.expr); in sym_get_range_prop()
104 if (prop->visible.tri != no) in sym_get_range_prop()
113 switch (sym->type) { in sym_get_range_val()
123 return strtoll(sym->curr.val, NULL, base); in sym_get_range_val()
[all …]
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| D | confdata.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
99 tmp[sizeof(tmp) - 1] = 0; in make_parent_dir()
117 return -1; in make_parent_dir()
137 return -1; in conf_touch_dep()
142 if (fd == -1) in conf_touch_dep()
143 return -1; in conf_touch_dep()
237 switch (sym->type) { in conf_set_sym_val()
240 sym->def[def].tri = mod; in conf_set_sym_val()
241 sym->flags |= def_flags; in conf_set_sym_val()
[all …]
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| /kernel/linux/linux-5.10/scripts/kconfig/ |
| D | symbol.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
44 enum symbol_type type = sym->type; in sym_get_type()
47 if (sym_is_choice_value(sym) && sym->visible == yes) in sym_get_type()
88 prop->visible.tri = expr_calc_value(prop->visible.expr); in sym_get_default_prop()
89 if (prop->visible.tri != no) in sym_get_default_prop()
100 prop->visible.tri = expr_calc_value(prop->visible.expr); in sym_get_range_prop()
101 if (prop->visible.tri != no) in sym_get_range_prop()
110 switch (sym->type) { in sym_get_range_val()
120 return strtoll(sym->curr.val, NULL, base); in sym_get_range_val()
[all …]
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| D | confdata.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2002 Roman Zippel <zippel@linux-m68k.org>
97 tmp[sizeof(tmp) - 1] = 0; in make_parent_dir()
115 return -1; in make_parent_dir()
137 return -1; in conf_touch_dep()
148 if (fd == -1) { in conf_touch_dep()
150 return -1; in conf_touch_dep()
158 if (fd == -1) in conf_touch_dep()
159 return -1; in conf_touch_dep()
238 switch (sym->type) { in conf_set_sym_val()
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-bindings.txt | 4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
21 for client device device tree nodes to map those state names to the pin
25 For example, a pin controller may set up its own "active" state when the
35 For each client device individually, every pin state is assigned an integer
36 ID. These numbers start at 0, and are contiguous. For each state ID, a unique
37 property exists to define the pin configuration. Each state may also be
42 defined in its device tree node, and whether to define the set of state
43 IDs that must be provided, or whether to define the set of state names that
47 pinctrl-0: List of phandles, each pointing at a pin configuration
[all …]
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| D | nvidia,tegra20-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra20-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra20-pinmux
19 - description: tri-state registers
20 - description: mux register
21 - description: pull-up/down registers
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-bindings.txt | 4 such as pull-up/down, tri-state, drive-strength etc are designated as pin
15 need to reconfigure pins at run-time, for example to tri-state pins when the
21 for client device device tree nodes to map those state names to the pin
25 For example, a pin controller may set up its own "active" state when the
35 For each client device individually, every pin state is assigned an integer
36 ID. These numbers start at 0, and are contiguous. For each state ID, a unique
37 property exists to define the pin configuration. Each state may also be
42 defined in its device tree node, and whether to define the set of state
43 IDs that must be provided, or whether to define the set of state names that
47 pinctrl-0: List of phandles, each pointing at a pin configuration
[all …]
|
| D | nvidia,tegra20-pinmux.txt | 4 - compatible: "nvidia,tegra20-pinmux"
5 - reg: Should contain the register physical address and length for each of
6 the tri-state, mux, pull-up/down, and pad control register sets.
8 Please refer to pinctrl-bindings.txt in this directory for details of the
16 parameters, such as pull-up, tristate, drive strength, etc.
30 Required subnode-properties:
31 - nvidia,pins : An array of strings. Each string contains the name of a pin or
34 Optional subnode-properties:
35 - nvidia,function: A string containing the name of the function to mux to the
38 - nvidia,pull: Integer, representing the pull-down/up to apply to the pin.
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/gpio/ |
| D | hw_gpio.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
35 gpio->regs->field_name ## _shift, gpio->regs->field_name ## _mask
38 gpio->base.ctx
40 (gpio->regs->reg)
45 REG_GET(MASK_reg, MASK, &gpio->store.mask); in store_registers()
46 REG_GET(A_reg, A, &gpio->store.a); in store_registers()
47 REG_GET(EN_reg, EN, &gpio->store.en); in store_registers()
54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers()
55 REG_UPDATE(A_reg, A, gpio->store.a); in restore_registers()
56 REG_UPDATE(EN_reg, EN, gpio->store.en); in restore_registers()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/gpio/ |
| D | hw_gpio.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
35 gpio->regs->field_name ## _shift, gpio->regs->field_name ## _mask
38 gpio->base.ctx
40 (gpio->regs->reg)
45 REG_GET(MASK_reg, MASK, &gpio->store.mask); in store_registers()
46 REG_GET(A_reg, A, &gpio->store.a); in store_registers()
47 REG_GET(EN_reg, EN, &gpio->store.en); in store_registers()
54 REG_UPDATE(MASK_reg, MASK, gpio->store.mask); in restore_registers()
55 REG_UPDATE(A_reg, A, gpio->store.a); in restore_registers()
56 REG_UPDATE(EN_reg, EN, gpio->store.en); in restore_registers()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/chelsio/cxgb/ |
| D | vsc7326_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Straight off the data sheet, VMDS-10038 Rev 2.0 and
9 * PD0011-01-14-Meigs-II 2002-12-12
61 #define BIST_ERROR_STATE 0x07 /* BIST engine internal state */
69 * fn = FIFO number, 0-9
84 * bn = bucket number 0-10 (yes, 11 buckets)
114 #define REG_SPI4_DBG_CNT(n) CRA(0x5,0x0,0x10+n) /* Debug counters 0-9 */
133 * tri-speed are only defined with the version that needs a port number.
140 /* 10GbE specific, and different from tri-speed */
147 #define REG_MAX_RXHIGH CRA(0x1,0xa,0x0a) /* XGMII lane 0-3 debug */
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/chelsio/cxgb/ |
| D | vsc7326_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
8 * Straight off the data sheet, VMDS-10038 Rev 2.0 and
9 * PD0011-01-14-Meigs-II 2002-12-12
61 #define BIST_ERROR_STATE 0x07 /* BIST engine internal state */
69 * fn = FIFO number, 0-9
84 * bn = bucket number 0-10 (yes, 11 buckets)
114 #define REG_SPI4_DBG_CNT(n) CRA(0x5,0x0,0x10+n) /* Debug counters 0-9 */
133 * tri-speed are only defined with the version that needs a port number.
140 /* 10GbE specific, and different from tri-speed */
147 #define REG_MAX_RXHIGH CRA(0x1,0xa,0x0a) /* XGMII lane 0-3 debug */
[all …]
|
| /kernel/linux/linux-6.6/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/ |
| D | fifo_monitor_local.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (c) 2010-2015, Intel Corporation.
88 /* The switch is tri-state */
|
| /kernel/linux/linux-5.10/drivers/staging/media/atomisp/pci/hive_isp_css_common/host/ |
| D | fifo_monitor_local.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright (c) 2010-2015, Intel Corporation.
88 /* The switch is tri-state */
|
| /kernel/linux/linux-6.6/arch/powerpc/platforms/pasemi/ |
| D | gpio_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2007 PA Semi, Inc
9 * Based on drivers/net/fs_enet/mii-bitbang.c.
34 #define MDC_PIN(bus) (((struct gpio_priv *)bus->priv)->mdc_pin)
35 #define MDIO_PIN(bus) (((struct gpio_priv *)bus->priv)->mdio_pin)
124 /* tri-state our MDIO I/O pin so we can read */ in gpio_mdio_read()
190 * Tri-state the MDIO line. in gpio_mdio_write()
202 /*nothing here - dunno how to reset it*/ in gpio_mdio_reset()
209 struct device *dev = &ofdev->dev; in gpio_mdio_probe()
210 struct device_node *np = ofdev->dev.of_node; in gpio_mdio_probe()
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/pasemi/ |
| D | gpio_mdio.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2006-2007 PA Semi, Inc
9 * Based on drivers/net/fs_enet/mii-bitbang.c.
34 #define MDC_PIN(bus) (((struct gpio_priv *)bus->priv)->mdc_pin)
35 #define MDIO_PIN(bus) (((struct gpio_priv *)bus->priv)->mdio_pin)
124 /* tri-state our MDIO I/O pin so we can read */ in gpio_mdio_read()
190 * Tri-state the MDIO line. in gpio_mdio_write()
202 /*nothing here - dunno how to reset it*/ in gpio_mdio_reset()
209 struct device *dev = &ofdev->dev; in gpio_mdio_probe()
210 struct device_node *np = ofdev->dev.of_node; in gpio_mdio_probe()
[all …]
|
| /kernel/linux/linux-6.6/drivers/media/dvb-frontends/ |
| D | dib0070.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Linux-DVB Driver for DiBcom's DiB0070 base-band RF Tuner.
5 * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
31 u8 osc_buffer_state; /* 0= normal, 1= tri-state */
35 u8 invert_iq; /* invert Q - in case I or Q is inverted on the board */
37 u8 force_crystal_mode; /* if == 0 -> decision is made in the driver default: <24 -> 2, >=24 -> 1 */
|
| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | dib0070.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Linux-DVB Driver for DiBcom's DiB0070 base-band RF Tuner.
5 * Copyright (C) 2005-7 DiBcom (http://www.dibcom.fr/)
31 u8 osc_buffer_state; /* 0= normal, 1= tri-state */
35 u8 invert_iq; /* invert Q - in case I or Q is inverted on the board */
37 u8 force_crystal_mode; /* if == 0 -> decision is made in the driver default: <24 -> 2, >=24 -> 1 */
|
| /kernel/linux/linux-6.6/drivers/atm/ |
| D | suni.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * drivers/atm/suni.h - S/UNI PHY driver
6 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
26 /* 0x08-0x0F reserved */
29 #define SUNI_RSOP_SBL 0x12 /* RSOP Section BIP-8 LSB */
30 #define SUNI_RSOP_SBM 0x13 /* RSOP Section BIP-8 MSB */
33 /* 0x16-0x17 reserved */
36 #define SUNI_RLOP_LBL 0x1A /* RLOP Line BIP-8/24 LSB */
37 #define SUNI_RLOP_LB 0x1B /* RLOP Line BIP-8/24 */
38 #define SUNI_RLOP_LBM 0x1C /* RLOP Line BIP-8/24 MSB */
[all …]
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| /kernel/linux/linux-5.10/drivers/atm/ |
| D | suni.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * drivers/atm/suni.h - S/UNI PHY driver
6 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
26 /* 0x08-0x0F reserved */
29 #define SUNI_RSOP_SBL 0x12 /* RSOP Section BIP-8 LSB */
30 #define SUNI_RSOP_SBM 0x13 /* RSOP Section BIP-8 MSB */
33 /* 0x16-0x17 reserved */
36 #define SUNI_RLOP_LBL 0x1A /* RLOP Line BIP-8/24 LSB */
37 #define SUNI_RLOP_LB 0x1B /* RLOP Line BIP-8/24 */
38 #define SUNI_RLOP_LBM 0x1C /* RLOP Line BIP-8/24 MSB */
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-xilinx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2008 - 2013 Xilinx, Inc.
34 * struct xgpio_instance - Stores information about GPIO device
38 * @gpio_state: GPIO state shadow register
53 if (gpio >= chip->gpio_width[0]) in xgpio_index()
70 return gpio - chip->gpio_width[0]; in xgpio_offset()
76 * xgpio_get - Read the specified signal of the GPIO device.
91 val = xgpio_readreg(chip->regs + XGPIO_DATA_OFFSET + in xgpio_get()
98 * xgpio_set - Write the specified signal of the GPIO device.
113 spin_lock_irqsave(&chip->gpio_lock[index], flags); in xgpio_set()
[all …]
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| /kernel/linux/linux-5.10/drivers/pcmcia/ |
| D | vg468.h | 72 #define VG468_CTL_TSSI 0x08 /* Tri-state some outputs */
78 #define VG469_CTL_WS_COMPAT 0x04 /* Wait state compatibility */
89 #define VG468_MISC_GPIO 0x04 /* General-purpose IO */
90 #define VG468_MISC_DMAWSB 0x08 /* DMA wait state control */
|
| /kernel/linux/linux-6.6/drivers/pcmcia/ |
| D | vg468.h | 72 #define VG468_CTL_TSSI 0x08 /* Tri-state some outputs */
78 #define VG469_CTL_WS_COMPAT 0x04 /* Wait state compatibility */
89 #define VG468_MISC_GPIO 0x04 /* General-purpose IO */
90 #define VG468_MISC_DMAWSB 0x08 /* DMA wait state control */
|