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/kernel/linux/linux-6.6/Documentation/driver-api/
Dedac.rst5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
35 * Channel
37 A memory controller channel, responsible to communicate with a group of
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
44 controller. Typically, it contains two channels. Two channels at the
49 is calculated using two DIMMs instead of one. Due to that, it is capable
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/bridge/
Dfsl,imx8qxp-ldb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-ldb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Liu Ying <victor.liu@nxp.com>
13 The Freescale i.MX8qm/qxp LVDS Display Bridge(LDB) has two channels.
19 For i.MX8qxp LDB, each channel supports up to 24bpp parallel input color
20 format and can map the input to VESA or JEIDA standards. The two channels
22 them to use. Two LDB channels from two LDB instances can work together in
23 LDB split mode to support a dual link LVDS display. The channel indexes
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/xilinx/
Dxilinx_dma.txt2 It can be configured to have one channel or two channels. If configured
3 as two channels, one is to transmit to the video device and another is
7 target devices. It can be configured to have one channel or two channels.
8 If configured as two channels, one is to transmit to the device and another
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/xilinx/
Dxilinx_dma.txt2 It can be configured to have one channel or two channels. If configured
3 as two channels, one is to transmit to the video device and another is
7 target devices. It can be configured to have one channel or two channels.
8 If configured as two channels, one is to transmit to the device and another
11 Xilinx AXI CDMA engine, it does transfers between memory-mapped source
12 address and a memory-mapped destination address.
19 - compatible: Should be one of-
20 "xlnx,axi-vdma-1.00.a"
21 "xlnx,axi-dma-1.00.a"
22 "xlnx,axi-cdma-1.00.a"
[all …]
/kernel/linux/linux-6.6/Documentation/driver-api/iio/
Dcore.rst8 :file:`drivers/iio/industrialio-*`
11 ----------------------
13 * struct iio_dev - industrial I/O device
14 * iio_device_alloc() - allocate an :c:type:`iio_dev` from a driver
15 * iio_device_free() - free an :c:type:`iio_dev` from a driver
16 * iio_device_register() - register a device with the IIO subsystem
17 * iio_device_unregister() - unregister a device from the IIO
25 There are two ways for a user space application to interact with an IIO driver.
33 :doc:`SPI <../spi>` driver and will create two routines, probe and remove.
63 :file:`Documentation/ABI/testing/sysfs-bus-iio` file in the Linux kernel
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/iio/
Dcore.rst8 :file:`drivers/iio/industrialio-*`
11 ----------------------
13 * struct iio_dev - industrial I/O device
14 * iio_device_alloc() - allocate an :c:type:`iio_dev` from a driver
15 * iio_device_free() - free an :c:type:`iio_dev` from a driver
16 * iio_device_register() - register a device with the IIO subsystem
17 * iio_device_unregister() - unregister a device from the IIO
25 There are two ways for a user space application to interact with an IIO driver.
33 :doc:`SPI <../spi>` driver and will create two routines, probe and remove.
63 :file:`Documentation/ABI/testing/sysfs-bus-iio` file in the Linux kernel
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/
Dedac.rst5 ----------------------------------------
8 *sockets, *socket sets*, *banks*, *rows*, *chip-select rows*, *channels*,
35 * Channel
37 A memory controller channel, responsible to communicate with a group of
38 DIMMs. Each channel has its own independent control (command) and data
43 It is typically the highest hierarchy on a Fully-Buffered DIMM memory
44 controller. Typically, it contains two channels. Two channels at the
49 is calculated using two DIMMs instead of one. Due to that, it is capable
52 * Single-channel
55 only. E. g. if the data is 64 bits-wide, the data flows to the CPU using
[all …]
/kernel/linux/linux-6.6/Documentation/hwmon/
Dlm93.rst10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <mhoffman@lightlink.com>
25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com>
26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org>
27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
54 --------------------
[all …]
/kernel/linux/linux-5.10/Documentation/hwmon/
Dlm93.rst10 Addresses scanned: I2C 0x2c-0x2e
18 Addresses scanned: I2C 0x2c-0x2e
24 - Mark M. Hoffman <mhoffman@lightlink.com>
25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com>
26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org>
27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de>
30 -----------------
33 Set to non-zero to force some initializations (default is 0).
38 Configures in7 and in8 limit type, where 0 means absolute and non-zero
54 --------------------
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/imx/
Dldb.txt1 Device-Tree bindings for LVDS Display Bridge (ldb)
6 The LVDS Display Bridge device tree node contains up to two lvds-channel
7 nodes describing each of the two LVDS encoder channels of the bridge.
10 - #address-cells : should be <1>
11 - #size-cells : should be <0>
12 - compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
15 interfaces as input for each LVDS channel.
16 - gpr : should be <&gpr> on i.MX53 and i.MX6q.
17 The phandle points to the iomuxc-gpr region containing the LVDS
19 - clocks, clock-names : phandles to the LDB divider and selector clocks and to
[all …]
/kernel/linux/linux-6.6/drivers/comedi/drivers/
Dcb_pcidda.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Driver for the ComputerBoards / MeasurementComputing PCI-DDA series.
9 * COMEDI - Linux Control and Measurement Device Interface
10 * Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
15 * Description: MeasurementComputing PCI-DDA series
16 * Devices: [Measurement Computing] PCI-DDA08/12 (pci-dda08/12),
17 * PCI-DDA04/12 (pci-dda04/12), PCI-DDA02/12 (pci-dda02/12),
18 * PCI-DDA08/16 (pci-dda08/16), PCI-DDA04/16 (pci-dda04/16),
19 * PCI-DDA02/16 (pci-dda02/16)
45 #define CB_DDA_DA_CTRL_DAC(x) ((x) << 2) /* Specify DAC channel */
[all …]
/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/
Dcb_pcidda.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Driver for the ComputerBoards / MeasurementComputing PCI-DDA series.
9 * COMEDI - Linux Control and Measurement Device Interface
10 * Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
15 * Description: MeasurementComputing PCI-DDA series
16 * Devices: [Measurement Computing] PCI-DDA08/12 (pci-dda08/12),
17 * PCI-DDA04/12 (pci-dda04/12), PCI-DDA02/12 (pci-dda02/12),
18 * PCI-DDA08/16 (pci-dda08/16), PCI-DDA04/16 (pci-dda04/16),
19 * PCI-DDA02/16 (pci-dda02/16)
47 #define CB_DDA_DA_CTRL_DAC(x) ((x) << 2) /* Specify DAC channel */
[all …]
/kernel/linux/linux-5.10/Documentation/sound/cards/
Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
11 CM8x38 chip can use ADC as the second DAC so that two different stereo
12 channels can be used for front/rear playbacks. Since there are two
13 DACs, both streams are handled independently unlike the 4/6ch multi-
14 channel playbacks in the section below.
20 There are slight differences between the two DACs:
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
[all …]
/kernel/linux/linux-6.6/Documentation/sound/cards/
Dcmipci.rst2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
11 CM8x38 chip can use ADC as the second DAC so that two different stereo
12 channels can be used for front/rear playbacks. Since there are two
13 DACs, both streams are handled independently unlike the 4/6ch multi-
14 channel playbacks in the section below.
20 There are slight differences between the two DACs:
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
[all …]
/kernel/linux/linux-6.6/Documentation/virt/hyperv/
Dvmbus.rst1 .. SPDX-License-Identifier: GPL-2.0
5 VMbus is a software construct provided by Hyper-V to guest VMs. It
7 devices that Hyper-V presents to guest VMs. The control path is
11 and the synthetic device implementation that is part of Hyper-V, and
12 signaling primitives to allow Hyper-V and the guest to interrupt
17 establishes the VMbus control path with the Hyper-V host, then
21 Most synthetic devices offered by Hyper-V have a corresponding Linux
29 * PCI device pass-thru
34 * Key/Value Pair (KVP) exchange with Hyper-V
35 * Hyper-V online backup (a.k.a. VSS)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Drenesas,drif.txt1 Renesas R-Car Gen3 Digital Radio Interface controller (DRIF)
2 ------------------------------------------------------------
4 R-Car Gen3 DRIF is a SPI like receive only slave device. A general
7 +---------------------+ +---------------------+
8 | |-----SCK------->|CLK |
9 | Master |-----SS-------->|SYNC DRIFn (slave) |
10 | |-----SD0------->|D0 |
11 | |-----SD1------->|D1 |
12 +---------------------+ +---------------------+
14 As per datasheet, each DRIF channel (drifn) is made up of two internal
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/
Darm,mhuv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
16 communication with remote processor(s), where the number of channel windows
21 between two processing elements to provide bidirectional communication, these
22 must be specified as two separate mailboxes.
33 - Data-transfer: Each transfer is made of one or more words, using one or more
[all …]
Dfsl,mu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The Messaging Unit module enables two processors within the SoC to
21 other. The MU accomplishes synchronization using two sets of matching
22 registers (Processor A-facing, Processor B-facing).
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8ulp-mu
[all …]
/kernel/linux/linux-6.6/Documentation/userspace-api/media/v4l/
Dvidioc-g-modulator.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
47 Modulators have two writable properties, an audio modulation set and the
52 this is a write-only ioctl, it does not return the actual audio
67 .. flat-table:: struct v4l2_modulator
68 :header-rows: 0
69 :stub-columns: 0
72 * - __u32
73 - ``index``
74 - Identifies the modulator, set by the application.
[all …]
/kernel/linux/linux-5.10/Documentation/userspace-api/media/v4l/
Dvidioc-g-modulator.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
13 VIDIOC_G_MODULATOR - VIDIOC_S_MODULATOR - Get or set modulator attributes
47 Modulators have two writable properties, an audio modulation set and the
52 this is a write-only ioctl, it does not return the actual audio
67 .. flat-table:: struct v4l2_modulator
68 :header-rows: 0
69 :stub-columns: 0
72 * - __u32
73 - ``index``
74 - Identifies the modulator, set by the application.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mailbox/
Dfsl,mu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The Messaging Unit module enables two processors within the SoC to
21 other. The MU accomplishes synchronization using two sets of matching
22 registers (Processor A-facing, Processor B-facing).
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8-mu-scu
[all …]
/kernel/linux/linux-5.10/arch/s390/include/uapi/asm/
Dcmb.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
8 * struct cmbdata - channel measurement block data for user space
24 * Currently, two formats are known, which differ by the size of
25 * this structure, i.e. the last two members are only set when
26 * the extended channel measurement facility (first shipped in
47 /* enable channel measurement */
49 /* enable channel measurement */
51 /* read channel measurement data */
/kernel/linux/linux-6.6/arch/s390/include/uapi/asm/
Dcmb.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
8 * struct cmbdata - channel measurement block data for user space
24 * Currently, two formats are known, which differ by the size of
25 * this structure, i.e. the last two members are only set when
26 * the extended channel measurement facility (first shipped in
47 /* enable channel measurement */
49 /* enable channel measurement */
51 /* read channel measurement data */
/kernel/linux/linux-6.6/drivers/net/wireless/intel/iwlwifi/fw/api/
Dnvm-reg.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2012-2014, 2018-2022 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
11 * enum iwl_regulatory_and_nvm_subcmd_ids - regulatory/NVM commands
53 * enum iwl_nvm_access_op - NVM access opcode
63 * enum iwl_nvm_access_target - target of the NVM_ACCESS_CMD
75 * enum iwl_nvm_section_type - section types for NVM_ACCESS_CMD
97 * struct iwl_nvm_access_cmd - Request the device to send an NVM section
115 * struct iwl_nvm_access_resp_ver2 - response to NVM_ACCESS_CMD
[all …]

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