| /kernel/linux/linux-5.10/drivers/media/pci/ivtv/ |
| D | ivtv-udma.c | 12 #include "ivtv-udma.h"
82 if (itv->udma.SG_handle == 0) { in ivtv_udma_alloc()
84 itv->udma.SG_handle = pci_map_single(itv->pdev, itv->udma.SGarray, in ivtv_udma_alloc()
85 sizeof(itv->udma.SGarray), PCI_DMA_TODEVICE); in ivtv_udma_alloc()
94 struct ivtv_user_dma *dma = &itv->udma; in ivtv_udma_setup()
152 struct ivtv_user_dma *dma = &itv->udma; in ivtv_udma_unmap()
177 if (itv->udma.SG_handle) { in ivtv_udma_free()
178 pci_unmap_single(itv->pdev, itv->udma.SG_handle, in ivtv_udma_free()
179 sizeof(itv->udma.SGarray), PCI_DMA_TODEVICE); in ivtv_udma_free()
183 if (itv->udma.SG_length) { in ivtv_udma_free()
[all …]
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| D | ivtv-udma.h | 26 pci_dma_sync_single_for_device(itv->pdev, itv->udma.SG_handle, in ivtv_udma_sync_for_device()
27 sizeof(itv->udma.SGarray), PCI_DMA_TODEVICE); in ivtv_udma_sync_for_device()
32 pci_dma_sync_single_for_cpu(itv->pdev, itv->udma.SG_handle, in ivtv_udma_sync_for_cpu()
33 sizeof(itv->udma.SGarray), PCI_DMA_TODEVICE); in ivtv_udma_sync_for_cpu()
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| /kernel/linux/linux-6.6/drivers/media/pci/ivtv/ |
| D | ivtv-udma.c | 12 #include "ivtv-udma.h"
82 if (itv->udma.SG_handle == 0) { in ivtv_udma_alloc()
84 itv->udma.SG_handle = dma_map_single(&itv->pdev->dev, in ivtv_udma_alloc()
85 itv->udma.SGarray, in ivtv_udma_alloc()
86 sizeof(itv->udma.SGarray), in ivtv_udma_alloc()
96 struct ivtv_user_dma *dma = &itv->udma; in ivtv_udma_setup()
163 struct ivtv_user_dma *dma = &itv->udma; in ivtv_udma_unmap()
189 if (itv->udma.SG_handle) { in ivtv_udma_free()
190 dma_unmap_single(&itv->pdev->dev, itv->udma.SG_handle, in ivtv_udma_free()
191 sizeof(itv->udma.SGarray), DMA_TO_DEVICE); in ivtv_udma_free()
[all …]
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| D | ivtv-udma.h | 26 dma_sync_single_for_device(&itv->pdev->dev, itv->udma.SG_handle, in ivtv_udma_sync_for_device()
27 sizeof(itv->udma.SGarray), DMA_TO_DEVICE); in ivtv_udma_sync_for_device()
32 dma_sync_single_for_cpu(&itv->pdev->dev, itv->udma.SG_handle, in ivtv_udma_sync_for_cpu()
33 sizeof(itv->udma.SGarray), DMA_TO_DEVICE); in ivtv_udma_sync_for_cpu()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/ti/ |
| D | k3-udma.yaml | 4 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml#
13 The UDMA-P is intended to perform similar (but significantly upgraded)
14 functions as the packet-oriented DMA used on previous SoC devices. The UDMA-P
16 The UDMA-P architecture facilitates the segmentation and reassembly of SoC DMA
29 The UDMA-P also supports acting as both a UTC and UDMA-C for its internal
30 channels. Channels in the UDMA-P can be configured to be either Packet-Based
35 The peripherals serviced by UDMA can be PSI-L native (sa2ul, cpsw, etc) or
93 Array of UDMA tchan resource subtypes for resource allocation for this
102 Array of UDMA rchan resource subtypes for resource allocation for this
111 Array of UDMA rflow resource subtypes for resource allocation for this
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/ti/ |
| D | k3-udma.yaml | 6 $id: http://devicetree.org/schemas/dma/ti/k3-udma.yaml#
15 The UDMA-P is intended to perform similar (but significantly upgraded)
16 functions as the packet-oriented DMA used on previous SoC devices. The UDMA-P
18 The UDMA-P architecture facilitates the segmentation and reassembly of SoC DMA
31 The UDMA-P also supports acting as both a UTC and UDMA-C for its internal
32 channels. Channels in the UDMA-P can be configured to be either Packet-Based
37 The peripherals serviced by UDMA can be PSI-L native (sa2ul, cpsw, etc) or
88 Array of UDMA tchan resource subtypes for resource allocation for this
97 Array of UDMA rchan resource subtypes for resource allocation for this
106 Array of UDMA rflow resource subtypes for resource allocation for this
[all …]
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| /kernel/linux/linux-6.6/drivers/ata/ |
| D | pata_amd.c | 77 if (speed == XFER_UDMA_5 && amd_clock <= 33333) at.udma = 1; in timing_setup()
78 if (speed == XFER_UDMA_6 && amd_clock <= 33333) at.udma = 15; in timing_setup()
99 t = at.udma ? (0xc0 | (clamp_val(at.udma, 2, 5) - 2)) : 0x03; in timing_setup()
103 t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 2, 10)]) : 0x03; in timing_setup()
107 t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 1, 10)]) : 0x03; in timing_setup()
111 t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 1, 15)]) : 0x03; in timing_setup()
118 /* UDMA timing */ in timing_setup()
119 if (at.udma) in timing_setup()
237 * Program the MWDMA/UDMA modes for the AMD and Nvidia
275 u32 saved_udma, udma; in nv_mode_filter() local
[all …]
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| D | pata_via.c | 13 * VIA VT82C586a - Added UDMA to 33Mhz
195 /* UDMA 66 chips have only drive side logic */ in via_cable_detect()
198 /* UDMA 100 or later */ in via_cable_detect()
234 * @udma_type: UDMA mode/format of registers
292 /* Load the UDMA bits according to type */ in via_do_set_mode()
296 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03; in via_do_set_mode()
299 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f; in via_do_set_mode()
302 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; in via_do_set_mode()
305 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; in via_do_set_mode()
309 /* Set UDMA unless device is not UDMA capable */ in via_do_set_mode()
[all …]
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| D | pata_serverworks.c | 20 * supports UDMA mode 2 (33 MB/s)
23 * all revisions support UDMA mode 4 (66 MB/s)
24 * revision A2.0 and up support UDMA mode 5 (100 MB/s)
50 * Seagate Barracuda ATA IV Family drives in UDMA mode 5
150 * specific rules. OSB4 requires no UDMA for disks due to a FIFO
177 /* Disk, UDMA */ in serverworks_csb_filter()
224 * Program the MWDMA/UDMA modes for the serverworks OSB4/CSB5
226 * while the chipset uses mode number for UDMA.
291 dev_info(&pdev->dev, "UDMA not BIOS enabled.\n"); in serverworks_fixup_osb4()
292 reg |= 0x00004000; /* enable UDMA/33 support */ in serverworks_fixup_osb4()
[all …]
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| D | pata_it821x.c | 60 * non UDMA devices restrict each others performance. It also has a
95 u16 udma[2]; /* Cached UDMA values (per drive) */ member
143 * it821x_program_udma - program the UDMA registers
148 * Program the UDMA timing for this drive according to the
150 * the errata on the 0x10 revision. The UDMA errata is partly handled
162 /* Program UDMA timing bits */ in it821x_program_udma()
229 * Reprogram the UDMA/PIO of the pair drive for the switch in it821x_clock_strategy()
232 if (pair && itdev->udma[1-unit] != UDMA_OFF) { in it821x_clock_strategy()
233 it821x_program_udma(ap, pair, itdev->udma[1-unit]); in it821x_clock_strategy()
237 * Reprogram the UDMA/PIO of our drive for the switch. in it821x_clock_strategy()
[all …]
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| D | pata_artop.c | 93 * matching PIO clocking for UDMA, as well as the MWDMA timings.
118 * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
119 * the event UDMA is used the later call to set_dmamode will set the
134 /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */ in artop6210_set_piomode()
172 * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
173 * the event UDMA is used the later call to set_dmamode will set the
187 /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */ in artop6260_set_piomode()
222 /* Add ultra DMA bits if in UDMA mode */ in artop6210_set_dmamode()
258 /* Add ultra DMA bits if in UDMA mode */ in artop6260_set_dmamode()
322 /* BIOS may have left us in UDMA, clear it before libata probe */ in atp8xx_fixup()
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| D | pata_rdc.c | 149 /* Ensure the UDMA bit is off - it will be turned back on if in rdc_set_piomode()
150 UDMA is selected */ in rdc_set_piomode()
164 * Set UDMA mode for device, in host controller PCI config space.
193 unsigned int udma = adev->dma_mode - XFER_UDMA_0; in rdc_set_dmamode() local
199 * UDMA is handled by a combination of clock switching and in rdc_set_dmamode()
205 u_speed = min(2 - (udma & 1), udma); in rdc_set_dmamode()
206 if (udma == 5) in rdc_set_dmamode()
208 else if (udma > 2) in rdc_set_dmamode()
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| D | pata_ali.c | 115 * fix that later on. Also ensure we do not do UDMA on WDC drives
163 * @ultra: UDMA timing or zero for off
165 * Loads the timing registers for cmd/data and disable UDMA if
166 * ultra is zero. If ultra is set then load and enable the UDMA
176 int udmat = 0x56 + ap->port_no; /* UDMA timing */ in ali_program_modes()
178 u8 udma; in ali_program_modes() local
192 /* Set up the UDMA enable */ in ali_program_modes()
193 pci_read_config_byte(pdev, udmat, &udma); in ali_program_modes()
194 udma &= ~(0x0F << shift); in ali_program_modes()
195 udma |= ultra << shift; in ali_program_modes()
[all …]
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| /kernel/linux/linux-5.10/drivers/ata/ |
| D | pata_amd.c | 77 if (speed == XFER_UDMA_5 && amd_clock <= 33333) at.udma = 1; in timing_setup()
78 if (speed == XFER_UDMA_6 && amd_clock <= 33333) at.udma = 15; in timing_setup()
99 t = at.udma ? (0xc0 | (clamp_val(at.udma, 2, 5) - 2)) : 0x03; in timing_setup()
103 t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 2, 10)]) : 0x03; in timing_setup()
107 t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 1, 10)]) : 0x03; in timing_setup()
111 t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 1, 15)]) : 0x03; in timing_setup()
118 /* UDMA timing */ in timing_setup()
119 if (at.udma) in timing_setup()
238 * Program the MWDMA/UDMA modes for the AMD and Nvidia
276 u32 saved_udma, udma; in nv_mode_filter() local
[all …]
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| D | pata_via.c | 13 * VIA VT82C586a - Added UDMA to 33Mhz
195 /* UDMA 66 chips have only drive side logic */ in via_cable_detect()
198 /* UDMA 100 or later */ in via_cable_detect()
236 * @udma_type: UDMA mode/format of registers
294 /* Load the UDMA bits according to type */ in via_do_set_mode()
298 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03; in via_do_set_mode()
301 ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f; in via_do_set_mode()
304 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; in via_do_set_mode()
307 ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07; in via_do_set_mode()
311 /* Set UDMA unless device is not UDMA capable */ in via_do_set_mode()
[all …]
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| D | pata_serverworks.c | 20 * supports UDMA mode 2 (33 MB/s)
23 * all revisions support UDMA mode 4 (66 MB/s)
24 * revision A2.0 and up support UDMA mode 5 (100 MB/s)
49 /* Seagate Barracuda ATA IV Family drives in UDMA mode 5
149 * specific rules. OSB4 requires no UDMA for disks due to a FIFO
175 /* Disk, UDMA */ in serverworks_csb_filter()
222 * Program the MWDMA/UDMA modes for the serverworks OSB4/CSB5
224 * while the chipset uses mode number for UDMA.
288 printk(KERN_DEBUG DRV_NAME ": UDMA not BIOS enabled.\n"); in serverworks_fixup_osb4()
289 reg |= 0x00004000; /* enable UDMA/33 support */ in serverworks_fixup_osb4()
[all …]
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| D | pata_it821x.c | 60 * non UDMA devices restrict each others performance. It also has a
95 u16 udma[2]; /* Cached UDMA values (per drive) */ member
143 * it821x_program_udma - program the UDMA registers
148 * Program the UDMA timing for this drive according to the
150 * the errata on the 0x10 revision. The UDMA errata is partly handled
162 /* Program UDMA timing bits */ in it821x_program_udma()
229 * Reprogram the UDMA/PIO of the pair drive for the switch in it821x_clock_strategy()
232 if (pair && itdev->udma[1-unit] != UDMA_OFF) { in it821x_clock_strategy()
233 it821x_program_udma(ap, pair, itdev->udma[1-unit]); in it821x_clock_strategy()
237 * Reprogram the UDMA/PIO of our drive for the switch. in it821x_clock_strategy()
[all …]
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| D | pata_artop.c | 93 * matching PIO clocking for UDMA, as well as the MWDMA timings.
118 * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
119 * the event UDMA is used the later call to set_dmamode will set the
134 /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */ in artop6210_set_piomode()
172 * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
173 * the event UDMA is used the later call to set_dmamode will set the
187 /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */ in artop6260_set_piomode()
222 /* Add ultra DMA bits if in UDMA mode */ in artop6210_set_dmamode()
258 /* Add ultra DMA bits if in UDMA mode */ in artop6260_set_dmamode()
319 /* BIOS may have left us in UDMA, clear it before libata probe */ in atp8xx_fixup()
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| D | pata_rdc.c | 149 /* Ensure the UDMA bit is off - it will be turned back on if in rdc_set_piomode()
150 UDMA is selected */ in rdc_set_piomode()
164 * Set UDMA mode for device, in host controller PCI config space.
193 unsigned int udma = adev->dma_mode - XFER_UDMA_0; in rdc_set_dmamode() local
199 * UDMA is handled by a combination of clock switching and in rdc_set_dmamode()
205 u_speed = min(2 - (udma & 1), udma); in rdc_set_dmamode()
206 if (udma == 5) in rdc_set_dmamode()
208 else if (udma > 2) in rdc_set_dmamode()
|
| D | pata_ali.c | 115 * fix that later on. Also ensure we do not do UDMA on WDC drives
163 * @ultra: UDMA timing or zero for off
165 * Loads the timing registers for cmd/data and disable UDMA if
166 * ultra is zero. If ultra is set then load and enable the UDMA
176 int udmat = 0x56 + ap->port_no; /* UDMA timing */ in ali_program_modes()
178 u8 udma; in ali_program_modes() local
192 /* Set up the UDMA enable */ in ali_program_modes()
193 pci_read_config_byte(pdev, udmat, &udma); in ali_program_modes()
194 udma &= ~(0x0F << shift); in ali_program_modes()
195 udma |= ultra << shift; in ali_program_modes()
[all …]
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| /kernel/linux/linux-5.10/drivers/ide/ |
| D | amd74xx.c | 62 case ATA_UDMA2: t = timing->udma ? (0xc0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break; in amd_set_speed()
63 …case ATA_UDMA4: t = timing->udma ? (0xc0 | amd_cyc2udma[clamp_val(timing->udma, 2, 10)]) : 0x03; b… in amd_set_speed()
64 …case ATA_UDMA5: t = timing->udma ? (0xc0 | amd_cyc2udma[clamp_val(timing->udma, 1, 10)]) : 0x03; b… in amd_set_speed()
65 …case ATA_UDMA6: t = timing->udma ? (0xc0 | amd_cyc2udma[clamp_val(timing->udma, 1, 15)]) : 0x03; b… in amd_set_speed()
69 if (timing->udma) in amd_set_speed()
97 if (speed == XFER_UDMA_5 && amd_clock <= 33333) t.udma = 1; in amd_set_drive()
98 if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15; in amd_set_drive()
151 ; /* no UDMA > 2 */ in init_chipset_amd74xx()
196 #define DECLARE_AMD_DEV(swdma, udma) \ argument
206 .udma_mask = udma, \
[all …]
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| D | it821x.c | 49 * non UDMA devices restrict each others performance. It also has a
57 * - ATAPI UDMA is ok but not MWDMA it seems
83 u16 udma[2]; /* Cached UDMA values (per drive) */ member
130 * it821x_program_udma - program the UDMA registers
134 * Program the UDMA timing for this drive according to the
146 /* Program UDMA timing bits */ in it821x_program_udma()
213 * Reprogram the UDMA/PIO of the pair drive for the switch in it821x_clock_strategy()
216 if(pair && itdev->udma[1-unit] != UDMA_OFF) { in it821x_clock_strategy()
217 it821x_program_udma(pair, itdev->udma[1-unit]); in it821x_clock_strategy()
221 * Reprogram the UDMA/PIO of our drive for the switch. in it821x_clock_strategy()
[all …]
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| D | via82cxxx.c | 141 case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break; in via_set_speed()
142 case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break; in via_set_speed()
143 case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break; in via_set_speed()
144 case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break; in via_set_speed()
147 /* Set UDMA unless device is not UDMA capable */ in via_set_speed()
156 if (timing->udma) { in via_set_speed()
252 * UDMA w/ < 3T/cycle in via_cable_detect()
264 * UDMA w/ < 60ns/cycle in via_cable_detect()
276 * UDMA w/ < 60ns/cycle in via_cable_detect()
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| D | ide-xfer-mode.c | 11 { "UDMA/16", "UDMA/25", "UDMA/33", "UDMA/44",
12 "UDMA/66", "UDMA/100", "UDMA/133", "UDMA7" };
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/ata/ |
| D | pata-arasan.txt | 21 - arasan,broken-udma: if present, UDMA mode is unusable
25 required unless both UDMA and MWDMA mode are broken
|