| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dcn_calc_auto.c | 40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument 43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation() 44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation() 45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation() 46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation() 47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation() 50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation() 51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation() 55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation() 56 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| D | dcn_calc_auto.c | 40 void scaler_settings_calculation(struct dcn_bw_internal_vars *v) in scaler_settings_calculation() argument 43 for (k = 0; k <= v->number_of_active_planes - 1; k++) { in scaler_settings_calculation() 44 if (v->allow_different_hratio_vratio == dcn_bw_yes) { in scaler_settings_calculation() 45 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation() 46 v->h_ratio[k] = v->viewport_width[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation() 47 v->v_ratio[k] = v->viewport_height[k] / v->scaler_recout_height[k]; in scaler_settings_calculation() 50 v->h_ratio[k] = v->viewport_height[k] / v->scaler_rec_out_width[k]; in scaler_settings_calculation() 51 v->v_ratio[k] = v->viewport_width[k] / v->scaler_recout_height[k]; in scaler_settings_calculation() 55 if (v->source_scan[k] == dcn_bw_hor) { in scaler_settings_calculation() 56 …v->h_ratio[k] =dcn_bw_max2(v->viewport_width[k] / v->scaler_rec_out_width[k], v->viewport_height[k… in scaler_settings_calculation() [all …]
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| /kernel/linux/linux-5.10/include/asm-generic/ |
| D | atomic-long.h | 27 atomic_long_read(const atomic_long_t *v) in atomic_long_read() argument 29 return atomic64_read(v); in atomic_long_read() 33 atomic_long_read_acquire(const atomic_long_t *v) in atomic_long_read_acquire() argument 35 return atomic64_read_acquire(v); in atomic_long_read_acquire() 39 atomic_long_set(atomic_long_t *v, long i) in atomic_long_set() argument 41 atomic64_set(v, i); in atomic_long_set() 45 atomic_long_set_release(atomic_long_t *v, long i) in atomic_long_set_release() argument 47 atomic64_set_release(v, i); in atomic_long_set_release() 51 atomic_long_add(long i, atomic_long_t *v) in atomic_long_add() argument 53 atomic64_add(i, v); in atomic_long_add() [all …]
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| D | atomic-instrumented.h | 25 atomic_read(const atomic_t *v) in atomic_read() argument 27 instrument_atomic_read(v, sizeof(*v)); in atomic_read() 28 return arch_atomic_read(v); in atomic_read() 34 atomic_read_acquire(const atomic_t *v) in atomic_read_acquire() argument 36 instrument_atomic_read(v, sizeof(*v)); in atomic_read_acquire() 37 return arch_atomic_read_acquire(v); in atomic_read_acquire() 43 atomic_set(atomic_t *v, int i) in atomic_set() argument 45 instrument_atomic_write(v, sizeof(*v)); in atomic_set() 46 arch_atomic_set(v, i); in atomic_set() 52 atomic_set_release(atomic_t *v, int i) in atomic_set_release() argument [all …]
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| /kernel/linux/linux-6.6/include/linux/atomic/ |
| D | atomic-instrumented.h | 21 * @v: pointer to atomic_t 23 * Atomically loads the value of @v with relaxed ordering. 27 * Return: The value loaded from @v. 30 atomic_read(const atomic_t *v) in atomic_read() argument 32 instrument_atomic_read(v, sizeof(*v)); in atomic_read() 33 return raw_atomic_read(v); in atomic_read() 38 * @v: pointer to atomic_t 40 * Atomically loads the value of @v with acquire ordering. 44 * Return: The value loaded from @v. 47 atomic_read_acquire(const atomic_t *v) in atomic_read_acquire() argument [all …]
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| D | atomic-long.h | 26 * @v: pointer to atomic_long_t 28 * Atomically loads the value of @v with relaxed ordering. 32 * Return: The value loaded from @v. 35 raw_atomic_long_read(const atomic_long_t *v) in raw_atomic_long_read() argument 38 return raw_atomic64_read(v); in raw_atomic_long_read() 40 return raw_atomic_read(v); in raw_atomic_long_read() 46 * @v: pointer to atomic_long_t 48 * Atomically loads the value of @v with acquire ordering. 52 * Return: The value loaded from @v. 55 raw_atomic_long_read_acquire(const atomic_long_t *v) in raw_atomic_long_read_acquire() argument [all …]
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| D | atomic-arch-fallback.h | 433 * @v: pointer to atomic_t 435 * Atomically loads the value of @v with relaxed ordering. 439 * Return: The value loaded from @v. 442 raw_atomic_read(const atomic_t *v) in raw_atomic_read() argument 444 return arch_atomic_read(v); in raw_atomic_read() 449 * @v: pointer to atomic_t 451 * Atomically loads the value of @v with acquire ordering. 455 * Return: The value loaded from @v. 458 raw_atomic_read_acquire(const atomic_t *v) in raw_atomic_read_acquire() argument 461 return arch_atomic_read_acquire(v); in raw_atomic_read_acquire() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_mode_vba_30.c | 397 struct vba_vars_st *v, 1855 struct vba_vars_st *v = &mode_lib->vba; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local 1858 unsigned int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1865 v->WritebackDISPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1866 v->DISPCLKWithRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1867 v->DISPCLKWithoutRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1868 v->GlobalDPPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1870 v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] = dml_min3( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1871 v->ReturnBusWidth * v->DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1872 v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * v->DRAMChannelWidth, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| D | display_mode_vba_30.c | 1924 struct vba_vars_st *v = &mode_lib->vba; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() local 1927 unsigned int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb]; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1934 v->WritebackDISPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1935 v->DISPCLKWithRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1936 v->DISPCLKWithoutRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1937 v->GlobalDPPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1939 v->IdealSDPPortBandwidthPerState[v->VoltageLevel][v->maxMpcComb] = dml_min3( in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1940 v->ReturnBusWidth * v->DCFCLK, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1941 v->DRAMSpeedPerState[v->VoltageLevel] * v->NumberOfChannels * v->DRAMChannelWidth, in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() 1942 v->FabricClockPerState[v->VoltageLevel] * v->FabricDatapathToDCNDataReturn); in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| D | display_mode_vba_31.c | 1746 struct vba_vars_st *v = &mode_lib->vba; local 1754 if (!v->IgnoreViewportPositioning) { 1782 dml_print("DML::%s: IgnoreViewportPositioning = %d\n", __func__, v->IgnoreViewportPositioning); 1828 struct vba_vars_st *v = &mode_lib->vba; local 1863 MPDEBytesFrame = 128 * (v->GPUVMMaxPageTableLevels - 1); 1884 if (GPUVMEnable == true && v->GPUVMMaxPageTableLevels > 1) { 1898 ExtraDPDEBytesFrame = 128 * (v->GPUVMMaxPageTableLevels - 2); 2000 struct vba_vars_st *v = &mode_lib->vba; local 2007 int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb]; 2009 v->WritebackDISPCLK = 0.0; [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| D | display_mode_vba_314.c | 1766 struct vba_vars_st *v = &mode_lib->vba; local 1774 if (!v->IgnoreViewportPositioning) { 1802 dml_print("DML::%s: IgnoreViewportPositioning = %d\n", __func__, v->IgnoreViewportPositioning); 1848 struct vba_vars_st *v = &mode_lib->vba; local 1883 MPDEBytesFrame = 128 * (v->GPUVMMaxPageTableLevels - 1); 1904 if (GPUVMEnable == true && v->GPUVMMaxPageTableLevels > 1) { 1918 ExtraDPDEBytesFrame = 128 * (v->GPUVMMaxPageTableLevels - 2); 2020 struct vba_vars_st *v = &mode_lib->vba; local 2027 int PrefetchMode = v->PrefetchModePerState[v->VoltageLevel][v->maxMpcComb]; 2029 v->WritebackDISPCLK = 0.0; [all …]
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| /kernel/linux/linux-6.6/drivers/media/platform/nxp/ |
| D | imx-pxp.h | 19 #define BF_PXP_CTRL_SFTRST(v) \ argument 20 (((v) << 31) & BM_PXP_CTRL_SFTRST) 22 #define BF_PXP_CTRL_CLKGATE(v) \ argument 23 (((v) << 30) & BM_PXP_CTRL_CLKGATE) 25 #define BF_PXP_CTRL_RSVD4(v) \ argument 26 (((v) << 29) & BM_PXP_CTRL_RSVD4) 28 #define BF_PXP_CTRL_EN_REPEAT(v) \ argument 29 (((v) << 28) & BM_PXP_CTRL_EN_REPEAT) 31 #define BF_PXP_CTRL_ENABLE_ROTATE1(v) \ argument 32 (((v) << 27) & BM_PXP_CTRL_ENABLE_ROTATE1) [all …]
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| /kernel/linux/linux-5.10/drivers/media/platform/ |
| D | imx-pxp.h | 19 #define BF_PXP_CTRL_SFTRST(v) \ argument 20 (((v) << 31) & BM_PXP_CTRL_SFTRST) 22 #define BF_PXP_CTRL_CLKGATE(v) \ argument 23 (((v) << 30) & BM_PXP_CTRL_CLKGATE) 25 #define BF_PXP_CTRL_RSVD4(v) \ argument 26 (((v) << 29) & BM_PXP_CTRL_RSVD4) 28 #define BF_PXP_CTRL_EN_REPEAT(v) \ argument 29 (((v) << 28) & BM_PXP_CTRL_EN_REPEAT) 31 #define BF_PXP_CTRL_ENABLE_ROTATE1(v) \ argument 32 (((v) << 27) & BM_PXP_CTRL_ENABLE_ROTATE1) [all …]
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| /kernel/linux/linux-6.6/sound/soc/qcom/ |
| D | lpass-lpaif-reg.h | 11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument 12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port)) 14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument 68 #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ argument 69 (v->irq_reg_base + (addr) + v->irq_reg_stride * (port)) 73 #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) argument 74 #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) argument 75 #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, (port)) argument 78 #define LPAIF_RXTX_IRQ_REG_ADDR(v, addr, port) \ argument 79 (v->rxtx_irq_reg_base + (addr) + v->rxtx_irq_reg_stride * (port)) [all …]
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| /kernel/linux/linux-5.10/arch/x86/lib/ |
| D | atomic64_386_32.S | 27 IRQ_SAVE v; 32 IRQ_RESTORE v; \ 35 #define v %ecx macro 37 movl (v), %eax 38 movl 4(v), %edx 41 #undef v 43 #define v %esi macro 45 movl %ebx, (v) 46 movl %ecx, 4(v) 49 #undef v [all …]
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| /kernel/linux/linux-6.6/arch/x86/lib/ |
| D | atomic64_386_32.S | 27 IRQ_SAVE v; 32 IRQ_RESTORE v; \ 35 #define v %ecx macro 37 movl (v), %eax 38 movl 4(v), %edx 41 #undef v 43 #define v %esi macro 45 movl %ebx, (v) 46 movl %ecx, 4(v) 49 #undef v [all …]
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| /kernel/linux/linux-6.6/drivers/media/platform/verisilicon/ |
| D | rockchip_vpu2_hw_h264_dec.c | 28 #define VDPU_REG_DEC_E(v) ((v) ? BIT(0) : 0) argument 30 #define VDPU_REG_DEC_ADV_PRE_DIS(v) ((v) ? BIT(11) : 0) argument 31 #define VDPU_REG_DEC_SCMD_DIS(v) ((v) ? BIT(10) : 0) argument 32 #define VDPU_REG_FILTERING_DIS(v) ((v) ? BIT(8) : 0) argument 33 #define VDPU_REG_PIC_FIXED_QUANT(v) ((v) ? BIT(7) : 0) argument 34 #define VDPU_REG_DEC_LATENCY(v) (((v) << 1) & GENMASK(6, 1)) argument 36 #define VDPU_REG_INIT_QP(v) (((v) << 25) & GENMASK(30, 25)) argument 37 #define VDPU_REG_STREAM_LEN(v) (((v) << 0) & GENMASK(23, 0)) argument 39 #define VDPU_REG_APF_THRESHOLD(v) (((v) << 17) & GENMASK(30, 17)) argument 40 #define VDPU_REG_STARTMB_X(v) (((v) << 8) & GENMASK(16, 8)) argument [all …]
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| /kernel/linux/linux-5.10/include/linux/ |
| D | atomic-arch-fallback.h | 82 arch_atomic_read_acquire(const atomic_t *v) in arch_atomic_read_acquire() argument 84 return smp_load_acquire(&(v)->counter); in arch_atomic_read_acquire() 91 arch_atomic_set_release(atomic_t *v, int i) in arch_atomic_set_release() argument 93 smp_store_release(&(v)->counter, i); in arch_atomic_set_release() 106 arch_atomic_add_return_acquire(int i, atomic_t *v) in arch_atomic_add_return_acquire() argument 108 int ret = arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return_acquire() 117 arch_atomic_add_return_release(int i, atomic_t *v) in arch_atomic_add_return_release() argument 120 return arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return_release() 127 arch_atomic_add_return(int i, atomic_t *v) in arch_atomic_add_return() argument 131 ret = arch_atomic_add_return_relaxed(i, v); in arch_atomic_add_return() [all …]
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| D | atomic-fallback.h | 85 atomic_read_acquire(const atomic_t *v) in atomic_read_acquire() argument 87 return smp_load_acquire(&(v)->counter); in atomic_read_acquire() 97 atomic_set_release(atomic_t *v, int i) in atomic_set_release() argument 99 smp_store_release(&(v)->counter, i); in atomic_set_release() 119 atomic_add_return_acquire(int i, atomic_t *v) in atomic_add_return_acquire() argument 121 int ret = atomic_add_return_relaxed(i, v); in atomic_add_return_acquire() 130 atomic_add_return_release(int i, atomic_t *v) in atomic_add_return_release() argument 133 return atomic_add_return_relaxed(i, v); in atomic_add_return_release() 140 atomic_add_return(int i, atomic_t *v) in atomic_add_return() argument 144 ret = atomic_add_return_relaxed(i, v); in atomic_add_return() [all …]
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| /kernel/linux/linux-6.6/arch/sh/mm/ |
| D | flush-sh4.c | 16 reg_size_t aligned_start, v, cnt, end; in sh4__flush_wback_region() local 19 v = aligned_start & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region() 22 cnt = (end - v) / L1_CACHE_BYTES; in sh4__flush_wback_region() 25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 28 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 29 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 30 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 31 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() [all …]
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| /kernel/linux/linux-5.10/arch/sh/mm/ |
| D | flush-sh4.c | 16 reg_size_t aligned_start, v, cnt, end; in sh4__flush_wback_region() local 19 v = aligned_start & ~(L1_CACHE_BYTES-1); in sh4__flush_wback_region() 22 cnt = (end - v) / L1_CACHE_BYTES; in sh4__flush_wback_region() 25 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 26 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 27 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 28 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 29 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 30 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() 31 __ocbwb(v); v += L1_CACHE_BYTES; in sh4__flush_wback_region() [all …]
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| /kernel/linux/linux-6.6/drivers/staging/media/sunxi/sun6i-isp/ |
| D | sun6i_isp_reg.h | 21 #define SUN6I_ISP_FE_CFG_SRC0_MODE(v) (((v) << 8) & GENMASK(9, 8)) argument 22 #define SUN6I_ISP_FE_CFG_SRC1_MODE(v) (((v) << 16) & GENMASK(17, 16)) argument 33 #define SUN6I_ISP_FE_CTRL_OUTPUT_SPEED_CTRL(v) (((v) << 16) & GENMASK(17, 16)) argument 104 #define SUN6I_ISP_MODE_INPUT_FMT(v) ((v) & GENMASK(2, 0)) argument 105 #define SUN6I_ISP_MODE_INPUT_YUV_SEQ(v) (((v) << 3) & GENMASK(4, 3)) argument 106 #define SUN6I_ISP_MODE_OTF_DPC(v) (((v) << 16) & BIT(16)) argument 107 #define SUN6I_ISP_MODE_SHARP(v) (((v) << 17) & BIT(17)) argument 108 #define SUN6I_ISP_MODE_HIST(v) (((v) << 20) & GENMASK(21, 20)) argument 123 #define SUN6I_ISP_IN_CFG_STRIDE_DIV16(v) ((v) & GENMASK(10, 0)) argument 133 #define SUN6I_ISP_AE_CFG_LOW_BRI_TH(v) ((v) & GENMASK(11, 0)) argument [all …]
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| /kernel/linux/linux-5.10/tools/memory-model/ |
| D | linux-kernel.def | 10 WRITE_ONCE(X,V) { __store{once}(X,V); } 13 smp_store_release(X,V) { __store{release}(*X,V); } 15 rcu_assign_pointer(X,V) { __store{release}(X,V); } 17 smp_store_mb(X,V) { __store{once}(X,V); __fence{mb}; } 30 xchg(X,V) __xchg{mb}(X,V) 31 xchg_relaxed(X,V) __xchg{once}(X,V) 32 xchg_release(X,V) __xchg{release}(X,V) 33 xchg_acquire(X,V) __xchg{acquire}(X,V) 34 cmpxchg(X,V,W) __cmpxchg{mb}(X,V,W) 35 cmpxchg_relaxed(X,V,W) __cmpxchg{once}(X,V,W) [all …]
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| /kernel/linux/linux-5.10/arch/ia64/include/asm/ |
| D | atomic.h | 24 #define atomic_read(v) READ_ONCE((v)->counter) argument 25 #define atomic64_read(v) READ_ONCE((v)->counter) argument 27 #define atomic_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument 28 #define atomic64_set(v,i) WRITE_ONCE(((v)->counter), (i)) argument 32 ia64_atomic_##op (int i, atomic_t *v) \ 38 CMPXCHG_BUGCHECK(v); \ 39 old = atomic_read(v); \ 41 } while (ia64_cmpxchg(acq, v, old, new, sizeof(atomic_t)) != old); \ 47 ia64_atomic_fetch_##op (int i, atomic_t *v) \ 53 CMPXCHG_BUGCHECK(v); \ [all …]
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| /kernel/linux/linux-5.10/sound/soc/qcom/ |
| D | lpass-lpaif-reg.h | 11 #define LPAIF_I2SCTL_REG_ADDR(v, addr, port) \ argument 12 (v->i2sctrl_reg_base + (addr) + v->i2sctrl_reg_stride * (port)) 14 #define LPAIF_I2SCTL_REG(v, port) LPAIF_I2SCTL_REG_ADDR(v, 0x0, (port)) argument 68 #define LPAIF_IRQ_REG_ADDR(v, addr, port) \ argument 69 (v->irq_reg_base + (addr) + v->irq_reg_stride * (port)) 73 #define LPAIF_IRQEN_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x0, (port)) argument 74 #define LPAIF_IRQSTAT_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0x4, (port)) argument 75 #define LPAIF_IRQCLEAR_REG(v, port) LPAIF_IRQ_REG_ADDR(v, 0xC, (port)) argument 78 #define LPASS_HDMITX_APP_IRQ_REG_ADDR(v, addr) \ argument 79 ((v->hdmi_irq_reg_base) + (addr)) [all …]
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