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/kernel/linux/linux-5.10/drivers/input/rmi4/
Drmi_f34v7.c28 f34->fn->fd.data_base_addr + f34->v7.off.flash_status, in rmi_f34v7_read_flash_status()
37 f34->v7.in_bl_mode = status >> 7; in rmi_f34v7_read_flash_status()
38 f34->v7.flash_status = status & 0x1f; in rmi_f34v7_read_flash_status()
40 if (f34->v7.flash_status != 0x00) { in rmi_f34v7_read_flash_status()
42 __func__, f34->v7.flash_status, f34->v7.command); in rmi_f34v7_read_flash_status()
46 f34->fn->fd.data_base_addr + f34->v7.off.flash_cmd, in rmi_f34v7_read_flash_status()
55 f34->v7.command = command; in rmi_f34v7_read_flash_status()
66 if (!wait_for_completion_timeout(&f34->v7.cmd_done, timeout)) { in rmi_f34v7_wait_for_idle()
125 base + f34->v7.off.partition_id, in rmi_f34v7_write_command_single_transaction()
174 f34->v7.command = command; in rmi_f34v7_write_command()
[all …]
/kernel/linux/linux-6.6/drivers/input/rmi4/
Drmi_f34v7.c37 f34->v7.in_bl_mode = status >> 7; in rmi_f34v7_read_flash_status()
38 f34->v7.flash_status = status & 0x1f; in rmi_f34v7_read_flash_status()
40 if (f34->v7.flash_status != 0x00) { in rmi_f34v7_read_flash_status()
42 __func__, f34->v7.flash_status, f34->v7.command); in rmi_f34v7_read_flash_status()
55 f34->v7.command = command; in rmi_f34v7_read_flash_status()
66 if (!wait_for_completion_timeout(&f34->v7.cmd_done, timeout)) { in rmi_f34v7_wait_for_idle()
87 if (f34->v7.flash_status != 0x00) in rmi_f34v7_check_command_status()
192 f34->v7.command = command; in rmi_f34v7_write_command()
241 if (f34->v7.config_area == v7_UI_CONFIG_AREA) in rmi_f34v7_write_partition_id()
243 else if (f34->v7.config_area == v7_DP_CONFIG_AREA) in rmi_f34v7_write_partition_id()
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/s5p-mfc/
Ds5p_mfc_opr.h42 void __iomem *dis_shared_mem_addr;/* only v7 */
64 void __iomem *d_min_num_dis;/* only v7 */
65 void __iomem *d_min_first_dis_size;/* only v7 */
66 void __iomem *d_min_second_dis_size;/* only v7 */
67 void __iomem *d_min_third_dis_size;/* only v7 */
68 void __iomem *d_post_filter_luma_dpb0;/* v7 and v8 */
69 void __iomem *d_post_filter_luma_dpb1;/* v7 and v8 */
70 void __iomem *d_post_filter_luma_dpb2;/* only v7 */
71 void __iomem *d_post_filter_chroma_dpb0;/* v7 and v8 */
72 void __iomem *d_post_filter_chroma_dpb1;/* v7 and v8 */
[all …]
/kernel/linux/linux-6.6/drivers/media/platform/samsung/s5p-mfc/
Ds5p_mfc_opr.h42 void __iomem *dis_shared_mem_addr;/* only v7 */
64 void __iomem *d_min_num_dis;/* only v7 */
65 void __iomem *d_min_first_dis_size;/* only v7 */
66 void __iomem *d_min_second_dis_size;/* only v7 */
67 void __iomem *d_min_third_dis_size;/* only v7 */
68 void __iomem *d_post_filter_luma_dpb0;/* v7 and v8 */
69 void __iomem *d_post_filter_luma_dpb1;/* v7 and v8 */
70 void __iomem *d_post_filter_luma_dpb2;/* only v7 */
71 void __iomem *d_post_filter_chroma_dpb0;/* v7 and v8 */
72 void __iomem *d_post_filter_chroma_dpb1;/* v7 and v8 */
[all …]
/kernel/linux/linux-6.6/arch/arm64/crypto/
Dcrct10dif-ce-core.S282 CPU_LE( rev64 v7.16b, v7.16b )
290 CPU_LE( ext v7.16b, v7.16b, v7.16b, #8 )
305 // While >= 128 data bytes remain (not counting v0-v7), fold the 128
306 // bytes v0-v7 into them, storing the result back into v0-v7.
311 fold_32_bytes \p, v6, v7
316 // Now fold the 112 bytes in v0-v6 into the 16 bytes in v7.
325 fold_16_bytes \p, v3, v7, 1
328 fold_16_bytes \p, v5, v7, 1
330 fold_16_bytes \p, v6, v7
333 // (not counting v7), following the previous extra subtraction by 128.
[all …]
Daes-neonbs-core.S385 ld1 {v7.4s}, [x1], #16 // load round 0 key
402 tbl v7.16b ,{v17.16b}, v16.16b
405 cmtst v0.16b, v7.16b, v8.16b
406 cmtst v1.16b, v7.16b, v9.16b
407 cmtst v2.16b, v7.16b, v10.16b
408 cmtst v3.16b, v7.16b, v11.16b
409 cmtst v4.16b, v7.16b, v12.16b
410 cmtst v5.16b, v7.16b, v13.16b
411 cmtst v6.16b, v7.16b, v14.16b
412 cmtst v7.16b, v7.16b, v15.16b
[all …]
Dsm4-neon-core.S274 ld4 {v4.4s-v7.4s}, [x2], #64
276 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7)
279 st1 {v4.16b-v7.16b}, [x1], #64
341 ld4 {v4.4s-v7.4s}, [x2]
343 SM4_CRYPT_BLK8_norotate(v0, v1, v2, v3, v4, v5, v6, v7)
347 rotate_clockwise_4x4(v4, v5, v6, v7)
362 eor v7.16b, v7.16b, RTMP6.16b
367 st1 {v4.16b-v7.16b}, [x1], #64
384 rev32 v7.16b, v3.16b
386 transpose_4x4(v4, v5, v6, v7)
[all …]
Dsm4-ce-core.S68 sm4ekey v7.4s, v6.4s, v31.4s;
74 st1 {v4.16b-v7.16b}, [x1];
76 tbl v16.16b, {v7.16b}, v24.16b
122 ld1 {v4.16b-v7.16b}, [x2], #64;
124 SM4_CRYPT_BLK8(v0, v1, v2, v3, v4, v5, v6, v7);
127 st1 {v4.16b-v7.16b}, [x1], #64;
231 ld1 {v4.16b-v7.16b}, [x2], #64
240 rev32 v15.16b, v7.16b
256 mov RIV.16b, v7.16b
485 ld1 {v4.16b-v7.16b}, [x2], #64
[all …]
Dchacha-neon-core.S124 ld1 {v4.16b-v7.16b}, [x2]
140 eor v3.16b, v3.16b, v7.16b
216 ld4r { v4.4s- v7.4s}, [x8], #16
227 mov a7, v7.s[0]
251 add v3.4s, v3.4s, v7.4s
291 eor v19.16b, v7.16b, v11.16b
297 shl v7.4s, v19.4s, #12
305 sri v7.4s, v19.4s, #20
318 add v3.4s, v3.4s, v7.4s
358 eor v19.16b, v7.16b, v11.16b
[all …]
/kernel/linux/linux-5.10/arch/arm64/crypto/
Dcrct10dif-ce-core.S282 CPU_LE( rev64 v7.16b, v7.16b )
290 CPU_LE( ext v7.16b, v7.16b, v7.16b, #8 )
305 // While >= 128 data bytes remain (not counting v0-v7), fold the 128
306 // bytes v0-v7 into them, storing the result back into v0-v7.
311 fold_32_bytes \p, v6, v7
316 // Now fold the 112 bytes in v0-v6 into the 16 bytes in v7.
325 fold_16_bytes \p, v3, v7, 1
328 fold_16_bytes \p, v5, v7, 1
330 fold_16_bytes \p, v6, v7
333 // (not counting v7), following the previous extra subtraction by 128.
[all …]
Daes-neonbs-core.S384 ld1 {v7.4s}, [x1], #16 // load round 0 key
401 tbl v7.16b ,{v17.16b}, v16.16b
404 cmtst v0.16b, v7.16b, v8.16b
405 cmtst v1.16b, v7.16b, v9.16b
406 cmtst v2.16b, v7.16b, v10.16b
407 cmtst v3.16b, v7.16b, v11.16b
408 cmtst v4.16b, v7.16b, v12.16b
409 cmtst v5.16b, v7.16b, v13.16b
410 cmtst v6.16b, v7.16b, v14.16b
411 cmtst v7.16b, v7.16b, v15.16b
[all …]
Dchacha-neon-core.S124 ld1 {v4.16b-v7.16b}, [x2]
140 eor v3.16b, v3.16b, v7.16b
217 ld4r { v4.4s- v7.4s}, [x8], #16
228 mov a7, v7.s[0]
252 add v3.4s, v3.4s, v7.4s
292 eor v19.16b, v7.16b, v11.16b
298 shl v7.4s, v19.4s, #12
306 sri v7.4s, v19.4s, #20
319 add v3.4s, v3.4s, v7.4s
359 eor v19.16b, v7.16b, v11.16b
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h105 f5, v5, f6, v6, f7, v7) \ argument
113 FN(reg, f7), v7)
116 f5, v5, f6, v6, f7, v7, f8, v8) \ argument
124 FN(reg, f7), v7,\
128 v5, f6, v6, f7, v7, f8, v8, f9, v9) \ argument
136 FN(reg, f7), v7, \
141 v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10) \ argument
149 FN(reg, f7), v7, \
195 #define REG_GET_7(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \ argument
203 FN(reg_name, f7), v7)
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/
Dreg_helper.h105 f5, v5, f6, v6, f7, v7) \ argument
113 FN(reg, f7), v7)
116 f5, v5, f6, v6, f7, v7, f8, v8) \ argument
124 FN(reg, f7), v7,\
128 v5, f6, v6, f7, v7, f8, v8, f9, v9) \ argument
136 FN(reg, f7), v7, \
141 v5, f6, v6, f7, v7, f8, v8, f9, v9, f10, v10) \ argument
149 FN(reg, f7), v7, \
195 #define REG_GET_7(reg_name, f1, v1, f2, v2, f3, v3, f4, v4, f5, v5, f6, v6, f7, v7) \ argument
203 FN(reg_name, f7), v7)
[all …]
/kernel/linux/linux-5.10/arch/powerpc/crypto/
Dcrc32-vpmsum_core.S159 /* zero v0-v7 which will contain our checksums */
167 vxor v7,v7,v7
302 vxor v7,v7,v15
344 vxor v7,v7,v15
357 vxor v7,v7,v15
373 vsldoi v7,v7,zeroes,4
403 vxor v23,v7,v15
432 lvx v7,off112,r3
442 VPMSUMW(v7,v23,v7)
500 vxor v6,v6,v7
[all …]
/kernel/linux/linux-6.6/arch/powerpc/crypto/
Dcrc32-vpmsum_core.S156 /* zero v0-v7 which will contain our checksums */
164 vxor v7,v7,v7
299 vxor v7,v7,v15
341 vxor v7,v7,v15
354 vxor v7,v7,v15
370 vsldoi v7,v7,zeroes,4
400 vxor v23,v7,v15
429 lvx v7,off112,r3
439 VPMSUMW(v7,v23,v7)
497 vxor v6,v6,v7
[all …]
/kernel/linux/linux-5.10/arch/arm/mm/
DMakefile14 obj-$(CONFIG_ARM_MPU) += pmsa-v7.o pmsa-v8.o
42 obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
48 obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o
54 AFLAGS_cache-v7.o :=-Wa,-march=armv7-a
73 obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o
77 AFLAGS_tlb-v7.o :=-Wa,-march=armv7-a
102 obj-$(CONFIG_CPU_V7) += proc-v7.o proc-v7-bugs.o
106 AFLAGS_proc-v7.o :=-Wa,-march=armv7-a
Dcache-tauros2.c32 * When Tauros2 is used on a CPU that supports the v7 hierarchical
33 * cache operations, the cache handling code in proc-v7.S takes care
37 * being used on a pre-v7 CPU, and we only need to build support for
39 * configured to support a pre-v7 CPU.
239 * Check whether this CPU has support for the v7 hierarchical in tauros2_internal_init()
240 * cache ops. (PJ4 is in its v7 personality mode if the MMFR3 in tauros2_internal_init()
241 * register indicates support for the v7 hierarchical cache in tauros2_internal_init()
245 * implement the v7 cache ops but are only ARMv6 CPUs (due to in tauros2_internal_init()
/kernel/linux/linux-6.6/arch/arm64/boot/dts/marvell/
Darmada-3720-espressobin-v7-emmc.dts3 * Device Tree file for Globalscale Marvell ESPRESSOBin Board V7 with eMMC
19 model = "Globalscale Marvell ESPRESSOBin Board V7 (eMMC)";
20 compatible = "globalscale,espressobin-v7-emmc", "globalscale,espressobin-v7",
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/marvell/
Darmada-37xx.yaml33 - globalscale,espressobin-v7
38 - description: Globalscale Espressobin V7 boards
41 - globalscale,espressobin-v7-emmc
42 - const: globalscale,espressobin-v7
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Dbrcm,brcmnand.yaml51 - brcm,brcmnand-v7.0
52 - brcm,brcmnand-v7.1
53 - brcm,brcmnand-v7.2
54 - brcm,brcmnand-v7.3
60 - brcm,brcmnand-v7.0
61 - brcm,brcmnand-v7.1
110 v7.0. Use this property to describe the rare
197 compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand";
/kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/
Darmada-3720-espressobin-v7-emmc.dts3 * Device Tree file for Globalscale Marvell ESPRESSOBin Board V7 with eMMC
19 model = "Globalscale Marvell ESPRESSOBin Board V7 (eMMC)";
20 compatible = "globalscale,espressobin-v7-emmc", "globalscale,espressobin-v7",
/kernel/linux/linux-6.6/arch/arm/mm/
Dcache-tauros2.c29 * When Tauros2 is used on a CPU that supports the v7 hierarchical
30 * cache operations, the cache handling code in proc-v7.S takes care
34 * being used on a pre-v7 CPU, and we only need to build support for
36 * configured to support a pre-v7 CPU.
236 * Check whether this CPU has support for the v7 hierarchical in tauros2_internal_init()
237 * cache ops. (PJ4 is in its v7 personality mode if the MMFR3 in tauros2_internal_init()
238 * register indicates support for the v7 hierarchical cache in tauros2_internal_init()
242 * implement the v7 cache ops but are only ARMv6 CPUs (due to in tauros2_internal_init()
DMakefile14 obj-$(CONFIG_ARM_MPU) += pmsa-v7.o pmsa-v8.o
38 obj-$(CONFIG_CPU_PABRT_V7) += pabort-v7.o
44 obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o
63 obj-$(CONFIG_CPU_TLB_V7) += tlb-v7.o
89 obj-$(CONFIG_CPU_V7) += proc-v7.o proc-v7-bugs.o
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dbrcm,brcmnand.txt21 string, like "brcm,brcmnand-v7.0"
30 brcm,brcmnand-v7.0
31 brcm,brcmnand-v7.1
32 brcm,brcmnand-v7.2
33 brcm,brcmnand-v7.3
56 v7.0. Use this property to describe the rare
132 compatible = "brcm,brcmnand-v7.0", "brcm,brcmnand";

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