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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/powerpc/
Dibm,vas.txt1 * IBM Powerpc Virtual Accelerator Switchboard (VAS)
3 VAS is a hardware mechanism that allows kernel subsystems and user processes
8 - compatible : should be "ibm,vas".
9 - ibm,vas-id : A unique identifier for each instance of VAS in the system
17 vas@6019100000000 {
18 compatible = "ibm,vas", "ibm,power9-vas";
20 name = "vas";
21 ibm,vas-id = <0x1>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/powerpc/
Dibm,vas.txt1 * IBM Powerpc Virtual Accelerator Switchboard (VAS)
3 VAS is a hardware mechanism that allows kernel subsystems and user processes
8 - compatible : should be "ibm,vas".
9 - ibm,vas-id : A unique identifier for each instance of VAS in the system
17 vas@6019100000000 {
18 compatible = "ibm,vas", "ibm,power9-vas";
20 name = "vas";
21 ibm,vas-id = <0x1>;
/kernel/linux/linux-6.6/arch/powerpc/platforms/pseries/
Dvas-sysfs.c6 #define pr_fmt(fmt) "vas: " fmt
15 #include "vas.h"
43 * and reconfigure VAS windows (close or reopen depends in update_total_credits_store()
44 * on the credits available) instead of depending on VAS in update_total_credits_store()
77 * /sys/devices/virtual/misc/vas/vas0/gzip/default_capabilities
78 * This directory contains the following VAS GZIP capabilities
80 * /sys/devices/virtual/misc/vas/vas0/gzip/default_capabilities/nr_total_credits
83 * /sys/devices/virtual/misc/vas/vas0/gzip/default_capabilities/nr_used_credits
87 * /sys/devices/virtual/misc/vas/vas0/gzip/qos_capabilities
88 * This directory contains the following VAS GZIP capabilities
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Dvas.c6 #define pr_fmt(fmt) "vas: " fmt
21 #include <asm/vas.h>
22 #include "vas.h"
51 * Allocate VAS window hcall
86 * Deallocate VAS window hcall.
107 * Modify VAS window.
116 * AMR value is not supported in Linux VAS implementation. in h_modify_vas_window()
142 * Example: H_QUERY_VAS_CAPABILITIES provides VAS GZIP QoS
143 * and VAS GZIP Default capabilities.
157 /* H_FUNCTION means HV does not support VAS so don't print an error */ in h_query_vas_capabilities()
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/kernel/linux/linux-6.6/arch/powerpc/include/asm/
Dvas.h11 #include <uapi/asm/vas-api.h>
15 * (Local FIFO Size Register) of the VAS workbook.
33 * VAS window Linux status bits
36 /* vas mmap() */
64 * User space VAS windows are opened by tasks and take references
78 * Common VAS window struct on PowerNV and PowerVM
119 * if process / thread has any open VAS window (Use in vas_user_win_add_mm_context()
179 * Helper to map a chip id to VAS id.
183 * Return the VAS id or -1 if no matching vasid is found.
194 * Open a VAS receive window for the instance of VAS identified by @vasid
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/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Dvas.h13 * (Local FIFO Size Register) of the VAS workbook.
104 * Helper to map a chip id to VAS id.
108 * Return the VAS id or -1 if no matching vasid is found.
119 * Open a VAS receive window for the instance of VAS identified by @vasid
134 * Open a VAS send window for the instance of VAS identified by @vasid
138 * Note: The instance of VAS must already have an open receive window for
166 * Register / unregister coprocessor type to VAS API which will be exported
/kernel/linux/linux-6.6/arch/powerpc/platforms/powernv/
Dvas-fault.c3 * VAS Fault handling.
7 #define pr_fmt(fmt) "vas: " fmt
18 #include "vas.h"
22 * (VAS_RX_FIFO_SIZE_MAX). Using 4MB FIFO since each VAS
24 * 8MB FIFO can be used if expects more faults for each VAS
78 * VAS can interrupt with multiple page faults. So process all in vas_fault_thread_fn()
101 * aligned to CRB_ALIGN (256) but the CRB written to by VAS is in vas_fault_thread_fn()
127 pr_devel("VAS[%d] fault_fifo %p, fifo %p, fault_crbs %d\n", in vas_fault_thread_fn()
145 pr_err("VAS[%d] fault_fifo %p, fifo %p, pswid 0x%x, fault_crbs %d bad CRB?\n", in vas_fault_thread_fn()
196 * Fault window is opened per VAS instance. NX pastes fault CRB in fault
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Dvas.c6 #define pr_fmt(fmt) "vas: " fmt
22 #include "vas.h"
37 pr_err("VAS[%d]: Request IRQ(%d) failed with %d\n", in vas_irq_fault_window_setup()
59 rc = of_property_read_u32(dn, "ibm,vas-id", &vasid); in init_vas_instance()
61 pr_err("No ibm,vas-id property for %s?\n", pdev->name); in init_vas_instance()
81 vinst->name = kasprintf(GFP_KERNEL, "vas-%d", vasid); in init_vas_instance()
220 { .compatible = "ibm,vas",},
226 .name = "vas",
239 for_each_compatible_node(dn, NULL, "ibm,vas") { in vas_init()
Dvas.h10 #include <asm/vas.h>
17 * Overview of Virtual Accelerator Switchboard (VAS).
19 * VAS is a hardware "switchboard" that allows senders and receivers to
30 * VAS in each Power9 chip. Each instance of VAS has 64K windows or ports,
41 * in these registers configure/control/determine the behavior of the VAS
47 * The HVWCs for all windows on a specific instance of VAS are in a contiguous
53 * and available to the kernel in the VAS node's "reg" property in the device
74 * base address" and "paste win id shift" reg properties in the VAS device
111 * VAS Window Context Register Offsets and bitmasks.
112 * See Section 3.1.4 of VAS Work book
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Dvas-debug.c6 #define pr_fmt(fmt) "vas: " fmt
12 #include <asm/vas.h>
13 #include "vas.h"
156 * Set up the "root" VAS debugfs dir. Return if we already set it up
157 * (or failed to) in an earlier instance of VAS.
167 vas_debugfs = debugfs_create_dir("vas", NULL); in vas_init_dbgdir()
DMakefile30 obj-$(CONFIG_PPC_VAS) += vas.o vas-window.o vas-debug.o vas-fault.o
/kernel/linux/linux-5.10/Documentation/powerpc/
Dvas-api.rst5 Virtual Accelerator Switchboard (VAS) userspace API
11 Power9 processor introduced Virtual Accelerator Switchboard (VAS) which
38 /dev/crypto/nx-gzip device node implemented by the VAS/NX device driver.
117 __s16 vas_id; /* specific instance of vas or -1
129 select the specific VAS instance, refer
130 "Discovery of available VAS engines" section below.
151 EINVAL fd does not refer to a valid VAS device.
152 EINVAL Invalid vas ID
190 Discovery of available VAS engines
193 Each available VAS instance in the system will have a device tree node
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/kernel/linux/linux-6.6/Documentation/powerpc/
Dvas-api.rst5 Virtual Accelerator Switchboard (VAS) userspace API
11 Power9 processor introduced Virtual Accelerator Switchboard (VAS) which
38 /dev/crypto/nx-gzip device node implemented by the VAS/NX device driver.
117 __s16 vas_id; /* specific instance of vas or -1
129 select the specific VAS instance, refer
130 "Discovery of available VAS engines" section below.
151 EINVAL fd does not refer to a valid VAS device.
152 EINVAL Invalid vas ID
190 Discovery of available VAS engines
193 Each available VAS instance in the system will have a device tree node
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/kernel/linux/linux-5.10/arch/powerpc/platforms/powernv/
Dvas.c6 #define pr_fmt(fmt) "vas: " fmt
22 #include "vas.h"
34 snprintf(devname, sizeof(devname), "vas-%d", vinst->vas_id); in vas_irq_fault_window_setup()
39 pr_err("VAS[%d]: Request IRQ(%d) failed with %d\n", in vas_irq_fault_window_setup()
61 rc = of_property_read_u32(dn, "ibm,vas-id", &vasid); in init_vas_instance()
63 pr_err("No ibm,vas-id property for %s?\n", pdev->name); in init_vas_instance()
215 { .compatible = "ibm,vas",},
221 .name = "vas",
234 for_each_compatible_node(dn, NULL, "ibm,vas") { in vas_init()
DMakefile21 obj-$(CONFIG_PPC_VAS) += vas.o vas-window.o vas-debug.o vas-fault.o vas-api.o
Dvas.h10 #include <asm/vas.h>
17 * Overview of Virtual Accelerator Switchboard (VAS).
19 * VAS is a hardware "switchboard" that allows senders and receivers to
30 * VAS in each Power9 chip. Each instance of VAS has 64K windows or ports,
41 * in these registers configure/control/determine the behavior of the VAS
47 * The HVWCs for all windows on a specific instance of VAS are in a contiguous
53 * and available to the kernel in the VAS node's "reg" property in the device
74 * base address" and "paste win id shift" reg properties in the VAS device
111 * VAS Window Context Register Offsets and bitmasks.
112 * See Section 3.1.4 of VAS Work book
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DKconfig37 bool "IBM Virtual Accelerator Switchboard (VAS)"
41 This enables support for IBM Virtual Accelerator Switchboard (VAS).
43 VAS allows accelerators in co-processors like NX-GZIP and NX-842
46 VAS adapters are found in POWER9 based systems.
Dvas-fault.c3 * VAS Fault handling.
7 #define pr_fmt(fmt) "vas: " fmt
18 #include "vas.h"
22 * (VAS_RX_FIFO_SIZE_MAX). Using 4MB FIFO since each VAS
24 * 8MB FIFO can be used if expects more faults for each VAS
222 * VAS can interrupt with multiple page faults. So process all in vas_fault_thread_fn()
245 * aligned to CRB_ALIGN (256) but the CRB written to by VAS is in vas_fault_thread_fn()
271 pr_devel("VAS[%d] fault_fifo %p, fifo %p, fault_crbs %d\n", in vas_fault_thread_fn()
289 pr_err("VAS[%d] fault_fifo %p, fifo %p, pswid 0x%x, fault_crbs %d bad CRB?\n", in vas_fault_thread_fn()
333 * Fault window is opened per VAS instance. NX pastes fault CRB in fault
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Dvas-debug.c6 #define pr_fmt(fmt) "vas: " fmt
12 #include "vas.h"
153 * Set up the "root" VAS debugfs dir. Return if we already set it up
154 * (or failed to) in an earlier instance of VAS.
164 vas_debugfs = debugfs_create_dir("vas", NULL); in vas_init_dbgdir()
/kernel/linux/linux-6.6/arch/powerpc/platforms/book3s/
DKconfig3 bool "IBM Virtual Accelerator Switchboard (VAS)"
7 This enables support for IBM Virtual Accelerator Switchboard (VAS).
9 VAS devices are found in POWER9-based and later systems, they
Dvas-api.c3 * VAS user space API for its accelerators (Only NX-GZIP is supported now)
7 #define pr_fmt(fmt) "vas-api: " fmt
19 #include <asm/vas.h>
20 #include <uapi/asm/vas-api.h>
308 pr_err("VAS API is not registered\n"); in coproc_ioc_tx_win_open()
315 pr_err_ratelimited("VAS window open failed rc=%ld\n", in coproc_ioc_tx_win_open()
468 * During mmap() paste address, mapping VMA is saved in VAS window
472 * be invalid. Set VAS window VMA to NULL in this function which
483 pr_err("No attached VAS window for the paste address mmap\n"); in vas_mmap_close()
540 pr_err("VAS API is not registered\n"); in coproc_mmap()
/kernel/linux/linux-6.6/drivers/crypto/nx/
Dnx-common-powernv.c16 #include <asm/vas.h>
50 } vas; member
56 * where the process is executing. Use with VAS function.
589 * VAS copy CRB into L2 cache. Refer <asm/vas.h>. in nx842_exec_vas()
595 * VAS paste previously copied CRB to NX. in nx842_exec_vas()
601 * Retry copy/paste function for VAS failures. in nx842_exec_vas()
606 pr_err_ratelimited("VAS copy/paste failed\n"); in nx842_exec_vas()
694 * Open a VAS send window which is used to send request to NX. in nx_alloc_txwin()
696 txwin = vas_tx_win_open(coproc->vas.id, coproc->ct, &txattr); in nx_alloc_txwin()
839 * Open a VAS receice window which is used to configure RxFIFO in vas_cfg_coproc_info()
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/kernel/linux/linux-5.10/drivers/crypto/nx/
Dnx-common-powernv.c16 #include <asm/vas.h>
50 } vas; member
56 * where the process is executing. Use with VAS function.
592 * VAS copy CRB into L2 cache. Refer <asm/vas.h>. in nx842_exec_vas()
598 * VAS paste previously copied CRB to NX. in nx842_exec_vas()
604 * Retry copy/paste function for VAS failures. in nx842_exec_vas()
609 pr_err_ratelimited("VAS copy/paste failed\n"); in nx842_exec_vas()
697 * Open a VAS send window which is used to send request to NX. in nx_alloc_txwin()
699 txwin = vas_tx_win_open(coproc->vas.id, coproc->ct, &txattr); in nx_alloc_txwin()
842 * Open a VAS receice window which is used to configure RxFIFO in vas_cfg_coproc_info()
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/kernel/linux/linux-6.6/tools/testing/selftests/powerpc/mce/
Dvas-api.h16 /* Flags to VAS TX open window ioctl */
22 __s16 vas_id; /* specific instance of vas or -1 for default */
/kernel/linux/linux-6.6/tools/testing/selftests/powerpc/nx-gzip/include/
Dvas-api.h16 /* Flags to VAS TX open window ioctl */
22 __s16 vas_id; /* specific instance of vas or -1 for default */

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