Home
last modified time | relevance | path

Searched full:vop (Results 1 – 25 of 125) sorted by relevance

12345

/kernel/linux/linux-6.6/drivers/gpu/drm/rockchip/
Drockchip_drm_vop.c44 #define VOP_WIN_SET(vop, win, name, v) \ argument
45 vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
46 #define VOP_SCL_SET(vop, win, name, v) \ argument
47 vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
48 #define VOP_SCL_SET_EXT(vop, win, name, v) \ argument
49 vop_reg_set(vop, &win->phy->scl->ext->name, \
52 #define VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, name, v) \ argument
55 vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \
58 #define VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, win_yuv2yuv, name, v) \ argument
61 vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \
[all …]
Danalogix_dp-rockchip.c46 * @lcdsel_big: reg value of selecting vop big for eDP
47 * @lcdsel_lit: reg value of selecting vop little for eDP
129 /* VOP couldn't output YUV video format for eDP rightly */ in rockchip_dp_get_modes()
203 DRM_DEV_DEBUG(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG"); in rockchip_dp_drm_encoder_enable()
250 * The hardware IC designed that VOP must output the RGB10 video in rockchip_dp_drm_encoder_atomic_check()
252 * then eDP controller should cut down the video data, not via VOP in rockchip_dp_drm_encoder_atomic_check()
253 * controller, that's why we need to hardcode the VOP output mode in rockchip_dp_drm_encoder_atomic_check()
Drockchip_vop_reg.c965 * rk3399 vop big windows register layout is same as rk3288, but we
1126 { .compatible = "rockchip,rk3036-vop",
1128 { .compatible = "rockchip,rk3126-vop",
1130 { .compatible = "rockchip,px30-vop-big",
1132 { .compatible = "rockchip,px30-vop-lit",
1134 { .compatible = "rockchip,rk3066-vop",
1136 { .compatible = "rockchip,rk3188-vop",
1138 { .compatible = "rockchip,rk3288-vop",
1140 { .compatible = "rockchip,rk3368-vop",
1142 { .compatible = "rockchip,rk3366-vop",
[all …]
DKconfig25 bool "Rockchip VOP driver"
28 This selects support for the VOP driver. You should enable it
Drockchip_lvds.c317 DRM_DEV_ERROR(lvds->dev, "failed to set VOP source: %d\n", ret); in rk3288_lvds_encoder_enable()
383 int vop; in px30_lvds_set_vop_source() local
385 vop = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder); in px30_lvds_set_vop_source()
386 if (vop < 0) in px30_lvds_set_vop_source()
387 return vop; in px30_lvds_set_vop_source()
391 PX30_LVDS_VOP_SEL(vop)); in px30_lvds_set_vop_source()
418 DRM_DEV_ERROR(lvds->dev, "failed to set VOP source: %d\n", ret); in px30_lvds_encoder_enable()
Drockchip_vop2_reg.c126 * rk3568 vop with 2 cluster, 2 esmart win, 2 smart win.
250 .compatible = "rockchip,rk3566-vop",
253 .compatible = "rockchip,rk3568-vop",
/kernel/linux/linux-5.10/drivers/gpu/drm/rockchip/
Drockchip_drm_vop.c42 #define VOP_WIN_SET(vop, win, name, v) \ argument
43 vop_reg_set(vop, &win->phy->name, win->base, ~0, v, #name)
44 #define VOP_SCL_SET(vop, win, name, v) \ argument
45 vop_reg_set(vop, &win->phy->scl->name, win->base, ~0, v, #name)
46 #define VOP_SCL_SET_EXT(vop, win, name, v) \ argument
47 vop_reg_set(vop, &win->phy->scl->ext->name, \
50 #define VOP_WIN_YUV2YUV_SET(vop, win_yuv2yuv, name, v) \ argument
53 vop_reg_set(vop, &win_yuv2yuv->name, 0, ~0, v, #name); \
56 #define VOP_WIN_YUV2YUV_COEFFICIENT_SET(vop, win_yuv2yuv, name, v) \ argument
59 vop_reg_set(vop, &win_yuv2yuv->phy->name, win_yuv2yuv->base, ~0, v, #name); \
[all …]
Danalogix_dp-rockchip.c48 * @lcdsel_big: reg value of selecting vop big for eDP
49 * @lcdsel_lit: reg value of selecting vop little for eDP
119 /* VOP couldn't output YUV video format for eDP rightly */ in rockchip_dp_get_modes()
193 DRM_DEV_DEBUG(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG"); in rockchip_dp_drm_encoder_enable()
240 * The hardware IC designed that VOP must output the RGB10 video in rockchip_dp_drm_encoder_atomic_check()
242 * then eDP controller should cut down the video data, not via VOP in rockchip_dp_drm_encoder_atomic_check()
243 * controller, that's why we need to hardcode the VOP output mode in rockchip_dp_drm_encoder_atomic_check()
Drockchip_vop_reg.c891 * rk3399 vop big windows register layout is same as rk3288, but we
1046 { .compatible = "rockchip,rk3036-vop",
1048 { .compatible = "rockchip,rk3126-vop",
1050 { .compatible = "rockchip,px30-vop-big",
1052 { .compatible = "rockchip,px30-vop-lit",
1054 { .compatible = "rockchip,rk3066-vop",
1056 { .compatible = "rockchip,rk3188-vop",
1058 { .compatible = "rockchip,rk3288-vop",
1060 { .compatible = "rockchip,rk3368-vop",
1062 { .compatible = "rockchip,rk3366-vop",
[all …]
Drockchip_lvds.c311 DRM_DEV_ERROR(lvds->dev, "failed to set VOP source: %d\n", ret); in rk3288_lvds_encoder_enable()
377 int vop; in px30_lvds_set_vop_source() local
379 vop = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder); in px30_lvds_set_vop_source()
380 if (vop < 0) in px30_lvds_set_vop_source()
381 return vop; in px30_lvds_set_vop_source()
385 PX30_LVDS_VOP_SEL(vop)); in px30_lvds_set_vop_source()
412 DRM_DEV_ERROR(lvds->dev, "failed to set VOP source: %d\n", ret); in px30_lvds_encoder_enable()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.yaml4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
7 title: Rockchip SoC display controller (VOP)
10 VOP (Video Output Processor) is the display controller for the Rockchip
21 - rockchip,px30-vop-big
22 - rockchip,px30-vop-lit
23 - rockchip,rk3036-vop
24 - rockchip,rk3066-vop
25 - rockchip,rk3126-vop
26 - rockchip,rk3188-vop
27 - rockchip,rk3228-vop
[all …]
Drockchip-drm.yaml15 vop devices or other display interface nodes that comprise the
26 of vop devices. vop definitions as defined in
27 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/rockchip/
Drockchip-vop.yaml4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop.yaml#
7 title: Rockchip SoC display controller (VOP)
10 VOP (Video Output Processor) is the display controller for the Rockchip
21 - rockchip,px30-vop-big
22 - rockchip,px30-vop-lit
23 - rockchip,rk3036-vop
24 - rockchip,rk3066-vop
25 - rockchip,rk3126-vop
26 - rockchip,rk3188-vop
27 - rockchip,rk3228-vop
[all …]
Drockchip-vop2.yaml21 - rockchip,rk3566-vop
22 - rockchip,rk3568-vop
35 - const: vop
41 The VOP interrupt is shared by several interrupt sources, such as
109 vop: vop@fe040000 {
110 compatible = "rockchip,rk3568-vop";
112 reg-names = "vop", "gamma-lut";
Drockchip-drm.yaml15 vop devices or other display interface nodes that comprise the
28 of vop devices. vop definitions as defined in
29 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.yaml
/kernel/liteos_a/fs/vfs/
Dvnode.c134 int VnodeAlloc(struct VnodeOps *vop, struct Vnode **newVnode) in VnodeAlloc() argument
161 if (vop == NULL) { in VnodeAlloc()
163 vnode->vop = &g_devfsOps; in VnodeAlloc()
166 vnode->vop = vop; in VnodeAlloc()
196 if (vnode->vop->Reclaim) { in VnodeFree()
197 vnode->vop->Reclaim(vnode); in VnodeFree()
203 if (vnode->vop == &g_devfsOps) { in VnodeFree()
325 vnode->vop == &g_devfsOps || vnode->vop == NULL) { in RefreshLRU()
371 if ((*currentVnode)->vop != NULL && (*currentVnode)->vop->Lookup != NULL) { in Step()
372 ret = (*currentVnode)->vop->Lookup(*currentVnode, nextDir, len, &nextVnode); in Step()
[all …]
/kernel/linux/patches/linux-5.10/yangfan_patch/
Ddrivers.patch1765 + * therefore, we move VOP pwm and aclk clocks to other PLLs, let
1806 + * therefore, we move VOP pwm and aclk clocks to other PLLs, let
16596 + debug node: /d/dri/0/ff900000.vop/vop_dump/dump
16597 + cat /d/dri/0/ff900000.vop/vop_dump/dump get more help
16598 + the upper ff900000.vop is different at different SOC platform.
16612 + bool "Rockchip VOP driver"
16619 + This selects support for the VOP driver.If you want to
16620 + enable VOP on Rockchip SoC, you should select this option.
16684 + rockchip vop, This is used for some test.
16687 + bool "Rockchip virtual VOP drm driver"
[all …]
/kernel/linux/linux-6.6/drivers/media/pci/solo6x10/
Dsolo6x10-v4l2-enc.c143 u8 *vop; in solo_update_mode() local
153 vop = vop_6110_ntsc_cif; in solo_update_mode()
156 vop = vop_6110_pal_cif; in solo_update_mode()
161 vop = vop_6010_ntsc_cif; in solo_update_mode()
164 vop = vop_6010_pal_cif; in solo_update_mode()
174 vop = vop_6110_ntsc_d1; in solo_update_mode()
177 vop = vop_6110_pal_d1; in solo_update_mode()
182 vop = vop_6010_ntsc_d1; in solo_update_mode()
185 vop = vop_6010_pal_d1; in solo_update_mode()
191 memcpy(solo_enc->vop, vop, vop_len); in solo_update_mode()
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/solo6x10/
Dsolo6x10-v4l2-enc.c143 u8 *vop; in solo_update_mode() local
153 vop = vop_6110_ntsc_cif; in solo_update_mode()
156 vop = vop_6110_pal_cif; in solo_update_mode()
161 vop = vop_6010_ntsc_cif; in solo_update_mode()
164 vop = vop_6010_pal_cif; in solo_update_mode()
174 vop = vop_6110_ntsc_d1; in solo_update_mode()
177 vop = vop_6110_pal_d1; in solo_update_mode()
182 vop = vop_6010_ntsc_d1; in solo_update_mode()
185 vop = vop_6010_pal_d1; in solo_update_mode()
191 memcpy(solo_enc->vop, vop, vop_len); in solo_update_mode()
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3566.dtsi33 &vop {
34 compatible = "rockchip,rk3566-vop";
/kernel/liteos_a/fs/vfs/operation/
Dvfs_force_umount.c380 if (node->vop && node->vop->Closedir) { in DirPreClose()
381 node->vop->Closedir(node, dirp); in DirPreClose()
431 if (vnode->vop->Reclaim) { in VnodeTryFree()
432 vnode->vop->Reclaim(vnode); in VnodeTryFree()
434 vnode->vop = &g_errorVnodeOps; in VnodeTryFree()
Dvfs_check.c72 if (vnode->vop && vnode->vop->Fscheck) { in fscheck()
73 ret = vnode->vop->Fscheck(vnode, dir); in fscheck()
Dvfs_utime.c89 if (vnode->vop && vnode->vop->Chattr) { in utime()
100 ret = vnode->vop->Chattr(vnode, &attr); in utime()
Dvfs_chattr.c83 if (vnode->vop != NULL && vnode->vop->Chattr != NULL) { in chattr()
84 ret = vnode->vop->Chattr(vnode, attr); in chattr()
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pwm/
Dpwm-rockchip.txt8 "rockchip,vop-pwm": found integrated in VOP on RK3288 SoC

12345