| /kernel/linux/linux-5.10/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | hdmi_wp.c | 21 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) in hdmi_wp_dump() argument
23 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
45 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
47 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
50 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) in hdmi_wp_set_irqstatus() argument
52 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus()
54 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
57 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_set_irqenable() argument
59 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable()
62 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_clear_irqenable() argument
[all …]
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| D | hdmi.h | 41 /* HDMI WP IRQ flags */
233 struct hdmi_wp_data *wp; member
277 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
278 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
279 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s);
280 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
281 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus);
282 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask);
283 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask);
284 int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val);
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| D | hdmi5.c | 66 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
69 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
70 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
82 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
94 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
97 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
102 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
104 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
179 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); in hdmi_power_on_full()
180 hdmi_wp_set_irqstatus(&hdmi.wp, in hdmi_power_on_full()
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| D | hdmi4.c | 62 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
65 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
66 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
76 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
78 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
81 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
83 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
85 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
149 struct hdmi_wp_data *wp = &hdmi.wp; in hdmi_power_on_full() local
157 hdmi_wp_clear_irqenable(wp, 0xffffffff); in hdmi_power_on_full()
[all …]
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| /kernel/linux/linux-6.6/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | hdmi_wp.c | 21 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) in hdmi_wp_dump() argument
23 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
45 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
47 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
50 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) in hdmi_wp_set_irqstatus() argument
52 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus()
54 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
57 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_set_irqenable() argument
59 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable()
62 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_clear_irqenable() argument
[all …]
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| D | hdmi.h | 41 /* HDMI WP IRQ flags */
233 struct hdmi_wp_data *wp; member
277 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
278 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
279 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s);
280 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
281 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus);
282 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask);
283 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask);
284 int hdmi_wp_set_phy_pwr(struct hdmi_wp_data *wp, enum hdmi_phy_pwr val);
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| D | hdmi5.c | 64 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
67 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
68 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
80 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
92 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
95 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
100 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
102 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
177 hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff); in hdmi_power_on_full()
178 hdmi_wp_set_irqstatus(&hdmi.wp, in hdmi_power_on_full()
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| D | hdmi4.c | 60 struct hdmi_wp_data *wp = data; in hdmi_irq_handler() local
63 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
64 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
74 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
76 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
79 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
81 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
83 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
147 struct hdmi_wp_data *wp = &hdmi.wp; in hdmi_power_on_full() local
155 hdmi_wp_clear_irqenable(wp, 0xffffffff); in hdmi_power_on_full()
[all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/omapdrm/dss/ |
| D | hdmi_wp.c | 20 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) in hdmi_wp_dump() argument
22 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
44 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
46 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
49 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) in hdmi_wp_set_irqstatus() argument
51 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus()
53 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
56 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_set_irqenable() argument
58 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable()
61 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_clear_irqenable() argument
[all …]
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| D | hdmi.h | 45 /* HDMI WP IRQ flags */
239 struct hdmi_wp_data *wp; member
261 struct hdmi_wp_data *wp; member
296 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
297 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
298 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s);
299 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
300 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus);
301 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask);
302 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask);
[all …]
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| D | hdmi5.c | 68 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
71 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
72 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
84 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
96 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
99 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
104 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
106 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
172 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); in hdmi_power_on_full()
173 hdmi_wp_set_irqstatus(&hdmi->wp, in hdmi_power_on_full()
[all …]
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| D | hdmi4.c | 67 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
70 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
71 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
81 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
83 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
86 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
88 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
90 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
150 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_power_on_full() local
159 hdmi_wp_clear_irqenable(wp, ~HDMI_IRQ_CORE); in hdmi_power_on_full()
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| D | hdmi_pll.c | 42 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_enable() local
50 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_BOTHON_ALLCLKS); in hdmi_pll_enable()
60 struct hdmi_wp_data *wp = pll->wp; in hdmi_pll_disable() local
63 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); in hdmi_pll_disable()
147 if (hpll->wp->version == 4) in hdmi_init_pll_data()
162 struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) in hdmi_pll_init() argument
167 pll->wp = wp; in hdmi_pll_init()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/omapdrm/dss/ |
| D | hdmi_wp.c | 20 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s) in hdmi_wp_dump() argument
22 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, hdmi_read_reg(wp->base, r)) in hdmi_wp_dump()
44 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp) in hdmi_wp_get_irqstatus() argument
46 return hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_get_irqstatus()
49 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus) in hdmi_wp_set_irqstatus() argument
51 hdmi_write_reg(wp->base, HDMI_WP_IRQSTATUS, irqstatus); in hdmi_wp_set_irqstatus()
53 hdmi_read_reg(wp->base, HDMI_WP_IRQSTATUS); in hdmi_wp_set_irqstatus()
56 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_set_irqenable() argument
58 hdmi_write_reg(wp->base, HDMI_WP_IRQENABLE_SET, mask); in hdmi_wp_set_irqenable()
61 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask) in hdmi_wp_clear_irqenable() argument
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| D | hdmi.h | 45 /* HDMI WP IRQ flags */
239 struct hdmi_wp_data *wp; member
261 struct hdmi_wp_data *wp; member
296 int hdmi_wp_video_start(struct hdmi_wp_data *wp);
297 void hdmi_wp_video_stop(struct hdmi_wp_data *wp);
298 void hdmi_wp_dump(struct hdmi_wp_data *wp, struct seq_file *s);
299 u32 hdmi_wp_get_irqstatus(struct hdmi_wp_data *wp);
300 void hdmi_wp_set_irqstatus(struct hdmi_wp_data *wp, u32 irqstatus);
301 void hdmi_wp_set_irqenable(struct hdmi_wp_data *wp, u32 mask);
302 void hdmi_wp_clear_irqenable(struct hdmi_wp_data *wp, u32 mask);
[all …]
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| D | hdmi5.c | 67 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
70 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
71 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
83 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
95 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
98 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
103 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
105 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
171 hdmi_wp_clear_irqenable(&hdmi->wp, 0xffffffff); in hdmi_power_on_full()
172 hdmi_wp_set_irqstatus(&hdmi->wp, in hdmi_power_on_full()
[all …]
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| D | hdmi4.c | 66 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_irq_handler() local
69 irqstatus = hdmi_wp_get_irqstatus(wp); in hdmi_irq_handler()
70 hdmi_wp_set_irqstatus(wp, irqstatus); in hdmi_irq_handler()
80 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF); in hdmi_irq_handler()
82 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT | in hdmi_irq_handler()
85 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
87 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON); in hdmi_irq_handler()
89 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON); in hdmi_irq_handler()
149 struct hdmi_wp_data *wp = &hdmi->wp; in hdmi_power_on_full() local
158 hdmi_wp_clear_irqenable(wp, ~HDMI_IRQ_CORE); in hdmi_power_on_full()
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/math-emu/ |
| D | math_efp.c | 109 u32 wp[2]; member
200 vc.wp[0] = current->thread.evr[fc]; in do_spe_mathemu()
201 vc.wp[1] = regs->gpr[fc]; in do_spe_mathemu()
202 va.wp[0] = current->thread.evr[fa]; in do_spe_mathemu()
203 va.wp[1] = regs->gpr[fa]; in do_spe_mathemu()
204 vb.wp[0] = current->thread.evr[fb]; in do_spe_mathemu()
205 vb.wp[1] = regs->gpr[fb]; in do_spe_mathemu()
210 pr_debug("vc: %08x %08x\n", vc.wp[0], vc.wp[1]); in do_spe_mathemu()
211 pr_debug("va: %08x %08x\n", va.wp[0], va.wp[1]); in do_spe_mathemu()
212 pr_debug("vb: %08x %08x\n", vb.wp[0], vb.wp[1]); in do_spe_mathemu()
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| /kernel/linux/linux-5.10/arch/powerpc/math-emu/ |
| D | math_efp.c | 109 u32 wp[2]; member
200 vc.wp[0] = current->thread.evr[fc]; in do_spe_mathemu()
201 vc.wp[1] = regs->gpr[fc]; in do_spe_mathemu()
202 va.wp[0] = current->thread.evr[fa]; in do_spe_mathemu()
203 va.wp[1] = regs->gpr[fa]; in do_spe_mathemu()
204 vb.wp[0] = current->thread.evr[fb]; in do_spe_mathemu()
205 vb.wp[1] = regs->gpr[fb]; in do_spe_mathemu()
210 pr_debug("vc: %08x %08x\n", vc.wp[0], vc.wp[1]); in do_spe_mathemu()
211 pr_debug("va: %08x %08x\n", va.wp[0], va.wp[1]); in do_spe_mathemu()
212 pr_debug("vb: %08x %08x\n", vb.wp[0], vb.wp[1]); in do_spe_mathemu()
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| /kernel/linux/linux-6.6/lib/crypto/mpi/ |
| D | mpi-add.c | 22 mpi_ptr_t wp, up; in mpi_add_ui() local
37 wp = w->d; in mpi_add_ui()
40 wp[0] = v; in mpi_add_ui()
44 cy = mpihelp_add_1(wp, up, usize, v); in mpi_add_ui()
45 wp[usize] = cy; in mpi_add_ui()
52 wp[0] = v - up[0]; in mpi_add_ui()
55 mpihelp_sub_1(wp, up, usize, v); in mpi_add_ui()
57 wsize = usize - (wp[usize-1] == 0); in mpi_add_ui()
69 mpi_ptr_t wp, up, vp; in mpi_add() local
94 wp = w->d; in mpi_add()
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| D | mpi-mul.c | 19 mpi_ptr_t up, vp, wp; in mpi_mul() local
42 wp = w->d; in mpi_mul()
47 if (wp == up || wp == vp) { in mpi_mul()
48 wp = mpi_alloc_limb_space(wsize); in mpi_mul()
52 wp = w->d; in mpi_mul()
55 if (wp == up) { in mpi_mul()
59 if (wp == vp) in mpi_mul()
62 MPN_COPY(up, wp, usize); in mpi_mul()
63 } else if (wp == vp) { in mpi_mul()
67 MPN_COPY(vp, wp, vsize); in mpi_mul()
[all …]
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| /kernel/linux/linux-5.10/lib/mpi/ |
| D | mpi-add.c | 22 mpi_ptr_t wp, up; in mpi_add_ui() local
37 wp = w->d; in mpi_add_ui()
40 wp[0] = v; in mpi_add_ui()
44 cy = mpihelp_add_1(wp, up, usize, v); in mpi_add_ui()
45 wp[usize] = cy; in mpi_add_ui()
52 wp[0] = v - up[0]; in mpi_add_ui()
55 mpihelp_sub_1(wp, up, usize, v); in mpi_add_ui()
57 wsize = usize - (wp[usize-1] == 0); in mpi_add_ui()
69 mpi_ptr_t wp, up, vp; in mpi_add() local
94 wp = w->d; in mpi_add()
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| D | mpi-mul.c | 19 mpi_ptr_t up, vp, wp; in mpi_mul() local
42 wp = w->d; in mpi_mul()
47 if (wp == up || wp == vp) { in mpi_mul()
48 wp = mpi_alloc_limb_space(wsize); in mpi_mul()
52 wp = w->d; in mpi_mul()
55 if (wp == up) { in mpi_mul()
59 if (wp == vp) in mpi_mul()
62 MPN_COPY(up, wp, usize); in mpi_mul()
63 } else if (wp == vp) { in mpi_mul()
67 MPN_COPY(vp, wp, vsize); in mpi_mul()
[all …]
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| /kernel/linux/linux-6.6/tools/testing/selftests/breakpoints/ |
| D | breakpoint_test_arm64.c | 81 static bool set_watchpoint(pid_t pid, int size, int wp) in set_watchpoint() argument
83 const volatile uint8_t *addr = &var[32 + wp]; in set_watchpoint()
112 static bool run_test(int wr_size, int wp_size, int wr, int wp) in run_test() argument
143 if (!set_watchpoint(pid, wp_size, wp)) in run_test()
204 int wr, wp, size; in main() local
216 for (wp = wr - size; wp <= wr + size; wp = wp + size) { in main()
217 result = run_test(size, MIN(size, 8), wr, wp); in main()
218 if ((result && wr == wp) || in main()
219 (!result && wr != wp)) in main()
222 size, wr, wp); in main()
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| /kernel/linux/linux-5.10/tools/testing/selftests/breakpoints/ |
| D | breakpoint_test_arm64.c | 81 static bool set_watchpoint(pid_t pid, int size, int wp) in set_watchpoint() argument
83 const volatile uint8_t *addr = &var[32 + wp]; in set_watchpoint()
112 static bool run_test(int wr_size, int wp_size, int wr, int wp) in run_test() argument
143 if (!set_watchpoint(pid, wp_size, wp)) in run_test()
204 int wr, wp, size; in main() local
216 for (wp = wr - size; wp <= wr + size; wp = wp + size) { in main()
217 result = run_test(size, MIN(size, 8), wr, wp); in main()
218 if ((result && wr == wp) || in main()
219 (!result && wr != wp)) in main()
222 size, wr, wp); in main()
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