| /kernel/linux/linux-6.6/Documentation/driver-api/md/ |
| D | raid5-cache.rst | 7 caches data to the RAID disks. The cache can be in write-through (supported 8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since 9 3.4) has a new option '--write-journal' to create array with cache. Please 10 refer to mdadm manual for details. By default (RAID array starts), the cache is 11 in write-through mode. A user can switch it to write-back mode by:: 13 echo "write-back" > /sys/block/md0/md/journal_mode 15 And switch it back to write-through mode by:: 17 echo "write-through" > /sys/block/md0/md/journal_mode 19 In both modes, all writes to the array will hit cache disk first. This means 22 write-through mode [all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/md/ |
| D | raid5-cache.rst | 7 caches data to the RAID disks. The cache can be in write-through (supported 8 since 4.4) or write-back mode (supported since 4.10). mdadm (supported since 9 3.4) has a new option '--write-journal' to create array with cache. Please 10 refer to mdadm manual for details. By default (RAID array starts), the cache is 11 in write-through mode. A user can switch it to write-back mode by:: 13 echo "write-back" > /sys/block/md0/md/journal_mode 15 And switch it back to write-through mode by:: 17 echo "write-through" > /sys/block/md0/md/journal_mode 19 In both modes, all writes to the array will hit cache disk first. This means 22 write-through mode [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_z16/ |
| D | extended.json | 3 "Unit": "CPU-M-CF", 6 "BriefDescription": "L1D Read-only Exclusive Writes", 7 …write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache bu… 10 "Unit": "CPU-M-CF", 14 … Translation Lookaside Buffer 2 (TLB2) and the request was made by the Level-1 Data cache. This is… 17 "Unit": "CPU-M-CF", 21 …ress for a request made by the Level-1 Data cache. Incremented by one for every TLB2 miss in progr… 24 "Unit": "CPU-M-CF", 28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page… 31 "Unit": "CPU-M-CF", [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/freescale/imx8mp/sys/ |
| D | metrics.json | 5 "MetricExpr": "imx8_ddr0@axid\\-read\\,axi_mask\\=0xffff\\,axi_id\\=0x0000@", 6 "ScaleUnit": "9.765625e-4KB", 11 "BriefDescription": "bytes of all masters write to ddr", 13 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0xffff\\,axi_id\\=0x0000@", 14 "ScaleUnit": "9.765625e-4KB", 21 "MetricExpr": "imx8_ddr0@axid\\-read\\,axi_mask\\=0x0000\\,axi_id\\=0x0000@", 22 "ScaleUnit": "9.765625e-4KB", 27 "BriefDescription": "bytes of a53 core write to ddr", 29 "MetricExpr": "imx8_ddr0@axid\\-write\\,axi_mask\\=0x0000\\,axi_id\\=0x0000@", 30 "ScaleUnit": "9.765625e-4KB", [all …]
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| /kernel/linux/linux-6.6/Documentation/ABI/testing/ |
| D | sysfs-class-bdi | 14 non-block filesystems which provide their own BDI, such as NFS 17 MAJOR:MINOR-fuseblk 23 The default backing dev, used for non-block device backed 30 Size of the read-ahead window in kilobytes 32 (read-write) 38 total write-back cache that relates to its current average 39 writeout speed in relation to the other devices. 42 percentage of the write-back cache to a particular device. 45 (read-write) 52 total write-back cache that relates to its current average [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| D | macsec_api.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 50 * rec - [OUT] The raw table row data will be unpacked into the fields of rec. 51 * table_index - The table row to read (max 23). 57 /*! Pack the fields of rec, and write the packed data into the 59 * rec - [IN] The bitfield values to write to the table row. 60 * table_index - The table row to write(max 23). 68 * rec - [OUT] The raw table row data will be unpacked into the fields of rec. 69 * table_index - The table row to read (max 47). 75 /*! Pack the fields of rec, and write the packed data into the 77 * rec - [IN] The bitfield values to write to the table row. [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/aquantia/atlantic/macsec/ |
| D | macsec_api.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 50 * rec - [OUT] The raw table row data will be unpacked into the fields of rec. 51 * table_index - The table row to read (max 23). 57 /*! Pack the fields of rec, and write the packed data into the 59 * rec - [IN] The bitfield values to write to the table row. 60 * table_index - The table row to write(max 23). 68 * rec - [OUT] The raw table row data will be unpacked into the fields of rec. 69 * table_index - The table row to read (max 47). 75 /*! Pack the fields of rec, and write the packed data into the 77 * rec - [IN] The bitfield values to write to the table row. [all …]
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| /kernel/linux/linux-5.10/Documentation/filesystems/ |
| D | zonefs.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 ZoneFS - Zone filesystem for Zoned block devices 11 as a file. Unlike a regular POSIX-compliant file system with native zoned block 12 device support (e.g. f2fs), zonefs does not hide the sequential write 13 constraint of zoned block devices to the user. Files representing sequential 14 write zones of the device must be written sequentially starting from the end 17 As such, zonefs is in essence closer to a raw block device access interface 18 than to a full-featured POSIX file system. The goal of zonefs is to simplify 21 direct block device file ioctls which may be more obscure to developers. One 22 example of this approach is the implementation of LSM (log-structured merge) [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/snowridgex/ |
| D | uncore-memory.json | 3 "BriefDescription": "read requests to memory controller. Derived from unc_m_cas_count.rd", 7 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu… 13 "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr", 17 …"PublicDescription": "Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-p… 27 …channel. Activate commands are issued to open up a page on the DRAM devices so that it can be rea… 32 "BriefDescription": "DRAM Activate Count : Activate due to Bypass", 36 …to Bypass : Counts the number of DRAM Activate commands sent on this channel. Activate commands a… 54 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu… 59 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre", 63 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre : DRAM RD… [all …]
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| /kernel/linux/linux-5.10/arch/mips/kernel/ |
| D | cps-vec-ns16550.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 9 #include <asm/asm-offsets.h> 32 * _mips_cps_putc() - write a character to the UART 33 * @a0: ASCII character to write 45 * _mips_cps_puts() - write a string to the UART 46 * @a0: pointer to NULL-terminated ASCII string 49 * Write a null-terminated ASCII string to the UART. 65 * _mips_cps_putx4 - write a 4b hex value to the UART 66 * @a0: the 4b value to write to the UART 69 * Write a single hexadecimal character to the UART. [all …]
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| /kernel/linux/linux-6.6/arch/mips/kernel/ |
| D | cps-vec-ns16550.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 9 #include <asm/asm-offsets.h> 32 * _mips_cps_putc() - write a character to the UART 33 * @a0: ASCII character to write 45 * _mips_cps_puts() - write a string to the UART 46 * @a0: pointer to NULL-terminated ASCII string 49 * Write a null-terminated ASCII string to the UART. 65 * _mips_cps_putx4 - write a 4b hex value to the UART 66 * @a0: the 4b value to write to the UART 69 * Write a single hexadecimal character to the UART. [all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | uncore-memory.json | 3 "BriefDescription": "read requests to memory controller. Derived from unc_m_cas_count.rd", 13 "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr", 50 "BriefDescription": "Pre-charges due to page misses", 59 "BriefDescription": "Pre-charge for reads", 68 "BriefDescription": "Pre-charge for writes", 77 …"BriefDescription": "Write requests allocated in the PMM Write Pending Queue for Intel Optane DC p… 85 …"BriefDescription": "Write requests allocated in the PMM Write Pending Queue for Intel Optane DC p… 98 "ScaleUnit": "6.103515625E-5MB", 102 …"BriefDescription": "Intel Optane DC persistent memory bandwidth write (MB). Derived from unc_m_pm… 105 "EventName": "UNC_M_PMM_BANDWIDTH.WRITE", [all …]
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| /kernel/linux/linux-6.6/Documentation/filesystems/ |
| D | zonefs.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 ZoneFS - Zone filesystem for Zoned block devices 11 as a file. Unlike a regular POSIX-compliant file system with native zoned block 12 device support (e.g. f2fs), zonefs does not hide the sequential write 13 constraint of zoned block devices to the user. Files representing sequential 14 write zones of the device must be written sequentially starting from the end 17 As such, zonefs is in essence closer to a raw block device access interface 18 than to a full-featured POSIX file system. The goal of zonefs is to simplify 21 direct block device file ioctls which may be more obscure to developers. One 22 example of this approach is the implementation of LSM (log-structured merge) [all …]
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| /kernel/linux/linux-6.6/kernel/ |
| D | sysctl.c | 1 // SPDX-License-Identifier: GPL-2.0-only 9 * Added kernel/java-{interpreter,appletviewer}, 96/5/10, Mike Shaver. 11 * Added kswapd-interval, ctrl-alt-del, printk stuff, 1/8/97, Chris Horn. 16 * Changed linked lists to use list.h instead of lists.h, 02/24/00, Bill 84 /* shared constants to be used in various sysctls */ 85 const int sysctl_vals[] = { 0, 1, 2, 3, 4, 100, 200, 1000, 3000, INT_MAX, 65535, -1 }; 106 * enum sysctl_writes_mode - supported sysctl write modes 108 * @SYSCTL_WRITES_LEGACY: each write syscall must fully contain the sysctl value 109 * to be written, and multiple writes on the same sysctl file descriptor 114 * @SYSCTL_WRITES_STRICT: writes to numeric sysctl entries must always be at [all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z13/ |
| D | extended.json | 3 "Unit": "CPU-M-CF", 6 "BriefDescription": "L1D Read-only Exclusive Writes", 7 …write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache bu… 10 "Unit": "CPU-M-CF", 14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi… 17 "Unit": "CPU-M-CF", 21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB… 24 "Unit": "CPU-M-CF", 27 "BriefDescription": "DTLB1 One-Megabyte Page Writes", 28 …iption": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer fo… [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_z13/ |
| D | extended.json | 3 "Unit": "CPU-M-CF", 6 "BriefDescription": "L1D Read-only Exclusive Writes", 7 …write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache bu… 10 "Unit": "CPU-M-CF", 14 …"PublicDescription": "A translation entry has been written to the Level-1 Data Translation Lookasi… 17 "Unit": "CPU-M-CF", 21 …"PublicDescription": "Level-1 Data TLB miss in progress. Incremented by one for every cycle a DTLB… 24 "Unit": "CPU-M-CF", 27 "BriefDescription": "DTLB1 One-Megabyte Page Writes", 28 …iption": "A translation entry has been written to the Level-1 Data Translation Lookaside Buffer fo… [all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | uncore-memory.json | 3 "BriefDescription": "read requests to memory controller. Derived from unc_m_cas_count.rd", 13 "BriefDescription": "write requests to memory controller. Derived from unc_m_cas_count.wr", 50 "BriefDescription": "Pre-charges due to page misses", 59 "BriefDescription": "Pre-charge for reads", 68 "BriefDescription": "Pre-charge for writes", 77 "BriefDescription": "DRAM Page Activate commands sent due to a write request", 82 …to a write request to the iMC (Memory Controller). Activate commands are issued to open up a page… 92 …to DRAM per memory channel. CAS commands are issued to specify the address to read or write on DR… 102 …to DRAM on a per channel basis. CAS commands are issued to specify the address to read or write o… 112 …to DRAM due to a partial write, on a per channel basis. CAS commands are issued to specify the ad… [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/icelakex/ |
| D | uncore-memory.json | 7 …channel. Activate commands are issued to open up a page on the DRAM devices so that it can be rea… 12 "BriefDescription": "DRAM Activate Count : Activate due to Bypass", 16 …to Bypass : Counts the number of DRAM Activate commands sent on this channel. Activate commands a… 34 …"PublicDescription": "Counts the total number of DRAM Read CAS commands, w/ and w/o auto-pre, issu… 39 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre", 43 …"PublicDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM RD_CAS commands w/auto-pre : DRAM RD… 70 … "PublicDescription": "Counts the total of DRAM Read CAS commands issued due to an underfill", 75 "BriefDescription": "All DRAM write CAS commands issued", 79 …"PublicDescription": "Counts the total number of DRAM Write CAS commands issued, w/ and w/o auto-p… 84 "BriefDescription": "DRAM RD_CAS and WR_CAS Commands. : DRAM WR_CAS commands w/o auto-pre", [all …]
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| /kernel/linux/linux-6.6/tools/testing/selftests/kvm/x86_64/ |
| D | hyperv_features.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Tests for Hyper-V features enablement 18 * but to activate the feature it is sufficient to set it to a non-zero 27 bool write; member 47 GUEST_ASSERT(msr->idx); in guest_msr() 49 if (msr->write) in guest_msr() 50 vector = wrmsr_safe(msr->idx, msr->write_val); in guest_msr() 52 if (!vector && (!msr->write || !is_write_only_msr(msr->idx))) in guest_msr() 53 vector = rdmsr_safe(msr->idx, &msr_val); in guest_msr() 55 if (msr->fault_expected) in guest_msr() [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/arm/cortex-a510/ |
| D | cache.json | 102 …to prefetch. If the complex is configured with a per-complex L2 cache, this event does not count. … 105 …to prefetch. If the complex is configured with a per-complex L2 cache, this event does not count. … 108 …"PublicDescription": "L1 data cache refill due to prefetch. This event counts any linefills from t… 111 …"BriefDescription": "L1 data cache refill due to prefetch. This event counts any linefills from th… 114 …"PublicDescription": "L2 cache write streaming mode. This event counts for each cycle where the co… 117 …"BriefDescription": "L2 cache write streaming mode. This event counts for each cycle where the cor… 120 …PublicDescription": "L1 data cache entering write streaming mode. This event counts for each entry… 123 …"BriefDescription": "L1 data cache entering write streaming mode. This event counts for each entry… 126 …"PublicDescription": "L1 data cache write streaming mode. This event counts for each cycle where t… 129 …"BriefDescription": "L1 data cache write streaming mode. This event counts for each cycle where th… [all …]
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| /kernel/linux/linux-6.6/fs/ubifs/ |
| D | io.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2006-2008 Nokia Corporation. 14 * This file implements UBIFS I/O subsystem which provides various I/O-related 16 * write-buffering support. Write buffers help to save space which otherwise 17 * would have been wasted for padding to the nearest minimal I/O unit boundary. 18 * Instead, data first goes to the write-buffer and is flushed when the 20 * similar to the mechanism is used by JFFS2. 22 * UBIFS distinguishes between minimum write size (@c->min_io_size) and maximum 23 * write size (@c->max_write_size). The latter is the maximum amount of bytes 24 * the underlying flash is able to program at a time, and writing in [all …]
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| /kernel/linux/linux-5.10/fs/ubifs/ |
| D | io.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2006-2008 Nokia Corporation. 14 * This file implements UBIFS I/O subsystem which provides various I/O-related 16 * write-buffering support. Write buffers help to save space which otherwise 17 * would have been wasted for padding to the nearest minimal I/O unit boundary. 18 * Instead, data first goes to the write-buffer and is flushed when the 20 * similar to the mechanism is used by JFFS2. 22 * UBIFS distinguishes between minimum write size (@c->min_io_size) and maximum 23 * write size (@c->max_write_size). The latter is the maximum amount of bytes 24 * the underlying flash is able to program at a time, and writing in [all …]
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| /kernel/linux/linux-6.6/tools/testing/selftests/bpf/ |
| D | generate_udp_fragments.py | 2 # SPDX-License-Identifier: GPL-2.0 7 While it is technically possible to dynamically generate 8 fragmented packets in C, it is much harder to read and write 10 easy to read / write. 12 So we choose to write this script that generates a valid C 33 f.write("// SPDX-License-Identifier: GPL-2.0\n") 34 f.write("/* DO NOT EDIT -- this file is generated */\n") 35 f.write("\n") 36 f.write("#ifndef _IP_CHECK_DEFRAG_FRAGS_H\n") 37 f.write("#define _IP_CHECK_DEFRAG_FRAGS_H\n") [all …]
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| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/s390/cf_z14/ |
| D | extended.json | 3 "Unit": "CPU-M-CF", 6 "BriefDescription": "L1D Read-only Exclusive Writes", 7 …write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache bu… 10 "Unit": "CPU-M-CF", 17 "Unit": "CPU-M-CF", 21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this … 24 "Unit": "CPU-M-CF", 27 "BriefDescription": "DTLB2 One-Megabyte Page Writes", 28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page… 31 "Unit": "CPU-M-CF", [all …]
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| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/s390/cf_z14/ |
| D | extended.json | 3 "Unit": "CPU-M-CF", 6 "BriefDescription": "L1D Read-only Exclusive Writes", 7 …write to the Level-1 Data cache where the line was originally in a Read-Only state in the cache bu… 10 "Unit": "CPU-M-CF", 17 "Unit": "CPU-M-CF", 21 …data cache. Incremented by one for every TLB2 miss in progress for the Level-1 Data cache on this … 24 "Unit": "CPU-M-CF", 27 "BriefDescription": "DTLB2 One-Megabyte Page Writes", 28 … into the Combined Region and Segment Table Entry array in the Level-2 TLB for a one-megabyte page… 31 "Unit": "CPU-M-CF", [all …]
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