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/kernel/linux/linux-6.6/fs/
Dfs_pin.c1 // SPDX-License-Identifier: GPL-2.0
10 void pin_remove(struct fs_pin *pin) in pin_remove() argument
13 hlist_del_init(&pin->m_list); in pin_remove()
14 hlist_del_init(&pin->s_list); in pin_remove()
16 spin_lock_irq(&pin->wait.lock); in pin_remove()
17 pin->done = 1; in pin_remove()
18 wake_up_locked(&pin->wait); in pin_remove()
19 spin_unlock_irq(&pin->wait.lock); in pin_remove()
22 void pin_insert(struct fs_pin *pin, struct vfsmount *m) in pin_insert() argument
25 hlist_add_head(&pin->s_list, &m->mnt_sb->s_pins); in pin_insert()
[all …]
/kernel/linux/linux-5.10/fs/
Dfs_pin.c1 // SPDX-License-Identifier: GPL-2.0
10 void pin_remove(struct fs_pin *pin) in pin_remove() argument
13 hlist_del_init(&pin->m_list); in pin_remove()
14 hlist_del_init(&pin->s_list); in pin_remove()
16 spin_lock_irq(&pin->wait.lock); in pin_remove()
17 pin->done = 1; in pin_remove()
18 wake_up_locked(&pin->wait); in pin_remove()
19 spin_unlock_irq(&pin->wait.lock); in pin_remove()
22 void pin_insert(struct fs_pin *pin, struct vfsmount *m) in pin_insert() argument
25 hlist_add_head(&pin->s_list, &m->mnt_sb->s_pins); in pin_insert()
[all …]
/kernel/linux/linux-6.6/drivers/media/cec/core/
Dcec-pin-priv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cec-pin-priv.h - internal cec-pin header
13 #include <media/cec-pin.h>
15 #define call_pin_op(pin, op, arg...) \ argument
16 ((pin && pin->ops->op && !pin->adap->devnode.unregistered) ? \
17 pin->ops->op(pin->adap, ## arg) : 0)
19 #define call_void_pin_op(pin, op, arg...) \ argument
21 if (pin && pin->ops->op && \
22 !pin->adap->devnode.unregistered) \
23 pin->ops->op(pin->adap, ## arg); \
[all …]
Dcec-pin.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <media/cec-pin.h>
11 #include "cec-pin-priv.h"
61 /* Data bits are 0-7, EOM is bit 8 and ACK is bit 9 */
73 { "Tx Wait", CEC_TIM_SAMPLE },
74 { "Tx Wait for High", CEC_TIM_IDLE_SAMPLE },
76 { "Tx Start Bit High", CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW },
77 { "Tx Start Bit High Short", CEC_TIM_START_BIT_TOTAL_SHORT - CEC_TIM_START_BIT_LOW },
78 { "Tx Start Bit High Long", CEC_TIM_START_BIT_TOTAL_LONG - CEC_TIM_START_BIT_LOW },
82 { "Tx Data 0 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_0_LOW },
[all …]
Dcec-api.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cec-api.c - HDMI Consumer Electronics Control framework - API
21 #include <media/cec-pin.h>
22 #include "cec-priv.h"
23 #include "cec-pin-priv.h"
27 struct cec_fh *fh = filp->private_data; in cec_devnode_data()
29 return &fh->adap->devnode; in cec_devnode_data()
37 struct cec_fh *fh = filp->private_data; in cec_poll()
38 struct cec_adapter *adap = fh->adap; in cec_poll()
41 poll_wait(filp, &fh->wait, poll); in cec_poll()
[all …]
/kernel/linux/linux-5.10/drivers/media/cec/core/
Dcec-pin-priv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * cec-pin-priv.h - internal cec-pin header
13 #include <media/cec-pin.h>
25 /* Low-drive was detected, wait for bus to go high */
56 * Wait for start of sample time to check for Ack bit or first
60 /* Wait for end of bit period after sampling */
83 /* Wait for bit sample time */
85 /* Wait for earliest end of bit period after sampling */
87 /* Wait for CEC to go low (i.e. end of bit period) */
91 /* End of 0 Ack time, wait for earliest end of bit period */
[all …]
Dcec-pin.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <media/cec-pin.h>
11 #include "cec-pin-priv.h"
61 /* Data bits are 0-7, EOM is bit 8 and ACK is bit 9 */
73 { "Tx Wait", CEC_TIM_SAMPLE },
74 { "Tx Wait for High", CEC_TIM_IDLE_SAMPLE },
76 { "Tx Start Bit High", CEC_TIM_START_BIT_TOTAL - CEC_TIM_START_BIT_LOW },
77 { "Tx Start Bit High Short", CEC_TIM_START_BIT_TOTAL_SHORT - CEC_TIM_START_BIT_LOW },
78 { "Tx Start Bit High Long", CEC_TIM_START_BIT_TOTAL_LONG - CEC_TIM_START_BIT_LOW },
82 { "Tx Data 0 High", CEC_TIM_DATA_BIT_TOTAL - CEC_TIM_DATA_BIT_0_LOW },
[all …]
Dcec-api.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * cec-api.c - HDMI Consumer Electronics Control framework - API
21 #include <media/cec-pin.h>
22 #include "cec-priv.h"
23 #include "cec-pin-priv.h"
27 struct cec_fh *fh = filp->private_data; in cec_devnode_data()
29 return &fh->adap->devnode; in cec_devnode_data()
37 struct cec_fh *fh = filp->private_data; in cec_poll()
38 struct cec_adapter *adap = fh->adap; in cec_poll()
41 poll_wait(filp, &fh->wait, poll); in cec_poll()
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
30 stdout-path = "serial3:115200n8";
33 gpio-keys {
34 compatible = "gpio-keys";
35 pinctrl-names = "default";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos5250-snow-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/maxim,max77686.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/samsung-i2s.h>
27 stdout-path = "serial3:115200n8";
30 gpio-keys {
31 compatible = "gpio-keys";
32 pinctrl-names = "default";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dlantiq,pinctrl-xway.txt4 - compatible: "lantiq,pinctrl-xway", (DEPRECATED: Use "lantiq,pinctrl-danube")
5 "lantiq,pinctrl-xr9", (DEPRECATED: Use "lantiq,xrx100-pinctrl" or
6 "lantiq,xrx200-pinctrl")
7 "lantiq,pinctrl-ase", (DEPRECATED: Use "lantiq,ase-pinctrl")
8 "lantiq,<chip>-pinctrl", where <chip> is:
14 - reg: Should contain the physical address and length of the gpio/pinmux
17 Please refer to pinctrl-bindings.txt in this directory for details of the
19 phrase "pin configuration node".
21 Lantiq's pin configuration nodes act as a container for an arbitrary number of
23 pin, a group, or a list of pins or groups. This configuration can include the
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Domap-gpmc.txt7 - compatible: Should be set to one of the following:
9 ti,omap2420-gpmc (omap2420)
10 ti,omap2430-gpmc (omap2430)
11 ti,omap3430-gpmc (omap3430 & omap3630)
12 ti,omap4430-gpmc (omap4430 & omap4460 & omap543x)
13 ti,am3352-gpmc (am335x devices)
15 - reg: A resource specifier for the register space
17 - ti,hwmods: Should be set to "ti,gpmc" until the DT transition is
19 - #address-cells: Must be set to 2 to allow memory address translation
20 - #size-cells: Must be set to 1 to allow CS address passing
[all …]
/kernel/linux/linux-6.6/rust/kernel/sync/
Dcondvar.rs1 // SPDX-License-Identifier: GPL-2.0
13 /// Creates a [`CondVar`] initialiser with the given name and a newly-created lock class.
42 /// #[pin]
45 /// #[pin]
64 /// fn new_example() -> Result<Pin<Box<Example>>> {
66 /// value <- new_mutex!(0),
67 /// value_changed <- new_condvar!(),
72 /// [`struct wait_queue_head`]: ../../../include/linux/wait.h
75 #[pin]
79 /// self-referential, so it cannot be safely moved once it is initialised.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dlantiq,pinctrl-xway.txt4 - compatible: "lantiq,<chip>-pinctrl", where <chip> is:
10 - reg: Should contain the physical address and length of the gpio/pinmux
13 Please refer to pinctrl-bindings.txt in this directory for details of the
15 phrase "pin configuration node".
17 Lantiq's pin configuration nodes act as a container for an arbitrary number of
19 pin, a group, or a list of pins or groups. This configuration can include the
20 mux function to select on those group(s), and two pin configuration parameters:
21 pull-up and open-drain
27 other words, a subnode that lists a mux function but no pin configuration
28 parameters implies no information about any pin configuration parameters.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dti,gpmc-child.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc-child.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
24 gpmc,sync-clk-ps:
28 # Chip-select signal timings corresponding to GPMC_CONFIG2:
29 gpmc,cs-on-ns:
33 gpmc,cs-rd-off-ns:
[all …]
Dti,gpmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/ti,gpmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
11 - Roger Quadros <rogerq@kernel.org>
16 - Asynchronous SRAM-like memories and ASICs
17 - Asynchronous, synchronous, and page mode burst NOR flash
18 - NAND flash
19 - Pseudo-SRAM devices
[all …]
/kernel/linux/linux-6.6/drivers/md/bcache/
Djournal.c1 // SPDX-License-Identifier: GPL-2.0
20 * entries (same as garbage collection would), then we replay them - reinserting
30 struct closure *cl = bio->bi_private; in journal_read_endio()
38 struct journal_device *ja = &ca->journal; in journal_read_bucket()
39 struct bio *bio = &ja->bio; in journal_read_bucket()
42 struct jset *j, *data = ca->set->journal.w[0].data; in journal_read_bucket()
46 sector_t bucket = bucket_to_sector(ca->set, ca->sb.d[bucket_index]); in journal_read_bucket()
52 while (offset < ca->sb.bucket_size) { in journal_read_bucket()
53 reread: left = ca->sb.bucket_size - offset; in journal_read_bucket()
56 bio_reset(bio, ca->bdev, REQ_OP_READ); in journal_read_bucket()
[all …]
/kernel/linux/linux-5.10/drivers/md/bcache/
Djournal.c1 // SPDX-License-Identifier: GPL-2.0
20 * entries (same as garbage collection would), then we replay them - reinserting
30 struct closure *cl = bio->bi_private; in journal_read_endio()
38 struct journal_device *ja = &ca->journal; in journal_read_bucket()
39 struct bio *bio = &ja->bio; in journal_read_bucket()
42 struct jset *j, *data = ca->set->journal.w[0].data; in journal_read_bucket()
46 sector_t bucket = bucket_to_sector(ca->set, ca->sb.d[bucket_index]); in journal_read_bucket()
52 while (offset < ca->sb.bucket_size) { in journal_read_bucket()
53 reread: left = ca->sb.bucket_size - offset; in journal_read_bucket()
57 bio->bi_iter.bi_sector = bucket + offset; in journal_read_bucket()
[all …]
/kernel/linux/linux-6.6/tools/testing/selftests/mm/
Dcow.c1 // SPDX-License-Identifier: GPL-2.0-only
21 #include <sys/wait.h>
68 for (; size; addr += pagesize, size -= pagesize) in range_is_swapped()
81 if (pipe(comm_pipes->child_ready) < 0) in setup_comm_pipes()
82 return -errno; in setup_comm_pipes()
83 if (pipe(comm_pipes->parent_ready) < 0) { in setup_comm_pipes()
84 close(comm_pipes->child_ready[0]); in setup_comm_pipes()
85 close(comm_pipes->child_ready[1]); in setup_comm_pipes()
86 return -errno; in setup_comm_pipes()
94 close(comm_pipes->child_ready[0]); in close_comm_pipes()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_gmbus.c3 * Copyright © 2006-2008,2010 Intel Corporation
27 * Chris Wilson <chris@chris-wilson.co.uk>
31 #include <linux/i2c-algo-bit.h>
45 /* Map gmbus pin pairs to names and registers. */
93 /* pin is expected to be valid */
95 unsigned int pin) in get_gmbus_pin() argument
98 return &gmbus_pins_icp[pin]; in get_gmbus_pin()
100 return &gmbus_pins_cnp[pin]; in get_gmbus_pin()
102 return &gmbus_pins_bxt[pin]; in get_gmbus_pin()
104 return &gmbus_pins_skl[pin]; in get_gmbus_pin()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dcs42l42.txt5 - compatible : "cirrus,cs42l42"
7 - reg : the I2C address of the device for I2C.
9 - VP-supply, VCP-supply, VD_FILT-supply, VL-supply, VA-supply :
15 - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
18 - interrupts : IRQ line info CS42L42.
19 (See Documentation/devicetree/bindings/interrupt-controller/interrupts.txt
22 - cirrus,ts-inv : Boolean property. For jacks that invert the tip sense
23 polarity. Normal jacks will short tip sense pin to HS1 when headphones are
27 0 = (Default) Non-inverted
30 - cirrus,ts-dbnc-rise : Debounce the rising edge of TIP_SENSE_PLUG. With no
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/
Dintel_gmbus.c3 * Copyright © 2006-2008,2010 Intel Corporation
27 * Chris Wilson <chris@chris-wilson.co.uk>
31 #include <linux/i2c-algo-bit.h>
77 /* Map gmbus pin pairs to names and registers. */
153 unsigned int pin) in get_gmbus_pin() argument
187 if (pin >= size || !pins[pin].name) in get_gmbus_pin()
190 return &pins[pin]; in get_gmbus_pin()
193 bool intel_gmbus_is_valid_pin(struct drm_i915_private *i915, unsigned int pin) in intel_gmbus_is_valid_pin() argument
195 return get_gmbus_pin(i915, pin); in intel_gmbus_is_valid_pin()
239 struct drm_i915_private *i915 = bus->i915; in get_reserved()
[all …]
/kernel/linux/linux-6.6/drivers/mtd/nand/raw/
Dnand_legacy.c1 // SPDX-License-Identifier: GPL-2.0
4 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
23 * nand_read_byte - [DEFAULT] read one byte from the chip
30 return readb(chip->legacy.IO_ADDR_R); in nand_read_byte()
34 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
42 return (uint8_t) cpu_to_le16(readw(chip->legacy.IO_ADDR_R)); in nand_read_byte16()
46 * nand_select_chip - [DEFAULT] control CE line
48 * @chipnr: chipnumber to select, -1 for deselect
55 case -1: in nand_select_chip()
56 chip->legacy.cmd_ctrl(chip, NAND_CMD_NONE, in nand_select_chip()
[all …]
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Dnand_legacy.c1 // SPDX-License-Identifier: GPL-2.0
4 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
23 * nand_read_byte - [DEFAULT] read one byte from the chip
30 return readb(chip->legacy.IO_ADDR_R); in nand_read_byte()
34 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
42 return (uint8_t) cpu_to_le16(readw(chip->legacy.IO_ADDR_R)); in nand_read_byte16()
46 * nand_select_chip - [DEFAULT] control CE line
48 * @chipnr: chipnumber to select, -1 for deselect
55 case -1: in nand_select_chip()
56 chip->legacy.cmd_ctrl(chip, NAND_CMD_NONE, in nand_select_chip()
[all …]
/kernel/linux/linux-5.10/include/uapi/linux/
Dserial.h1 /* SPDX-License-Identifier: GPL-1.0+ WITH Linux-syscall-note */
32 unsigned short closing_wait; /* time to wait before closing */
41 * For the close wait times, 0 means wait forever for serial port to
42 * flush its output. 65535 means don't wait at all.
63 #define PORT_RSA 13 /* RSA-DV II/S card */
82 * Multiport serial configuration structure --- external structure
99 * Serial input interrupt line counters -- external structure
121 RTS pin when
124 RTS pin after sent*/

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