| /kernel/linux/linux-6.6/arch/powerpc/platforms/powernv/ |
| D | vas-debug.c | 32 struct pnv_vas_window *window = s->private; in info_show() local
36 /* ensure window is not unmapped */ in info_show()
37 if (!window->hvwc_map) in info_show()
40 seq_printf(s, "Type: %s, %s\n", cop_to_str(window->vas_win.cop), in info_show()
41 window->tx_win ? "Send" : "Receive"); in info_show()
42 seq_printf(s, "Pid : %d\n", vas_window_pid(&window->vas_win)); in info_show()
59 struct pnv_vas_window *window = s->private; in hvwc_show() local
63 /* ensure window is not unmapped */ in hvwc_show()
64 if (!window->hvwc_map) in hvwc_show()
67 print_reg(s, window, VREG(LPID)); in hvwc_show()
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| D | vas-window.c | 27 * Compute the paste address region for the window @window using the
30 void vas_win_paste_addr(struct pnv_vas_window *window, u64 *addr, int *len) in vas_win_paste_addr() argument
35 base = window->vinst->paste_base_addr; in vas_win_paste_addr()
36 shift = window->vinst->paste_win_id_shift; in vas_win_paste_addr()
37 winid = window->vas_win.winid; in vas_win_paste_addr()
46 static inline void get_hvwc_mmio_bar(struct pnv_vas_window *window, in get_hvwc_mmio_bar() argument
51 pbaddr = window->vinst->hvwc_bar_start; in get_hvwc_mmio_bar()
52 *start = pbaddr + window->vas_win.winid * VAS_HVWC_SIZE; in get_hvwc_mmio_bar()
56 static inline void get_uwc_mmio_bar(struct pnv_vas_window *window, in get_uwc_mmio_bar() argument
61 pbaddr = window->vinst->uwc_bar_start; in get_uwc_mmio_bar()
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| D | vas.h | 31 * Senders and receivers must each connect to a separate window before they
34 * Each window is described by two types of window contexts:
36 * Hypervisor Window Context (HVWC) of size VAS_HVWC_SIZE bytes
38 * OS/User Window Context (UWC) of size VAS_UWC_SIZE bytes.
40 * A window context can be viewed as a set of 64-bit registers. The settings
42 * hardware when messages are sent/received through the window. The registers
45 * the window.
61 * space (hvwc_map and uwc_map). The kernel can then access the window
62 * contexts of a specific window using:
67 * where winid is the window index (0..64K).
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/powernv/ |
| D | vas-debug.c | 31 struct vas_window *window = s->private; in info_show() local
35 /* ensure window is not unmapped */ in info_show()
36 if (!window->hvwc_map) in info_show()
39 seq_printf(s, "Type: %s, %s\n", cop_to_str(window->cop), in info_show()
40 window->tx_win ? "Send" : "Receive"); in info_show()
41 seq_printf(s, "Pid : %d\n", vas_window_pid(window)); in info_show()
58 struct vas_window *window = s->private; in hvwc_show() local
62 /* ensure window is not unmapped */ in hvwc_show()
63 if (!window->hvwc_map) in hvwc_show()
66 print_reg(s, window, VREG(LPID)); in hvwc_show()
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| D | vas-window.c | 26 * Compute the paste address region for the window @window using the
29 void vas_win_paste_addr(struct vas_window *window, u64 *addr, int *len) in vas_win_paste_addr() argument
34 base = window->vinst->paste_base_addr; in vas_win_paste_addr()
35 shift = window->vinst->paste_win_id_shift; in vas_win_paste_addr()
36 winid = window->winid; in vas_win_paste_addr()
45 static inline void get_hvwc_mmio_bar(struct vas_window *window, in get_hvwc_mmio_bar() argument
50 pbaddr = window->vinst->hvwc_bar_start; in get_hvwc_mmio_bar()
51 *start = pbaddr + window->winid * VAS_HVWC_SIZE; in get_hvwc_mmio_bar()
55 static inline void get_uwc_mmio_bar(struct vas_window *window, in get_uwc_mmio_bar() argument
60 pbaddr = window->vinst->uwc_bar_start; in get_uwc_mmio_bar()
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| D | vas.h | 31 * Senders and receivers must each connect to a separate window before they
34 * Each window is described by two types of window contexts:
36 * Hypervisor Window Context (HVWC) of size VAS_HVWC_SIZE bytes
38 * OS/User Window Context (UWC) of size VAS_UWC_SIZE bytes.
40 * A window context can be viewed as a set of 64-bit registers. The settings
42 * hardware when messages are sent/received through the window. The registers
45 * the window.
61 * space (hvwc_map and uwc_map). The kernel can then access the window
62 * contexts of a specific window using:
67 * where winid is the window index (0..64K).
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| D | vas-fault.c | 21 * The maximum FIFO size for fault window can be 8MB
23 * instance will be having fault window.
62 static void update_csb(struct vas_window *window, in update_csb() argument
76 if (WARN_ON_ONCE(!window->mm || !window->user_win)) in update_csb()
95 pid = window->pid; in update_csb()
98 * Process closes send window after all pending NX requests are in update_csb()
100 * open a window and can exit without closing it. May be some in update_csb()
101 * requests are pending or this window can be used by other in update_csb()
105 * invalid, send SEGV signal to pid saved in window. If the in update_csb()
107 * Parent thread (tgid) will close this window upon its exit. in update_csb()
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| /kernel/linux/linux-5.10/drivers/mtd/maps/ |
| D | ichxrom.c | 57 static void ichxrom_cleanup(struct ichxrom_window *window) in ichxrom_cleanup() argument
63 /* Disable writes through the rom window */ in ichxrom_cleanup()
64 ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word); in ichxrom_cleanup()
66 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); in ichxrom_cleanup()
67 pci_dev_put(window->pdev); in ichxrom_cleanup()
70 list_for_each_entry_safe(map, scratch, &window->maps, list) { in ichxrom_cleanup()
78 if (window->rsrc.parent) in ichxrom_cleanup()
79 release_resource(&window->rsrc); in ichxrom_cleanup()
80 if (window->virt) { in ichxrom_cleanup()
81 iounmap(window->virt); in ichxrom_cleanup()
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| D | amd76xrom.c | 48 /* The 2 bits controlling the window size are often set to allow reading
56 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
57 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
58 * 64KiB window.
63 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x43 byte, normally set by BIOS.…
69 static void amd76xrom_cleanup(struct amd76xrom_window *window) in amd76xrom_cleanup() argument
74 if (window->pdev) { in amd76xrom_cleanup()
75 /* Disable writes through the rom window */ in amd76xrom_cleanup()
76 pci_read_config_byte(window->pdev, 0x40, &byte); in amd76xrom_cleanup()
77 pci_write_config_byte(window->pdev, 0x40, byte & ~1); in amd76xrom_cleanup()
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| D | ck804xrom.c | 54 * The 2 bits controlling the window size are often set to allow reading
62 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
63 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
64 * 64KiB window.
67 * The 15 bits controlling the window size are distributed as follows:
71 * If all bits are enabled, we have a 16? MiB window
76 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override, normally set by BIOS.");
82 static void ck804xrom_cleanup(struct ck804xrom_window *window) in ck804xrom_cleanup() argument
87 if (window->pdev) { in ck804xrom_cleanup()
88 /* Disable writes through the rom window */ in ck804xrom_cleanup()
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| D | esb2rom.c | 118 static void esb2rom_cleanup(struct esb2rom_window *window) in esb2rom_cleanup() argument
123 /* Disable writes through the rom window */ in esb2rom_cleanup()
124 pci_read_config_byte(window->pdev, BIOS_CNTL, &byte); in esb2rom_cleanup()
125 pci_write_config_byte(window->pdev, BIOS_CNTL, in esb2rom_cleanup()
129 list_for_each_entry_safe(map, scratch, &window->maps, list) { in esb2rom_cleanup()
137 if (window->rsrc.parent) in esb2rom_cleanup()
138 release_resource(&window->rsrc); in esb2rom_cleanup()
139 if (window->virt) { in esb2rom_cleanup()
140 iounmap(window->virt); in esb2rom_cleanup()
141 window->virt = NULL; in esb2rom_cleanup()
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| /kernel/linux/linux-6.6/drivers/mtd/maps/ |
| D | ichxrom.c | 57 static void ichxrom_cleanup(struct ichxrom_window *window) in ichxrom_cleanup() argument
63 /* Disable writes through the rom window */ in ichxrom_cleanup()
64 ret = pci_read_config_word(window->pdev, BIOS_CNTL, &word); in ichxrom_cleanup()
66 pci_write_config_word(window->pdev, BIOS_CNTL, word & ~1); in ichxrom_cleanup()
67 pci_dev_put(window->pdev); in ichxrom_cleanup()
70 list_for_each_entry_safe(map, scratch, &window->maps, list) { in ichxrom_cleanup()
78 if (window->rsrc.parent) in ichxrom_cleanup()
79 release_resource(&window->rsrc); in ichxrom_cleanup()
80 if (window->virt) { in ichxrom_cleanup()
81 iounmap(window->virt); in ichxrom_cleanup()
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| D | amd76xrom.c | 48 /* The 2 bits controlling the window size are often set to allow reading
56 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
57 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
58 * 64KiB window.
63 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x43 byte, normally set by BIOS.…
69 static void amd76xrom_cleanup(struct amd76xrom_window *window) in amd76xrom_cleanup() argument
74 if (window->pdev) { in amd76xrom_cleanup()
75 /* Disable writes through the rom window */ in amd76xrom_cleanup()
76 pci_read_config_byte(window->pdev, 0x40, &byte); in amd76xrom_cleanup()
77 pci_write_config_byte(window->pdev, 0x40, byte & ~1); in amd76xrom_cleanup()
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| D | ck804xrom.c | 54 * The 2 bits controlling the window size are often set to allow reading
62 * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
63 * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
64 * 64KiB window.
67 * The 15 bits controlling the window size are distributed as follows:
71 * If all bits are enabled, we have a 16? MiB window
76 MODULE_PARM_DESC(win_size_bits, "ROM window size bits override, normally set by BIOS.");
82 static void ck804xrom_cleanup(struct ck804xrom_window *window) in ck804xrom_cleanup() argument
87 if (window->pdev) { in ck804xrom_cleanup()
88 /* Disable writes through the rom window */ in ck804xrom_cleanup()
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| D | esb2rom.c | 118 static void esb2rom_cleanup(struct esb2rom_window *window) in esb2rom_cleanup() argument
123 /* Disable writes through the rom window */ in esb2rom_cleanup()
124 pci_read_config_byte(window->pdev, BIOS_CNTL, &byte); in esb2rom_cleanup()
125 pci_write_config_byte(window->pdev, BIOS_CNTL, in esb2rom_cleanup()
129 list_for_each_entry_safe(map, scratch, &window->maps, list) { in esb2rom_cleanup()
137 if (window->rsrc.parent) in esb2rom_cleanup()
138 release_resource(&window->rsrc); in esb2rom_cleanup()
139 if (window->virt) { in esb2rom_cleanup()
140 iounmap(window->virt); in esb2rom_cleanup()
141 window->virt = NULL; in esb2rom_cleanup()
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| /kernel/linux/linux-6.6/arch/sparc/kernel/ |
| D | wuf.S | 3 * wuf.S: Window underflow trap handler for the Sparc.
53 * 1 2 3 4 <-- Window number
57 * O == the window that execution was in when
61 * window
63 * W == this window is the one which is now invalid
67 * I == this window will be the invalid one when we
73 /* On 7-window Sparc the boot code patches fnwin_patch1
83 /* LOCATION: Window 'T' */
86 * the proper window off of the stack.
93 wr %twin_tmp1, 0x0, %wim /* Make window 'I' invalid */
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| D | wof.S | 3 * wof.S: Sparc window overflow handler.
29 * accessed when in the 'trap' window, 'G' means
30 * accessible in any window. Do not change these registers
43 #define twin_tmp l4 /* Temp reg, only usable in trap window T */
49 /* On a 7-window Sparc the boot code patches spnwin_*
74 /* LOCATION: Trap Window */
80 * window properly in this trap handler.
105 /* Save into the window which must be saved and do it.
110 save %g0, %g0, %g0 ! save into the window to stash away
114 /* LOCATION: Window to be saved */
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| D | etrap_32.S | 3 * etrap.S: Sparc trap window preparation for entry into the
33 /* SEVEN WINDOW PATCH INSTRUCTIONS */
54 * to call c-code and the trap cannot be handled in-window)
62 /* 2 3 4 window number
66 * O == Current window before trap
67 * T == Window entered when trap occurred
68 * S == Window we will need to save if (1<<T) == %wim
79 /* Calculate mask of trap window. See if from user
93 /* See if we are in the trap window. */
95 bne trap_setup_kernel_spill ! in trap window, clean up
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| /kernel/linux/linux-5.10/arch/sparc/kernel/ |
| D | wuf.S | 3 * wuf.S: Window underflow trap handler for the Sparc.
53 * 1 2 3 4 <-- Window number
57 * O == the window that execution was in when
61 * window
63 * W == this window is the one which is now invalid
67 * I == this window will be the invalid one when we
73 /* On 7-window Sparc the boot code patches fnwin_patch1
83 /* LOCATION: Window 'T' */
86 * the proper window off of the stack.
93 wr %twin_tmp1, 0x0, %wim /* Make window 'I' invalid */
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| D | wof.S | 3 * wof.S: Sparc window overflow handler.
29 * accessed when in the 'trap' window, 'G' means
30 * accessible in any window. Do not change these registers
43 #define twin_tmp l4 /* Temp reg, only usable in trap window T */
49 /* On a 7-window Sparc the boot code patches spnwin_*
74 /* LOCATION: Trap Window */
80 * window properly in this trap handler.
105 /* Save into the window which must be saved and do it.
110 save %g0, %g0, %g0 ! save into the window to stash away
114 /* LOCATION: Window to be saved */
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| D | etrap_32.S | 3 * etrap.S: Sparc trap window preparation for entry into the
33 /* SEVEN WINDOW PATCH INSTRUCTIONS */
54 * to call c-code and the trap cannot be handled in-window)
62 /* 2 3 4 window number
66 * O == Current window before trap
67 * T == Window entered when trap occurred
68 * S == Window we will need to save if (1<<T) == %wim
79 /* Calculate mask of trap window. See if from user
93 /* See if we are in the trap window. */
95 bne trap_setup_kernel_spill ! in trap window, clean up
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| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| D | vas.h | 33 * VAS window Linux status bits
37 /* Window is closed in the hypervisor due to lost credit */
39 /* Window is closed due to migration */
66 * Stores pid, mm, and tgid for each window.
78 * Common VAS window struct on PowerNV and PowerVM
82 u32 wcreds_max; /* Window credits */
83 u32 status; /* Window status used in OS */
91 * User space window operations used for powernv and powerVM
119 * if process / thread has any open VAS window (Use in vas_user_win_add_mm_context()
126 * Receive window attributes specified by the (in-kernel) owner of window.
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | vas.h | 52 * Receive window attributes specified by the (in-kernel) owner of window.
82 * Window attributes specified by the in-kernel owner of a send window.
113 * Helper to initialize receive window attributes to defaults for an
114 * NX window.
119 * Open a VAS receive window for the instance of VAS identified by @vasid
120 * Use @attr to initialize the attributes of the window.
122 * Return a handle to the window or ERR_PTR() on error.
128 * Helper to initialize send window attributes to defaults for an NX window.
134 * Open a VAS send window for the instance of VAS identified by @vasid
136 * of the window.
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| /kernel/linux/linux-6.6/arch/powerpc/platforms/cell/ |
| D | iommu.c | 125 * - on bus setup, look for a matching window, or create one
162 struct iommu_window *window = in tce_build_cell() local
180 (window->ioid & CBE_IOPTE_IOID_Mask); in tce_build_cell()
183 CBE_IOPTE_SO_RW | (window->ioid & CBE_IOPTE_IOID_Mask); in tce_build_cell()
195 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_build_cell()
207 struct iommu_window *window = in tce_free_cell() local
218 __pa(window->iommu->pad_page) | in tce_free_cell()
219 (window->ioid & CBE_IOPTE_IOID_Mask); in tce_free_cell()
229 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_free_cell()
431 struct iommu_window *window;
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| /kernel/linux/linux-5.10/arch/powerpc/platforms/cell/ |
| D | iommu.c | 123 * - on bus setup, look for a matching window, or create one
160 struct iommu_window *window = in tce_build_cell() local
178 (window->ioid & CBE_IOPTE_IOID_Mask); in tce_build_cell()
181 CBE_IOPTE_SO_RW | (window->ioid & CBE_IOPTE_IOID_Mask); in tce_build_cell()
193 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_build_cell()
205 struct iommu_window *window = in tce_free_cell() local
216 __pa(window->iommu->pad_page) | in tce_free_cell()
217 (window->ioid & CBE_IOPTE_IOID_Mask); in tce_free_cell()
227 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_free_cell()
429 struct iommu_window *window;
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