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/kernel/linux/linux-6.6/scripts/
Dmarkup_oops.pl2 # SPDX-License-Identifier: GPL-2.0-only
22 'cross-compile|c=s' => \$cross_compile,
28 my $kerver = `uname -r`;
49 if ($line =~ /EAX: ([0-9a-f]+) EBX: ([0-9a-f]+) ECX: ([0-9a-f]+) EDX: ([0-9a-f]+)/) {
55 if ($line =~ /ESI: ([0-9a-f]+) EDI: ([0-9a-f]+) EBP: ([0-9a-f]+) ESP: ([0-9a-f]+)/) {
60 if ($line =~ /RAX: ([0-9a-f]+) RBX: ([0-9a-f]+) RCX: ([0-9a-f]+)/) {
65 if ($line =~ /RDX: ([0-9a-f]+) RSI: ([0-9a-f]+) RDI: ([0-9a-f]+)/) {
70 if ($line =~ /RBP: ([0-9a-f]+) R08: ([0-9a-f]+) R09: ([0-9a-f]+)/) {
74 if ($line =~ /R10: ([0-9a-f]+) R11: ([0-9a-f]+) R12: ([0-9a-f]+)/) {
79 if ($line =~ /R13: ([0-9a-f]+) R14: ([0-9a-f]+) R15: ([0-9a-f]+)/) {
[all …]
/kernel/linux/linux-5.10/scripts/
Dmarkup_oops.pl2 # SPDX-License-Identifier: GPL-2.0-only
22 'cross-compile|c=s' => \$cross_compile,
28 my $kerver = `uname -r`;
49 if ($line =~ /EAX: ([0-9a-f]+) EBX: ([0-9a-f]+) ECX: ([0-9a-f]+) EDX: ([0-9a-f]+)/) {
55 if ($line =~ /ESI: ([0-9a-f]+) EDI: ([0-9a-f]+) EBP: ([0-9a-f]+) ESP: ([0-9a-f]+)/) {
60 if ($line =~ /RAX: ([0-9a-f]+) RBX: ([0-9a-f]+) RCX: ([0-9a-f]+)/) {
65 if ($line =~ /RDX: ([0-9a-f]+) RSI: ([0-9a-f]+) RDI: ([0-9a-f]+)/) {
70 if ($line =~ /RBP: ([0-9a-f]+) R08: ([0-9a-f]+) R09: ([0-9a-f]+)/) {
74 if ($line =~ /R10: ([0-9a-f]+) R11: ([0-9a-f]+) R12: ([0-9a-f]+)/) {
79 if ($line =~ /R13: ([0-9a-f]+) R14: ([0-9a-f]+) R15: ([0-9a-f]+)/) {
[all …]
/kernel/liteos_m/testsuites/sample/kernel/mem/
DIt_los_mem_036.c2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
42 void *f0 = NULL; in TestCase() local
54 for (p0 = LOS_MemAlloc(g_memPool, size), f0 = p0; p0 != NULL; i++) { in TestCase()
55 if ((sizeadd += 1) == 9) { // 9, the limit of sizeadd. in TestCase()
69 ret = LOS_MemFree(g_memPool, f0); in TestCase()
70 f0 = (void *)((char *)f0 + ((UINT32)size + LOS_DLNK_NODE_HEAD_SIZE)); in TestCase()
72 if ((sizeadd += 1) == 9) { // 9, the limit of sizeadd. in TestCase()
89 f0 = p0; in TestCase()
[all …]
DIt_los_mem_037.c2 * Copyright (c) 2013-2019 Huawei Technologies Co., Ltd. All rights reserved.
3 * Copyright (c) 2020-2021 Huawei Device Co., Ltd. All rights reserved.
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
42 void *f0 = NULL; in TestCase() local
56 …f0 = LOS_MemRealloc(g_memPool, p0, size / 2); // 2, The reallocated memory is half of its previous… in TestCase()
57 ICUNIT_GOTO_NOT_EQUAL(f0, NULL, count, EXIT); in TestCase()
59 …f0 = LOS_MemRealloc(g_memPool, p0, size * 2); // 2, The reallocated memory is 2 times of its previ… in TestCase()
60 ICUNIT_GOTO_NOT_EQUAL(f0, NULL, count, EXIT); in TestCase()
62 ret = LOS_MemFree(g_memPool, f0); in TestCase()
74 …f0 = LOS_MemRealloc(g_memPool, p0, size / 2); // 2, The reallocated memory is half of its previous… in TestCase()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/
Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/
Dethernet-phy.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
14 # The dt-schema tools will generate a select statement first by using
21 pattern: "^ethernet-phy(@[a-f0-9]+)?$"
24 - $nodename
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dbrcm,cru.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rafał Miłecki <rafal@milecki.pl>
13 Broadcom CRU ("Clock and Reset Unit" or "Central Resource Unit") is a hardware
20 - enum:
21 - brcm,ns-cru
22 - const: simple-mfd
29 "#address-cells":
32 "#size-cells":
[all …]
Dbrcm,twd.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom's Timer-Watchdog (aka TWD)
10 - Rafał Miłecki <rafal@milecki.pl>
13 Broadcom has a Timer-Watchdog block used in multiple SoCs (e.g., BCM4908,
15 registers layout). This block consists of: timers, watchdog and optionally a
21 - enum:
22 - brcm,bcm4908-twd
23 - brcm,bcm7038-twd
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/ti/
Dti,pruss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/ti/
Dti,pruss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Ddenali,nand.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - altr,socfpga-denali-nand
16 - socionext,uniphier-denali-nand-v5a
17 - socionext,uniphier-denali-nand-v5b
19 reg-names:
25 - const: nand_data
26 - const: denali_reg
[all …]
Dmediatek,mtk-nfc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xiangsheng Hou <xiangsheng.hou@mediatek.com>
15 - mediatek,mt2701-nfc
16 - mediatek,mt2712-nfc
17 - mediatek,mt7622-nfc
21 - description: Base physical address and size of NFI.
25 - description: NFI interrupt
[all …]
Dqcom,nandc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
26 - description: Core Clock
[all …]
/kernel/linux/linux-6.6/arch/sparc/lib/
Dcopy_page.S1 /* SPDX-License-Identifier: GPL-2.0 */
16 /* What we used to do was lock a TLB entry into a specific
20 * we had to keep interrupts disabled for a long time.
23 * and this makes the cpu choose a slot all by itself.
24 * Then we do a normal TLB flush on exit. We need only
63 and %o2, %o3, %o0 ! vaddr D-cache alias bit
91 ba,pt %xcc, 9f
97 sethi %hi((PAGE_SIZE/64)-2), %o2
100 or %o2, %lo((PAGE_SIZE/64)-2), %o2
104 ldd [%o1 + 0x000], %f0
[all …]
/kernel/linux/linux-5.10/arch/sparc/lib/
Dcopy_page.S1 /* SPDX-License-Identifier: GPL-2.0 */
16 /* What we used to do was lock a TLB entry into a specific
20 * we had to keep interrupts disabled for a long time.
23 * and this makes the cpu choose a slot all by itself.
24 * Then we do a normal TLB flush on exit. We need only
63 and %o2, %o3, %o0 ! vaddr D-cache alias bit
91 ba,pt %xcc, 9f
97 sethi %hi((PAGE_SIZE/64)-2), %o2
100 or %o2, %lo((PAGE_SIZE/64)-2), %o2
104 ldd [%o1 + 0x000], %f0
[all …]
/kernel/linux/linux-6.6/tools/perf/
Dperf-iostat.sh2 # SPDX-License-Identifier: GPL-2.0
6 if [[ "$1" == "list" ]] || [[ "$1" =~ ([a-f0-9A-F]{1,}):([a-f0-9A-F]{1,2})(,)? ]]; then
12 perf stat --iostat$DELIMITER$*
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Ddenali,nand.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
15 - altr,socfpga-denali-nand
16 - socionext,uniphier-denali-nand-v5a
17 - socionext,uniphier-denali-nand-v5b
19 reg-names:
25 - const: nand_data
26 - const: denali_reg
[all …]
/kernel/linux/linux-6.6/arch/sparc/crypto/
Dcamellia_asm.S1 /* SPDX-License-Identifier: GPL-2.0 */
36 ld [%o0 + 0x00], %f0 ! i0, k[0]
40 std %f0, [%o1 + 0x00] ! k[0, 1]
41 fsrc2 %f0, %f28
47 ld [%o0 + 0x10], %f0
49 std %f0, [%o1 + 0x20] ! k[8, 9]
52 be,a 1f
53 fxor %f10, %f0, %f2
58 fxor %f28, %f0, %f0
72 fxor %f28, %f0, %f0
[all …]
/kernel/linux/linux-5.10/arch/sparc/crypto/
Dcamellia_asm.S1 /* SPDX-License-Identifier: GPL-2.0 */
36 ld [%o0 + 0x00], %f0 ! i0, k[0]
40 std %f0, [%o1 + 0x00] ! k[0, 1]
41 fsrc2 %f0, %f28
47 ld [%o0 + 0x10], %f0
49 std %f0, [%o1 + 0x20] ! k[8, 9]
52 be,a 1f
53 fxor %f10, %f0, %f2
58 fxor %f28, %f0, %f0
72 fxor %f28, %f0, %f0
[all …]
/kernel/liteos_m/arch/risc-v/nuclei/gcc/nmsis/Core/Include/
Dcore_feature_fpu.h4 * SPDX-License-Identifier: Apache-2.0
8 * You may obtain a copy of the License at
10 * www.apache.org/licenses/LICENSE-2.0
39 * \brief Functions that related to the RISC-V FPU (F and D extension).
42 * Nuclei provided floating point unit by RISC-V F and D extension.
43 * * `F extension` adds single-precision floating-point computational
44 * instructions compliant with the IEEE 754-2008 arithmetic standard, __RISCV_FLEN = 32.
45 * The F extension adds 32 floating-point registers, f0-f31, each 32 bits wide,
46 * and a floating-point control and status register fcsr, which contains the
47 * operating mode and exception status of the floating-point unit.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/timer/
Dingenic,tcu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 For a description of the TCU hardware and drivers, have a look at
11 Documentation/arch/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4760-tcu
24 - ingenic,jz4760b-tcu
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/timer/
Dingenic,tcu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 For a description of the TCU hardware and drivers, have a look at
11 Documentation/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4770-tcu
24 - ingenic,jz4780-tcu
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dingenic,cgu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
11 typically includes a variety of PLLs, multiplexers, dividers & gates in order
16 - Paul Cercueil <paul@crapouillou.net>
23 - ingenic,jz4740-cgu
24 - ingenic,jz4725b-cgu
25 - ingenic,jz4755-cgu
26 - ingenic,jz4760-cgu
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/fsl/
Dfsl,ifc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/fsl/fsl,ifc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Li Yang <leoyang.li@nxp.com>
17 SRAM and other memories where address and data are shared on a bus.
21 pattern: "^memory-controller@[0-9a-f]+$"
26 "#address-cells":
32 "#size-cells":
49 little-endian:
[all …]
/kernel/linux/linux-5.10/arch/mips/kernel/
Dr2300_fpu.S8 * Multi-arch abstraction and asm macros for easier reading:
20 #include <asm/asm-offsets.h>
23 #define EX(a,b) \ argument
24 9: a,##b; \
25 .section __ex_table,"a"; \
26 PTR 9b,fault; \
29 #define EX2(a,b) \ argument
30 9: a,##b; \
31 .section __ex_table,"a"; \
32 PTR 9b,fault; \
[all …]

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