| /kernel/linux/linux-6.6/arch/x86/crypto/ |
| D | sha512-avx2-asm.S | 2 # Implement fast SHA-512 with AVX2 instructions. (x86_64)
12 # This software is available to you under a choice of one of two
22 # - Redistributions of source code must retain the above
26 # - Redistributions in binary form must reproduce the above
33 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
42 # This code is described in an Intel White-Paper:
43 # "Fast SHA-512 Implementations on Intel Architecture Processors"
49 # This code schedules 1 blocks at a time, with 4 lanes per block
52 #include <linux/linkage.h>
53 #include <linux/cfi_types.h>
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| D | sha256-avx2-asm.S | 2 # Implement fast SHA-256 with AVX2 instructions. (x86_64)
11 # This software is available to you under a choice of one of two
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
48 # This code schedules 2 blocks at a time, with 4 lanes per block
51 #include <linux/linkage.h>
52 #include <linux/cfi_types.h>
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| D | sha256-avx-asm.S | 2 # Implement fast SHA-256 with AVX1 instructions. (x86_64)
11 # This software is available to you under a choice of one of two
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 # This code is described in an Intel White-Paper:
41 # "Fast SHA-256 Implementations on Intel Architecture Processors"
47 # This code schedules 1 block at a time, with 4 lanes per block
50 #include <linux/linkage.h>
51 #include <linux/cfi_types.h>
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| D | sha256-ssse3-asm.S | 2 # Implement fast SHA-256 with SSSE3 instructions. (x86_64)
11 # This software is available to you under a choice of one of two
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
49 #include <linux/linkage.h>
50 #include <linux/cfi_types.h>
58 # Add reg to mem using reg-mem add and store
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| D | sm3-avx-asm_64.S | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * specified in: https://datatracker.ietf.org/doc/html/draft-sca-cfrg-sm3-02
14 #include <linux/linkage.h>
15 #include <linux/cfi_types.h>
16 #include <asm/frame.h>
34 #define K1 -208106958 /* 0xf3988a32 */
35 #define K2 -416213915 /* 0xe7311465 */
36 #define K3 -832427829 /* 0xce6228cb */
37 #define K4 -1664855657 /* 0x9cc45197 */
40 #define K7 -433943364 /* 0xe6228cbc */
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| /kernel/linux/linux-5.10/arch/x86/crypto/ |
| D | sha512-avx2-asm.S | 2 # Implement fast SHA-512 with AVX2 instructions. (x86_64)
12 # This software is available to you under a choice of one of two
22 # - Redistributions of source code must retain the above
26 # - Redistributions in binary form must reproduce the above
33 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
42 # This code is described in an Intel White-Paper:
43 # "Fast SHA-512 Implementations on Intel Architecture Processors"
49 # This code schedules 1 blocks at a time, with 4 lanes per block
52 #include <linux/linkage.h>
86 a = %rax define
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| D | sha256-avx2-asm.S | 2 # Implement fast SHA-256 with AVX2 instructions. (x86_64)
11 # This software is available to you under a choice of one of two
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
48 # This code schedules 2 blocks at a time, with 4 lanes per block
51 #include <linux/linkage.h>
59 # Add reg to mem using reg-mem add and store
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| D | sha256-avx-asm.S | 2 # Implement fast SHA-256 with AVX1 instructions. (x86_64)
11 # This software is available to you under a choice of one of two
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
40 # This code is described in an Intel White-Paper:
41 # "Fast SHA-256 Implementations on Intel Architecture Processors"
47 # This code schedules 1 block at a time, with 4 lanes per block
50 #include <linux/linkage.h>
58 # Add reg to mem using reg-mem add and store
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| D | sha256-ssse3-asm.S | 2 # Implement fast SHA-256 with SSSE3 instructions. (x86_64)
11 # This software is available to you under a choice of one of two
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
32 # MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
49 #include <linux/linkage.h>
57 # Add reg to mem using reg-mem add and store
86 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
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| /kernel/linux/linux-6.6/crypto/ |
| D | sm3.c | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * SM3 secure hash, as specified by OSCCA GM/T 0004-2012 SM3 and described
4 * at https://datatracker.ietf.org/doc/html/draft-sca-cfrg-sm3-02
7 * Copyright (C) 2017 Gilad Ben-Yossef <gilad@benyossef.com>
11 #include <linux/module.h>
12 #include <asm/unaligned.h>
13 #include <crypto/sm3.h>
35 * Transform the message X which consists of 16 32-bit-words. See
36 * GM/T 004-2012 for details.
38 #define R(i, a, b, c, d, e, f, g, h, t, w1, w2) \ argument
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| /kernel/linux/linux-5.10/lib/crypto/ |
| D | sha256.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SHA-256, as specified in
4 * http://csrc.nist.gov/groups/STM/cavp/documents/shs/sha256-384-512.pdf
6 * SHA-256 code by Jean-Luc Cooke <jlcooke@certainkey.com>.
8 * Copyright (c) Jean-Luc Cooke <jlcooke@certainkey.com>
14 #include <linux/bitops.h>
15 #include <linux/export.h>
16 #include <linux/module.h>
17 #include <linux/string.h>
18 #include <crypto/sha.h>
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| /kernel/linux/linux-6.6/drivers/media/pci/zoran/ |
| D | videocodec.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * bound to a master device.
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/init.h>
14 #include <linux/types.h>
15 #include <linux/slab.h>
17 #include "videocodec.h"
39 struct codec_list *h = codeclist_top; in videocodec_attach() local
41 struct attached_list *a, *ptr; in videocodec_attach() local
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| /kernel/linux/linux-5.10/drivers/staging/media/zoran/ |
| D | videocodec.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * bound to a master device.
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/types.h>
17 #include <linux/slab.h>
22 #include <linux/proc_fs.h>
23 #include <linux/seq_file.h>
24 #include <linux/uaccess.h>
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| /kernel/linux/linux-5.10/arch/arm64/crypto/ |
| D | sha512-core.S_shipped | 1 // SPDX-License-Identifier: GPL-2.0
11 // Copyright 2014-2016 The OpenSSL Project Authors. All Rights Reserved.
14 // this file except in compliance with the License. You can obtain a copy
30 // SHA256-hw SHA256(*) SHA512
31 // Apple A7 1.97 10.5 (+33%) 6.73 (-1%(**))
32 // Cortex-A53 2.38 15.5 (+115%) 10.0 (+150%(***))
33 // Cortex-A57 2.31 11.6 (+86%) 7.51 (+260%(***))
35 // X-Gene 20.0 (+100%) 12.8 (+300%(***))
40 // (**) The result is a trade-off: it's possible to improve it by
42 // on Cortex-A53 (or by 4 cycles per round).
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/include/nvif/ |
| D | device.h | 1 /* SPDX-License-Identifier: MIT */
5 #include <nvif/object.h>
6 #include <nvif/cl0080.h>
7 #include <nvif/user.h>
27 #include <subdev/bios.h>
28 #include <subdev/fb.h>
29 #include <subdev/bar.h>
30 #include <subdev/gpio.h>
31 #include <subdev/clk.h>
32 #include <subdev/i2c.h>
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/include/nvif/ |
| D | device.h | 1 /* SPDX-License-Identifier: MIT */
5 #include <nvif/object.h>
6 #include <nvif/cl0080.h>
7 #include <nvif/user.h>
27 #include <subdev/bios.h>
28 #include <subdev/fb.h>
29 #include <subdev/bar.h>
30 #include <subdev/gpio.h>
31 #include <subdev/clk.h>
32 #include <subdev/i2c.h>
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| /kernel/linux/linux-6.6/arch/s390/kernel/ |
| D | compat_linux.c | 1 // SPDX-License-Identifier: GPL-2.0
11 * Heavily inspired by the 32-bit Sparc compat code which is
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/fs.h>
21 #include <linux/mm.h>
22 #include <linux/file.h>
23 #include <linux/signal.h>
24 #include <linux/resource.h>
25 #include <linux/times.h>
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| /kernel/linux/linux-5.10/arch/s390/kernel/ |
| D | compat_linux.c | 1 // SPDX-License-Identifier: GPL-2.0
11 * Heavily inspired by the 32-bit Sparc compat code which is
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/fs.h>
21 #include <linux/mm.h>
22 #include <linux/file.h>
23 #include <linux/signal.h>
24 #include <linux/resource.h>
25 #include <linux/times.h>
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| /kernel/linux/linux-6.6/tools/include/nolibc/ |
| D | nolibc.h | 1 /* SPDX-License-Identifier: LGPL-2.1 OR MIT */
2 /* nolibc.h
3 * Copyright (C) 2017-2018 Willy Tarreau <w@1wt.eu>
7 * This file is designed to be used as a libc alternative for minimal programs
8 * with very limited requirements. It consists of a small number of syscall and
14 * - The lower level is the arch-specific syscall() definition, consisting in
17 * are castto a long stored in a register. These expressions always return
18 * the syscall's return value as a signed long value which is often either
19 * a pointer or the negated errno value.
21 * - The second level is mostly architecture-independent. It is made of
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| /kernel/linux/linux-6.6/Documentation/staging/ |
| D | lzo.rst | 8 This is not a specification. No specification seems to be publicly available
20 The stream is composed of a series of instructions, operands, and data. The
21 instructions consist in a few bits representing an opcode, and bits forming
26 - a distance when copying data from the dictionary (past output buffer)
27 - a length (number of bytes to copy from dictionary)
28 - the number of literals to copy, which is retained in variable "state"
29 as a piece of information for next instructions.
32 extra data can be a complement for the operand (eg: a length or a distance
33 encoded on larger values), or a literal to be copied to the output buffer.
35 The first byte of the block follows a different encoding from other bytes, it
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| /kernel/linux/linux-5.10/Documentation/staging/ |
| D | lzo.rst | 8 This is not a specification. No specification seems to be publicly available
20 The stream is composed of a series of instructions, operands, and data. The
21 instructions consist in a few bits representing an opcode, and bits forming
26 - a distance when copying data from the dictionary (past output buffer)
27 - a length (number of bytes to copy from dictionary)
28 - the number of literals to copy, which is retained in variable "state"
29 as a piece of information for next instructions.
32 extra data can be a complement for the operand (eg: a length or a distance
33 encoded on larger values), or a literal to be copied to the output buffer.
35 The first byte of the block follows a different encoding from other bytes, it
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| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/iavf/ |
| D | iavf_osdep.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
7 #include <linux/types.h>
8 #include <linux/if_ether.h>
9 #include <linux/if_vlan.h>
10 #include <linux/tcp.h>
11 #include <linux/pci.h>
13 /* get readq/writeq support for 32 bit kernels, use the low-first version */
14 #include <linux/io-64-nonatomic-lo-hi.h>
20 #define hw_dbg(hw, S, A...) do {} while (0) argument
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| /kernel/linux/linux-5.10/drivers/gpu/drm/vmwgfx/device_include/ |
| D | svga3d_cmd.h | 1 /* SPDX-License-Identifier: GPL-2.0 OR MIT */
3 * Copyright 1998-2020 VMware, Inc.
6 * obtaining a copy of this software and associated documentation
18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
28 * svga3d_cmd.h --
40 #include "includeCheck.h"
41 #include "svga3d_types.h"
337 #define SVGA_NUM_3D_CMD (SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE)
347 #include "vmware_pack_begin.h"
352 #include "vmware_pack_end.h"
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| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/i40e/ |
| D | i40e_osdep.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
7 #include <linux/types.h>
8 #include <linux/if_ether.h>
9 #include <linux/if_vlan.h>
10 #include <linux/tcp.h>
11 #include <linux/pci.h>
12 #include <linux/highuid.h>
14 /* get readq/writeq support for 32 bit kernels, use the low-first version */
15 #include <linux/io-64-nonatomic-lo-hi.h>
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| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/iavf/ |
| D | iavf_osdep.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
7 #include <linux/types.h>
8 #include <linux/if_ether.h>
9 #include <linux/if_vlan.h>
10 #include <linux/tcp.h>
11 #include <linux/pci.h>
13 /* get readq/writeq support for 32 bit kernels, use the low-first version */
14 #include <linux/io-64-nonatomic-lo-hi.h>
16 #define wr32(a, reg, value) writel((value), ((a)->hw_addr + (reg))) argument
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