Searched +full:a1 +full:- +full:peripherals +full:- +full:clkc (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/clock/amlogic,a1-peripherals-clkc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Amlogic A1 Peripherals Clock Control Unit10 - Neil Armstrong <neil.armstrong@linaro.org>11 - Jerome Brunet <jbrunet@baylibre.com>12 - Jian Hu <jian.hu@jian.hu.com>13 - Dmitry Rokosov <ddrokosov@sberdevices.ru>17 const: amlogic,a1-peripherals-clkc[all …]
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/clock/amlogic,a1-pll-clkc.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Amlogic A1 PLL Clock Control Unit10 - Neil Armstrong <neil.armstrong@linaro.org>11 - Jerome Brunet <jbrunet@baylibre.com>12 - Jian Hu <jian.hu@jian.hu.com>13 - Dmitry Rokosov <ddrokosov@sberdevices.ru>17 const: amlogic,a1-pll-clkc[all …]
1 # SPDX-License-Identifier: GPL-2.0-only4 obj-$(CONFIG_COMMON_CLK_MESON_CLKC_UTILS) += meson-clkc-utils.o5 obj-$(CONFIG_COMMON_CLK_MESON_AO_CLKC) += meson-aoclk.o6 obj-$(CONFIG_COMMON_CLK_MESON_CPU_DYNDIV) += clk-cpu-dyndiv.o7 obj-$(CONFIG_COMMON_CLK_MESON_DUALDIV) += clk-dualdiv.o8 obj-$(CONFIG_COMMON_CLK_MESON_EE_CLKC) += meson-eeclk.o9 obj-$(CONFIG_COMMON_CLK_MESON_MPLL) += clk-mpll.o10 obj-$(CONFIG_COMMON_CLK_MESON_PHASE) += clk-phase.o11 obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o12 obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o[all …]
1 // SPDX-License-Identifier: GPL-2.0+10 #include <linux/clk-provider.h>13 #include "a1-peripherals.h"14 #include "clk-dualdiv.h"15 #include "clk-regmap.h"16 #include "meson-clkc-utils.h"18 #include <dt-bindings/clock/amlogic,a1-peripherals-clkc.h>365 * b) CCF has a clock hand-off mechanism to make the sure the1168 * ---------| |---DIV--| | | | spicc out1169 * ---------| | | |-----|GATE |---------[all …]