| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/haswellx/ |
| D | uncore-memory.json | 513 "BriefDescription": "RD_CAS Access to Rank 0; All Banks",
517 "PublicDescription": "RD_CAS Access to Rank 0 : All Banks",
522 "BriefDescription": "RD_CAS Access to Rank 0; Bank 0",
526 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 0",
530 "BriefDescription": "RD_CAS Access to Rank 0; Bank 1",
534 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 1",
539 "BriefDescription": "RD_CAS Access to Rank 0; Bank 10",
543 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 10",
548 "BriefDescription": "RD_CAS Access to Rank 0; Bank 11",
552 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 11",
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/broadwellde/ |
| D | uncore-memory.json | 487 "BriefDescription": "RD_CAS Access to Rank 0; All Banks",
491 "PublicDescription": "RD_CAS Access to Rank 0 : All Banks",
496 "BriefDescription": "RD_CAS Access to Rank 0; Bank 0",
500 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 0",
504 "BriefDescription": "RD_CAS Access to Rank 0; Bank 1",
508 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 1",
513 "BriefDescription": "RD_CAS Access to Rank 0; Bank 10",
517 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 10",
522 "BriefDescription": "RD_CAS Access to Rank 0; Bank 11",
526 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 11",
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/broadwellx/ |
| D | uncore-memory.json | 520 "BriefDescription": "RD_CAS Access to Rank 0; All Banks",
524 "PublicDescription": "RD_CAS Access to Rank 0 : All Banks",
529 "BriefDescription": "RD_CAS Access to Rank 0; Bank 0",
533 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 0",
537 "BriefDescription": "RD_CAS Access to Rank 0; Bank 1",
541 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 1",
546 "BriefDescription": "RD_CAS Access to Rank 0; Bank 10",
550 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 10",
555 "BriefDescription": "RD_CAS Access to Rank 0; Bank 11",
559 "PublicDescription": "RD_CAS Access to Rank 0 : Bank 11",
[all …]
|
| /kernel/linux/linux-5.10/Documentation/admin-guide/LSM/ |
| D | Smack.rst | 9 Smack is the Simplified Mandatory Access Control Kernel.
10 Smack is a kernel based implementation of mandatory access
13 Smack is not the only Mandatory Access Control scheme
14 available for Linux. Those new to Mandatory Access Control
33 access to systems that use them as Smack does.
50 load the Smack access rules
53 report if a process with one label has access
85 Used to make access control decisions. In almost all cases
95 label does not allow all of the access permitted to a process
102 the Smack rule (more below) that permitted the write access
[all …]
|
| /kernel/linux/linux-6.6/Documentation/admin-guide/LSM/ |
| D | Smack.rst | 9 Smack is the Simplified Mandatory Access Control Kernel.
10 Smack is a kernel based implementation of mandatory access
13 Smack is not the only Mandatory Access Control scheme
14 available for Linux. Those new to Mandatory Access Control
33 access to systems that use them as Smack does.
50 load the Smack access rules
53 report if a process with one label has access
85 Used to make access control decisions. In almost all cases
95 label does not allow all of the access permitted to a process
102 the Smack rule (more below) that permitted the write access
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/skylakex/ |
| D | uncore-memory.json | 7 …"PublicDescription": "Counts all CAS (Column Access Select) read commands issued to DRAM on a per …
45 … the DRAM devices so that it can be read or written to with a CAS (Column Access Select) command.",
87 …"PublicDescription": "Counts all CAS (Column Access Select) read commands issued to DRAM on a per …
104 …"PublicDescription": "Counts CAS (Column Access Select) regular read commands issued to DRAM on a …
121 …"PublicDescription": "Counts CAS (Column Access Select) underfill read commands issued to DRAM due…
535 "BriefDescription": "RD_CAS Access to Rank 0; All Banks",
543 "BriefDescription": "RD_CAS Access to Rank 0; Bank 0",
550 "BriefDescription": "RD_CAS Access to Rank 0; Bank 1",
558 "BriefDescription": "RD_CAS Access to Rank 0; Bank 10",
566 "BriefDescription": "RD_CAS Access to Rank 0; Bank 11",
[all …]
|
| /kernel/linux/linux-5.10/include/linux/ |
| D | instrumented.h | 4 * This header provides generic wrappers for memory access instrumentation that
16 * instrument_read - instrument regular read access
18 * Instrument a regular read access. The instrumentation should be inserted
21 * @ptr address of access
22 * @size size of access
31 * instrument_write - instrument regular write access
33 * Instrument a regular write access. The instrumentation should be inserted
36 * @ptr address of access
37 * @size size of access
46 * instrument_read_write - instrument regular read-write access
[all …]
|
| D | kcsan-checks.h | 10 /* Access types -- if KCSAN_ACCESS_WRITE is not set, the access is a read. */
11 #define KCSAN_ACCESS_WRITE (1 << 0) /* Access is a write. */
13 #define KCSAN_ACCESS_ATOMIC (1 << 2) /* Access is atomic. */
15 #define KCSAN_ACCESS_ASSERT (1 << 3) /* Access is an assertion. */
16 #define KCSAN_ACCESS_SCOPED (1 << 4) /* Access is a scoped access. */
21 * to validate access to an address. Never use these in header files!
25 * __kcsan_check_access - check generic access for races
27 * @ptr: address of access
28 * @size: size of access
29 * @type: access type modifier
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/ |
| D | armv8-recommended.json | 3 "PublicDescription": "Attributable Level 1 data cache access, read",
6 "BriefDescription": "L1D cache access, read"
9 "PublicDescription": "Attributable Level 1 data cache access, write",
12 "BriefDescription": "L1D cache access, write"
69 "PublicDescription": "Attributable Level 1 data or unified TLB access, read",
72 "BriefDescription": "L1D tlb access, read"
75 "PublicDescription": "Attributable Level 1 data or unified TLB access, write",
78 "BriefDescription": "L1D tlb access, write"
81 "PublicDescription": "Attributable Level 2 data cache access, read",
84 "BriefDescription": "L2D cache access, read"
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/arm64/ |
| D | recommended.json | 3 "PublicDescription": "Attributable Level 1 data cache access, read",
6 "BriefDescription": "L1D cache access, read"
9 "PublicDescription": "Attributable Level 1 data cache access, write",
12 "BriefDescription": "L1D cache access, write"
69 "PublicDescription": "Attributable Level 1 data or unified TLB access, read",
72 "BriefDescription": "L1D tlb access, read"
75 "PublicDescription": "Attributable Level 1 data or unified TLB access, write",
78 "BriefDescription": "L1D tlb access, write"
81 "PublicDescription": "Attributable Level 2 data cache access, read",
84 "BriefDescription": "L2D cache access, read"
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| D | uncore-memory.json | 7 …"PublicDescription": "Counts all CAS (Column Access Select) read commands issued to DRAM on a per …
45 … the DRAM devices so that it can be read or written to with a CAS (Column Access Select) command.",
87 …"PublicDescription": "Counts all CAS (Column Access Select) read commands issued to DRAM on a per …
104 …"PublicDescription": "Counts CAS (Column Access Select) regular read commands issued to DRAM on a …
121 …"PublicDescription": "Counts CAS (Column Access Select) underfill read commands issued to DRAM due…
845 "BriefDescription": "RD_CAS Access to Rank 0; All Banks",
853 "BriefDescription": "RD_CAS Access to Rank 0; Bank 0",
860 "BriefDescription": "RD_CAS Access to Rank 0; Bank 1",
868 "BriefDescription": "RD_CAS Access to Rank 0; Bank 10",
876 "BriefDescription": "RD_CAS Access to Rank 0; Bank 11",
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/mellanox/mlxsw/ |
| D | reg.h | 45 * Access: RW
68 * Access: RW
89 * Access: RW
96 * Access: RW
106 * Access: Index
130 * Access: Index
139 * Access: RW
152 * The following register defines the access to the filtering database.
154 * The access is optimized for bulk updates in which case more than one
168 * Access: Index
[all …]
|
| /kernel/linux/linux-6.6/drivers/iommu/iommufd/ |
| D | device.c | 703 * a valid cur_ioas (access->ioas). A caller passing in a valid new_ioas should
706 static int iommufd_access_change_ioas(struct iommufd_access *access, in iommufd_access_change_ioas() argument
709 u32 iopt_access_list_id = access->iopt_access_list_id; in iommufd_access_change_ioas()
710 struct iommufd_ioas *cur_ioas = access->ioas; in iommufd_access_change_ioas()
713 lockdep_assert_held(&access->ioas_lock); in iommufd_access_change_ioas()
716 if (cur_ioas != access->ioas_unpin) in iommufd_access_change_ioas()
724 * iommufd_access_unpin_pages() can continue using access->ioas_unpin. in iommufd_access_change_ioas()
726 access->ioas = NULL; in iommufd_access_change_ioas()
729 rc = iopt_add_access(&new_ioas->iopt, access); in iommufd_access_change_ioas()
731 access->ioas = cur_ioas; in iommufd_access_change_ioas()
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlxsw/ |
| D | reg.h | 45 * Access: RW
68 * Access: RW
85 * Access: Index
92 * Access: Index
98 * Access: RW
104 * Access: W
135 * Access: RW
142 * Access: RW
150 * Access: RW
160 * Access: Index
[all …]
|
| /kernel/linux/linux-6.6/include/linux/ |
| D | instrumented.h | 4 * This header provides generic wrappers for memory access instrumentation that
17 * instrument_read - instrument regular read access
18 * @v: address of access
19 * @size: size of access
21 * Instrument a regular read access. The instrumentation should be inserted
31 * instrument_write - instrument regular write access
32 * @v: address of access
33 * @size: size of access
35 * Instrument a regular write access. The instrumentation should be inserted
45 * instrument_read_write - instrument regular read-write access
[all …]
|
| D | kcsan-checks.h | 3 * KCSAN access checks and modifiers. These can be used to explicitly check
16 /* Access types -- if KCSAN_ACCESS_WRITE is not set, the access is a read. */
17 #define KCSAN_ACCESS_WRITE (1 << 0) /* Access is a write. */
19 #define KCSAN_ACCESS_ATOMIC (1 << 2) /* Access is atomic. */
21 #define KCSAN_ACCESS_ASSERT (1 << 3) /* Access is an assertion. */
22 #define KCSAN_ACCESS_SCOPED (1 << 4) /* Access is a scoped access. */
27 * to validate access to an address. Never use these in header files!
31 * __kcsan_check_access - check generic access for races
33 * @ptr: address of access
34 * @size: size of access
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/broadwell/ |
| D | uncore-cache.json | 3 … "BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state",
7 … "PublicDescription": "L3 Lookup any request that access cache and found line in E or S-state.",
12 "BriefDescription": "L3 Lookup any request that access cache and found line in I-state",
16 "PublicDescription": "L3 Lookup any request that access cache and found line in I-state.",
21 "BriefDescription": "L3 Lookup any request that access cache and found line in M-state",
25 "PublicDescription": "L3 Lookup any request that access cache and found line in M-state.",
30 "BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state",
34 … "PublicDescription": "L3 Lookup any request that access cache and found line in MESI-state.",
39 … "BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state",
43 … "PublicDescription": "L3 Lookup read request that access cache and found line in E or S-state.",
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/arm64/arm/cortex-a76-n1/ |
| D | cache.json | 15 …refill. This event counts any load or store operation or page table walk access which causes data …
21 …ache access. This event counts any load or store operation or page table walk access which looks u…
24 "BriefDescription": "L1 data cache access"
33 …"PublicDescription": "Level 1 instruction cache access or Level 0 Macro-op cache access. This even…
36 "BriefDescription": "L1 instruction cache access"
45 …"PublicDescription": "L2 data cache access. This event counts any transaction from L1 which looks …
48 "BriefDescription": "L2 data cache access"
69 …"PublicDescription": "Level 1 data TLB access. This event counts any load or store operation which…
72 "BriefDescription": "Level 1 data TLB access."
75 …"PublicDescription": "Level 1 instruction TLB access. This event counts any instruction fetch whic…
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/skylake/ |
| D | uncore-cache.json | 3 … "BriefDescription": "L3 Lookup any request that access cache and found line in E or S-state",
7 … "PublicDescription": "L3 Lookup any request that access cache and found line in E or S-state.",
12 "BriefDescription": "L3 Lookup any request that access cache and found line in I-state",
16 "PublicDescription": "L3 Lookup any request that access cache and found line in I-state.",
21 "BriefDescription": "L3 Lookup any request that access cache and found line in M-state",
25 "PublicDescription": "L3 Lookup any request that access cache and found line in M-state.",
30 "BriefDescription": "L3 Lookup any request that access cache and found line in MESI-state",
34 … "PublicDescription": "L3 Lookup any request that access cache and found line in MESI-state.",
39 … "BriefDescription": "L3 Lookup read request that access cache and found line in E or S-state",
43 … "PublicDescription": "L3 Lookup read request that access cache and found line in E or S-state.",
[all …]
|
| /kernel/linux/linux-6.6/tools/testing/selftests/bpf/verifier/ |
| D | direct_value_access.c | 2 "direct map access, write test 1",
14 "direct map access, write test 2",
26 "direct map access, write test 3",
38 "direct map access, write test 4",
50 "direct map access, write test 5",
62 "direct map access, write test 6",
75 "direct map access, write test 7",
87 "direct map access, write test 8",
99 "direct map access, write test 9",
108 .errstr = "invalid access to map value pointer",
[all …]
|
| /kernel/linux/linux-5.10/tools/testing/selftests/bpf/verifier/ |
| D | direct_value_access.c | 2 "direct map access, write test 1",
14 "direct map access, write test 2",
26 "direct map access, write test 3",
38 "direct map access, write test 4",
50 "direct map access, write test 5",
62 "direct map access, write test 6",
74 "direct map access, write test 7",
86 "direct map access, write test 8",
98 "direct map access, write test 9",
107 .errstr = "invalid access to map value pointer",
[all …]
|
| /kernel/linux/linux-6.6/arch/mips/include/asm/octeon/ |
| D | cvmx-fau.h | 123 * @reg: FAU atomic register to access. 0 <= reg < 2048.
124 * - Step by 2 for 16 bit access.
125 * - Step by 4 for 32 bit access.
126 * - Step by 8 for 64 bit access.
143 * @reg: FAU atomic register to access. 0 <= reg < 2048.
144 * - Step by 2 for 16 bit access.
145 * - Step by 4 for 32 bit access.
146 * - Step by 8 for 64 bit access.
148 * Note: When performing 32 and 64 bit access, only the low
164 * @reg: FAU atomic register to access. 0 <= reg < 2048.
[all …]
|
| /kernel/linux/linux-5.10/arch/mips/include/asm/octeon/ |
| D | cvmx-fau.h | 123 * @reg: FAU atomic register to access. 0 <= reg < 2048.
124 * - Step by 2 for 16 bit access.
125 * - Step by 4 for 32 bit access.
126 * - Step by 8 for 64 bit access.
143 * @reg: FAU atomic register to access. 0 <= reg < 2048.
144 * - Step by 2 for 16 bit access.
145 * - Step by 4 for 32 bit access.
146 * - Step by 8 for 64 bit access.
148 * Note: When performing 32 and 64 bit access, only the low
164 * @reg: FAU atomic register to access. 0 <= reg < 2048.
[all …]
|
| /kernel/linux/linux-6.6/tools/perf/pmu-events/arch/x86/ivytown/ |
| D | uncore-memory.json | 486 "BriefDescription": "RD_CAS Access to Rank 0; Bank 0",
494 "BriefDescription": "RD_CAS Access to Rank 0; Bank 1",
502 "BriefDescription": "RD_CAS Access to Rank 0; Bank 2",
510 "BriefDescription": "RD_CAS Access to Rank 0; Bank 3",
518 "BriefDescription": "RD_CAS Access to Rank 0; Bank 4",
526 "BriefDescription": "RD_CAS Access to Rank 0; Bank 5",
534 "BriefDescription": "RD_CAS Access to Rank 0; Bank 6",
542 "BriefDescription": "RD_CAS Access to Rank 0; Bank 7",
550 "BriefDescription": "RD_CAS Access to Rank 1; Bank 0",
558 "BriefDescription": "RD_CAS Access to Rank 1; Bank 1",
[all …]
|
| /kernel/linux/linux-5.10/tools/perf/pmu-events/arch/x86/haswell/ |
| D | uncore.json | 115 "BriefDescription": "L3 Lookup read request that access cache and found line in M-state.",
116 "PublicDescription": "L3 Lookup read request that access cache and found line in M-state.",
127 "BriefDescription": "L3 Lookup write request that access cache and found line in M-state.",
128 "PublicDescription": "L3 Lookup write request that access cache and found line in M-state.",
139 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in M-state.…
140 …"PublicDescription": "L3 Lookup external snoop request that access cache and found line in M-state…
151 "BriefDescription": "L3 Lookup any request that access cache and found line in M-state.",
152 "PublicDescription": "L3 Lookup any request that access cache and found line in M-state.",
163 "BriefDescription": "L3 Lookup read request that access cache and found line in I-state.",
164 "PublicDescription": "L3 Lookup read request that access cache and found line in I-state.",
[all …]
|