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/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dkirkwood-netxbig.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 * Based on netxbig_v2-setup.c,
14 #include <dt-bindings/leds/leds-netxbig.h>
16 #include "kirkwood-6281.dtsi"
21 stdout-path = &uart0;
33 #address-cells = <1>;
34 #size-cells = <1>;
35 compatible = "mxicy,mx25l4005a", "jedec,spi-nor";
37 spi-max-frequency = <20000000>;
42 label = "u-boot";
[all …]
Dqcom-msm8974-sony-xperia-castor.dts1 #include "qcom-msm8974pro.dtsi"
2 #include "qcom-pm8841.dtsi"
3 #include "qcom-pm8941.dtsi"
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 compatible = "sony,xperia-castor", "qcom,msm8974";
17 stdout-path = "serial0:115200n8";
20 gpio-keys {
21 compatible = "gpio-keys";
[all …]
Daspeed-bmc-ibm-rainier.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /dts-v1/;
5 #include "aspeed-g6.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "ibm,rainier-bmc", "aspeed,ast2600";
36 stdout-path = &uart5;
45 reserved-memory {
46 #address-cells = <1>;
[all …]
Dsocfpga_arria10_socdk.dtsi1 // SPDX-License-Identifier: GPL-2.0+
9 compatible = "altr,socfpga-arria10", "altr,socfpga";
18 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
31 label = "a10sr-led0";
32 gpios = <&a10sr_gpio 0 1>;
36 label = "a10sr-led1";
37 gpios = <&a10sr_gpio 1 1>;
41 label = "a10sr-led2";
42 gpios = <&a10sr_gpio 2 1>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/
Dkirkwood-netxbig.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 * Based on netxbig_v2-setup.c,
14 #include <dt-bindings/leds/leds-netxbig.h>
16 #include "kirkwood-6281.dtsi"
21 stdout-path = &uart0;
33 #address-cells = <1>;
34 #size-cells = <1>;
35 compatible = "mxicy,mx25l4005a", "jedec,spi-nor";
37 spi-max-frequency = <20000000>;
42 label = "u-boot";
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpio/
Dnetxbig-gpio-ext.txt5 - compatible: "lacie,netxbig-gpio-ext".
6 - addr-gpios: GPIOs representing the address register (LSB -> MSB).
7 - data-gpios: GPIOs representing the data register (LSB -> MSB).
8 - enable-gpio: latches the new configuration (address, data) on raising edge.
12 netxbig_gpio_ext: netxbig-gpio-ext {
13 compatible = "lacie,netxbig-gpio-ext";
15 addr-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH
18 data-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH
21 enable-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpio/
Dnetxbig-gpio-ext.txt5 - compatible: "lacie,netxbig-gpio-ext".
6 - addr-gpios: GPIOs representing the address register (LSB -> MSB).
7 - data-gpios: GPIOs representing the data register (LSB -> MSB).
8 - enable-gpio: latches the new configuration (address, data) on raising edge.
12 netxbig_gpio_ext: netxbig-gpio-ext {
13 compatible = "lacie,netxbig-gpio-ext";
15 addr-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH
18 data-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH
21 enable-gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
21 read registers (tR). Required if property "gpios" is not used
[all …]
Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
12 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
13 (R/B#). For multi-chip devices, "n" GPIO definitions are required
17 - fsl,upm-wait-flags : add chip-dependent short delays after running the
20 - chip-delay : chip dependent delay for transferring data from array to
21 read registers (tR). Required if property "gpios" is not used
[all …]
Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/tegra/
Dnvidia,nvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
26 - description: divider clock
27 - description: fast clock
29 clock-names:
32 - const: div-clk
33 - const: fast-clk
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/microchip/wilc1000/
Dspi.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2012 - 2018 Microchip Technology Inc., and its subsidiaries.
10 #include <linux/crc-itu-t.h>
23 "\t\t\tCommand transfers are short and the CPU-cycle cost\n"
31 "\t\t\tData transfers can be large and the CPU-cycle cost\n"
38 * USER GUIDE" (https://tinyurl.com/4hhshdts) but we have observed 1-4
52 } gpios; member
117 u8 addr[3]; member
121 u8 addr[3]; member
126 u8 addr[3]; member
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/qcom/
Dqcom-msm8974pro-sony-xperia-shinano-castor.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974pro.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
11 compatible = "sony,xperia-castor", "qcom,msm8974pro", "qcom,msm8974";
12 chassis-type = "tablet";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
[all …]
Dqcom-apq8026-samsung-matisse-wifi.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "qcom-msm8226.dtsi"
12 /delete-node/ &adsp_region;
13 /delete-node/ &smem_region;
17 compatible = "samsung,matisse-wifi", "qcom,apq8026";
18 chassis-type = "tablet";
27 #address-cells = <1>;
28 #size-cells = <1>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/misc/
Difm-csi.txt4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/misc/
Difm-csi.txt4 - compatible: "ifm,o2d-csi"
5 - reg: specifies sensor chip select number and associated address range
6 - interrupts: external interrupt line number and interrupt sense mode
8 - gpios: three gpio-specifiers for "capture", "reset" and "master enable"
9 GPIOs (strictly in this order).
10 - ifm,csi-clk-handle: the phandle to a node in the DT describing the sensor
12 - ifm,csi-addr-bus-width: address bus width (valid values are 16, 24, 25)
13 - ifm,csi-data-bus-width: data bus width (valid values are 8 and 16)
14 - ifm,csi-wait-cycles: sensor bus wait cycles
17 - ifm,csi-byte-swap: if this property is present, the byte swapping on
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/
Dssm2518.txt6 - compatible : Must be "adi,ssm2518"
7 - reg : the I2C address of the device. This will either be 0x34 (ADDR pin low)
8 or 0x35 (ADDR pin high)
11 - gpios : GPIO connected to the nSD pin. If the property is not present it is
19 gpios = <&gpio 5 0>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/
Dadi,ssm2518.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lars-Peter Clausen <lars@metafoo.de>
13 - $ref: dai-common.yaml#
22 I2C address of the device. This will either be 0x34 (ADDR pin low)
23 or 0x35 (ADDR pin high)
25 gpios:
32 - compatible
33 - reg
[all …]
/kernel/linux/linux-6.6/arch/nios2/boot/dts/
D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
10 compatible = "altr,niosii-max10";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "altr,nios2-1.1";
22 interrupt-controller;
23 #interrupt-cells = <1>;
[all …]
/kernel/linux/linux-5.10/arch/nios2/boot/dts/
D10m50_devboard.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
10 compatible = "altr,niosii-max10";
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
20 compatible = "altr,nios2-1.1";
22 interrupt-controller;
23 #interrupt-cells = <1>;
[all …]
/kernel/linux/linux-5.10/drivers/gpio/
Dgpio-aspeed-sgpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 * MAX_NR_HW_GPIO represents the number of actual hardware-supported GPIOs (ie,
105 return gpio->base + bank->val_regs + GPIO_VAL_VALUE; in bank_reg()
107 return gpio->base + bank->rdata_reg; in bank_reg()
109 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE; in bank_reg()
111 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0; in bank_reg()
113 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1; in bank_reg()
115 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2; in bank_reg()
117 return gpio->base + bank->irq_regs + GPIO_IRQ_STATUS; in bank_reg()
142 int n = sgpio->n_sgpio; in aspeed_sgpio_init_valid_mask()
[all …]
/kernel/linux/linux-5.10/include/linux/gpio/
Dregmap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1))
12 #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO) argument
15 * struct gpio_regmap_config - Description of a generic regmap gpio_chip.
21 * @ngpio: Number of GPIOs
22 * @names: (Optional) Array of names for gpios
30 * @ngpio_per_reg: Number of GPIOs per register
32 * interrupt-capable
38 * The ->reg_mask_xlate translates a given base address and GPIO offset to
44 * 1. if you only have @reg_dat_base set, then it is input-only
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/intel/socfpga/
Dsocfpga_arria10_socdk.dtsi1 // SPDX-License-Identifier: GPL-2.0+
9 compatible = "altr,socfpga-arria10-socdk", "altr,socfpga-arria10", "altr,socfpga";
18 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
31 label = "a10sr-led0";
32 gpios = <&a10sr_gpio 0 1>;
36 label = "a10sr-led1";
37 gpios = <&a10sr_gpio 1 1>;
41 label = "a10sr-led2";
42 gpios = <&a10sr_gpio 2 1>;
[all …]
/kernel/linux/linux-6.6/include/linux/gpio/
Dregmap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #define GPIO_REGMAP_ADDR_ZERO ((unsigned int)(-1))
13 #define GPIO_REGMAP_ADDR(addr) ((addr) ? : GPIO_REGMAP_ADDR_ZERO) argument
16 * struct gpio_regmap_config - Description of a generic regmap gpio_chip.
24 * @ngpio: Number of GPIOs
25 * @names: (Optional) Array of names for gpios
33 * @ngpio_per_reg: Number of GPIOs per register
35 * interrupt-capable
41 * not used by gpio-remap but is provided "as is" to the
44 * The ->reg_mask_xlate translates a given base address and GPIO offset to
[all …]

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