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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dallwinner,sun8i-a23-prcm.yaml31 - allwinner,sun8i-a23-apb0-clk
32 - allwinner,sun8i-a23-apb0-gates-clk
53 const: allwinner,sun8i-a23-apb0-clk
75 const: allwinner,sun8i-a23-apb0-gates-clk
142 apb0: apb0_clk {
143 compatible = "allwinner,sun8i-a23-apb0-clk";
146 clock-output-names = "apb0";
150 compatible = "allwinner,sun8i-a23-apb0-gates-clk";
152 clocks = <&apb0>;
Dallwinner,sun6i-a31-prcm.yaml31 - allwinner,sun6i-a31-apb0-clk
32 - allwinner,sun6i-a31-apb0-gates-clk
76 const: allwinner,sun6i-a31-apb0-clk
98 const: allwinner,sun6i-a31-apb0-gates-clk
192 apb0: apb0_clk {
193 compatible = "allwinner,sun6i-a31-apb0-clk";
196 clock-output-names = "apb0";
200 compatible = "allwinner,sun6i-a31-apb0-gates-clk";
202 clocks = <&apb0>;
/kernel/linux/linux-6.6/drivers/mfd/
Dsun6i-prcm.c54 .name = "sun6i-a31-apb0-clk",
55 .of_compatible = "allwinner,sun6i-a31-apb0-clk",
60 .name = "sun6i-a31-apb0-gates-clk",
61 .of_compatible = "allwinner,sun6i-a31-apb0-gates-clk",
72 .name = "sun6i-a31-apb0-clock-reset",
81 .name = "sun8i-a23-apb0-clk",
82 .of_compatible = "allwinner,sun8i-a23-apb0-clk",
87 .name = "sun6i-a31-apb0-gates-clk",
88 .of_compatible = "allwinner,sun8i-a23-apb0-gates-clk",
93 .name = "sun6i-a31-apb0-clock-reset",
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dallwinner,sun8i-a23-prcm.yaml30 - allwinner,sun8i-a23-apb0-clk
31 - allwinner,sun8i-a23-apb0-gates-clk
43 const: allwinner,sun8i-a23-apb0-clk
73 const: allwinner,sun8i-a23-apb0-gates-clk
174 apb0: apb0_clk {
175 compatible = "allwinner,sun8i-a23-apb0-clk";
178 clock-output-names = "apb0";
182 compatible = "allwinner,sun8i-a23-apb0-gates-clk";
184 clocks = <&apb0>;
Dallwinner,sun6i-a31-prcm.yaml30 - allwinner,sun6i-a31-apb0-clk
31 - allwinner,sun6i-a31-apb0-gates-clk
41 const: allwinner,sun6i-a31-apb0-clk
71 const: allwinner,sun6i-a31-apb0-gates-clk
189 apb0: apb0_clk {
190 compatible = "allwinner,sun6i-a31-apb0-clk";
193 clock-output-names = "apb0";
197 compatible = "allwinner,sun6i-a31-apb0-gates-clk";
199 clocks = <&apb0>;
/kernel/linux/linux-5.10/drivers/mfd/
Dsun6i-prcm.c74 .name = "sun6i-a31-apb0-clk",
75 .of_compatible = "allwinner,sun6i-a31-apb0-clk",
80 .name = "sun6i-a31-apb0-gates-clk",
81 .of_compatible = "allwinner,sun6i-a31-apb0-gates-clk",
92 .name = "sun6i-a31-apb0-clock-reset",
101 .name = "sun8i-a23-apb0-clk",
102 .of_compatible = "allwinner,sun8i-a23-apb0-clk",
107 .name = "sun6i-a31-apb0-gates-clk",
108 .of_compatible = "allwinner,sun8i-a23-apb0-gates-clk",
113 .name = "sun6i-a31-apb0-clock-reset",
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-apb0-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-apb0-clk.yaml#
7 title: Allwinner A10 APB0 Bus Clock Device Tree Bindings
20 const: allwinner,sun4i-a10-apb0-clk
42 apb0@1c20054 {
44 compatible = "allwinner,sun4i-a10-apb0-clk";
47 clock-output-names = "apb0";
Dallwinner,sun4i-a10-gates-clk.yaml35 - const: allwinner,sun4i-a10-apb0-gates-clk
36 - const: allwinner,sun5i-a10s-apb0-gates-clk
37 - const: allwinner,sun5i-a13-apb0-gates-clk
38 - const: allwinner,sun7i-a20-apb0-gates-clk
39 - const: allwinner,sun9i-a80-apb0-gates-clk
40 - const: allwinner,sun8i-a83t-apb0-gates-clk
59 - const: allwinner,sun8i-h3-apb0-gates-clk
139 compatible = "allwinner,sun4i-a10-apb0-gates-clk";
141 clocks = <&apb0>;
Dallwinner,sun9i-a80-apb0-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-apb0-clk.yaml#
7 title: Allwinner A80 APB0 Bus Clock Device Tree Bindings
21 - allwinner,sun9i-a80-apb0-clk
48 compatible = "allwinner,sun9i-a80-apb0-clk";
51 clock-output-names = "apb0";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dallwinner,sun4i-a10-apb0-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-apb0-clk.yaml#
7 title: Allwinner A10 APB0 Bus Clock
20 const: allwinner,sun4i-a10-apb0-clk
42 apb0@1c20054 {
44 compatible = "allwinner,sun4i-a10-apb0-clk";
47 clock-output-names = "apb0";
Dallwinner,sun4i-a10-gates-clk.yaml35 - const: allwinner,sun4i-a10-apb0-gates-clk
36 - const: allwinner,sun5i-a10s-apb0-gates-clk
37 - const: allwinner,sun5i-a13-apb0-gates-clk
38 - const: allwinner,sun7i-a20-apb0-gates-clk
39 - const: allwinner,sun9i-a80-apb0-gates-clk
40 - const: allwinner,sun8i-a83t-apb0-gates-clk
59 - const: allwinner,sun8i-h3-apb0-gates-clk
139 compatible = "allwinner,sun4i-a10-apb0-gates-clk";
141 clocks = <&apb0>;
Dallwinner,sun9i-a80-apb0-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun9i-a80-apb0-clk.yaml#
7 title: Allwinner A80 APB0 Bus Clock
21 - allwinner,sun9i-a80-apb0-clk
48 compatible = "allwinner,sun9i-a80-apb0-clk";
51 clock-output-names = "apb0";
/kernel/linux/linux-6.6/drivers/clk/sunxi/
Dclk-sun8i-apb0.c6 * Allwinner A23 APB0 clock driver
8 * Based on clk-sun6i-apb0.c
9 * Allwinner A31 APB0 clock driver
36 /* The A23 APB0 clock is a standard 2 bit wide divider clock */ in sun8i_a23_apb0_register()
68 pr_err("Could not get registers for a23-apb0-clk\n"); in sun8i_a23_apb0_setup()
84 CLK_OF_DECLARE_DRIVER(sun8i_a23_apb0, "allwinner,sun8i-a23-apb0-clk",
102 { .compatible = "allwinner,sun8i-a23-apb0-clk" },
108 .name = "sun8i-a23-apb0-clk",
DMakefile26 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun8i-apb0.o
29 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN6I) += clk-sun6i-apb0.o
30 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN6I) += clk-sun6i-apb0-gates.o
33 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN8I) += clk-sun8i-apb0.o
34 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN8I) += clk-sun6i-apb0-gates.o
Dclk-simple-gates.c93 CLK_OF_DECLARE(sun4i_a10_apb0, "allwinner,sun4i-a10-apb0-gates-clk",
99 CLK_OF_DECLARE(sun5i_a10s_apb0, "allwinner,sun5i-a10s-apb0-gates-clk",
103 CLK_OF_DECLARE(sun5i_a13_apb0, "allwinner,sun5i-a13-apb0-gates-clk",
113 CLK_OF_DECLARE(sun7i_a20_apb0, "allwinner,sun7i-a20-apb0-gates-clk",
125 CLK_OF_DECLARE(sun8i_a83t_apb0, "allwinner,sun8i-a83t-apb0-gates-clk",
133 CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-gates-clk",
Dclk-sun6i-apb0.c7 * Allwinner A31 APB0 clock driver
16 * The APB0 clk has a configurable divisor.
58 { .compatible = "allwinner,sun6i-a31-apb0-clk" },
64 .name = "sun6i-a31-apb0-clk",
Dclk-sun6i-apb0-gates.c7 * Allwinner A31 APB0 clock gates driver
30 { .compatible = "allwinner,sun6i-a31-apb0-gates-clk", .data = &sun6i_a31_apb0_gates },
31 { .compatible = "allwinner,sun8i-a23-apb0-gates-clk", .data = &sun8i_a23_apb0_gates },
93 .name = "sun6i-a31-apb0-gates-clk",
/kernel/linux/linux-5.10/drivers/clk/sunxi/
Dclk-sun8i-apb0.c6 * Allwinner A23 APB0 clock driver
8 * Based on clk-sun6i-apb0.c
9 * Allwinner A31 APB0 clock driver
36 /* The A23 APB0 clock is a standard 2 bit wide divider clock */ in sun8i_a23_apb0_register()
68 pr_err("Could not get registers for a23-apb0-clk\n"); in sun8i_a23_apb0_setup()
84 CLK_OF_DECLARE_DRIVER(sun8i_a23_apb0, "allwinner,sun8i-a23-apb0-clk",
104 { .compatible = "allwinner,sun8i-a23-apb0-clk" },
110 .name = "sun8i-a23-apb0-clk",
DMakefile26 obj-$(CONFIG_CLK_SUNXI_CLOCKS) += clk-sun8i-apb0.o
29 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN6I) += clk-sun6i-apb0.o
30 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN6I) += clk-sun6i-apb0-gates.o
33 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN8I) += clk-sun8i-apb0.o
34 obj-$(CONFIG_CLK_SUNXI_PRCM_SUN8I) += clk-sun6i-apb0-gates.o
Dclk-simple-gates.c95 CLK_OF_DECLARE(sun4i_a10_apb0, "allwinner,sun4i-a10-apb0-gates-clk",
101 CLK_OF_DECLARE(sun5i_a10s_apb0, "allwinner,sun5i-a10s-apb0-gates-clk",
105 CLK_OF_DECLARE(sun5i_a13_apb0, "allwinner,sun5i-a13-apb0-gates-clk",
115 CLK_OF_DECLARE(sun7i_a20_apb0, "allwinner,sun7i-a20-apb0-gates-clk",
127 CLK_OF_DECLARE(sun8i_a83t_apb0, "allwinner,sun8i-a83t-apb0-gates-clk",
135 CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-gates-clk",
Dclk-sun6i-apb0.c7 * Allwinner A31 APB0 clock driver
16 * The APB0 clk has a configurable divisor.
60 { .compatible = "allwinner,sun6i-a31-apb0-clk" },
66 .name = "sun6i-a31-apb0-clk",
Dclk-sun6i-apb0-gates.c7 * Allwinner A31 APB0 clock gates driver
31 { .compatible = "allwinner,sun6i-a31-apb0-gates-clk", .data = &sun6i_a31_apb0_gates },
32 { .compatible = "allwinner,sun8i-a23-apb0-gates-clk", .data = &sun8i_a23_apb0_gates },
96 .name = "sun6i-a31-apb0-gates-clk",
/kernel/linux/linux-6.6/drivers/clk/sunxi-ng/
Dccu-sun8i-r.c55 static SUNXI_CCU_M(apb0_clk, "apb0", "ahb0", 0x0c, 0, 2, 0);
63 static SUNXI_CCU_GATE_HWS(apb0_pio_clk, "apb0-pio",
65 static SUNXI_CCU_GATE_HWS(apb0_ir_clk, "apb0-ir",
67 static SUNXI_CCU_GATE_HWS(apb0_timer_clk, "apb0-timer",
69 static SUNXI_CCU_GATE_HWS(apb0_rsb_clk, "apb0-rsb",
71 static SUNXI_CCU_GATE_HWS(apb0_uart_clk, "apb0-uart",
73 static SUNXI_CCU_GATE_HWS(apb0_i2c_clk, "apb0-i2c",
75 static SUNXI_CCU_GATE_HWS(apb0_twd_clk, "apb0-twd",
Dccu-sun4i-a10.c281 static SUNXI_CCU_DIV_TABLE(apb0_clk, "apb0", "ahb",
389 static SUNXI_CCU_GATE(apb0_codec_clk, "apb0-codec", "apb0",
391 static SUNXI_CCU_GATE(apb0_spdif_clk, "apb0-spdif", "apb0",
393 static SUNXI_CCU_GATE(apb0_ac97_clk, "apb0-ac97", "apb0",
395 static SUNXI_CCU_GATE(apb0_i2s0_clk, "apb0-i2s0", "apb0",
398 static SUNXI_CCU_GATE(apb0_i2s1_clk, "apb0-i2s1", "apb0",
400 static SUNXI_CCU_GATE(apb0_pio_clk, "apb0-pio", "apb0",
402 static SUNXI_CCU_GATE(apb0_ir0_clk, "apb0-ir0", "apb0",
404 static SUNXI_CCU_GATE(apb0_ir1_clk, "apb0-ir1", "apb0",
407 static SUNXI_CCU_GATE(apb0_i2s2_clk, "apb0-i2s2", "apb0",
[all …]
/kernel/linux/linux-5.10/drivers/clk/sunxi-ng/
Dccu-sun8i-r.c54 static SUNXI_CCU_M(apb0_clk, "apb0", "ahb0", 0x0c, 0, 2, 0);
62 static SUNXI_CCU_GATE_HWS(apb0_pio_clk, "apb0-pio",
64 static SUNXI_CCU_GATE_HWS(apb0_ir_clk, "apb0-ir",
66 static SUNXI_CCU_GATE_HWS(apb0_timer_clk, "apb0-timer",
68 static SUNXI_CCU_GATE_HWS(apb0_rsb_clk, "apb0-rsb",
70 static SUNXI_CCU_GATE_HWS(apb0_uart_clk, "apb0-uart",
72 static SUNXI_CCU_GATE_HWS(apb0_i2c_clk, "apb0-i2c",
74 static SUNXI_CCU_GATE_HWS(apb0_twd_clk, "apb0-twd",

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