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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/dma/
Dmediatek,uart-dma.yaml7 title: MediaTek UART APDMA controller
13 The MediaTek UART APDMA controller provides DMA capabilities
38 TX, RX interrupt lines for each UART APDMA channel
43 description: Must contain one entry for the APDMA main clock
47 const: apdma
52 The first cell specifies the UART APDMA channel number
56 Number of virtual channels of the UART APDMA controller
61 description: Enable 33-bits UART APDMA support
89 apdma: dma-controller@11000400 {
118 clock-names = "apdma";
Dsprd-dma.txt21 apdma: dma-controller@20100000 {
42 dmas = <&apdma 11>, <&apdma 12>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dmtk-uart-apdma.txt1 * Mediatek UART APDMA Controller
5 * "mediatek,mt2712-uart-dma" for MT2712 compatible APDMA
8 - reg: The base address of the APDMA register bank.
17 - clock-names: The APDMA clock for register accesses
23 apdma: dma-controller@11000400 {
52 clock-names = "apdma";
Dsprd-dma.txt18 apdma: dma-controller@20100000 {
39 dmas = <&apdma 11>, <&apdma 12>;
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt8516.dtsi278 apdma: dma-controller@11000480 { label
295 clock-names = "apdma";
307 dmas = <&apdma 0
308 &apdma 1>;
321 dmas = <&apdma 2
322 &apdma 3>;
335 dmas = <&apdma 4
336 &apdma 5>;
Dmt2712e.dtsi303 dmas = <&apdma 10
304 &apdma 11>;
383 apdma: dma-controller@11000400 { label
412 clock-names = "apdma";
432 dmas = <&apdma 0
433 &apdma 1>;
445 dmas = <&apdma 2
446 &apdma 3>;
458 dmas = <&apdma 4
459 &apdma 5>;
[all …]
Dmt6795.dtsi493 dmas = <&apdma 0>, <&apdma 1>;
505 dmas = <&apdma 2>, <&apdma 3>;
510 apdma: dma-controller@11000380 { label
531 clock-names = "apdma";
543 dmas = <&apdma 4>, <&apdma 5>;
555 dmas = <&apdma 6>, <&apdma 7>;
Dmt8365.dtsi374 apdma: dma-controller@11000280 { label
390 clock-names = "apdma";
400 dmas = <&apdma 0>, <&apdma 1>;
411 dmas = <&apdma 2>, <&apdma 3>;
422 dmas = <&apdma 4>, <&apdma 5>;
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi303 dmas = <&apdma 10
304 &apdma 11>;
381 apdma: dma-controller@11000400 { label
410 clock-names = "apdma";
430 dmas = <&apdma 0
431 &apdma 1>;
443 dmas = <&apdma 2
444 &apdma 3>;
456 dmas = <&apdma 4
457 &apdma 5>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/
Dspi-sprd.txt30 dmas = <&apdma 11 11>, <&apdma 12 12>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/
Dspi-sprd.txt30 dmas = <&apdma 11 11>, <&apdma 12 12>;
/kernel/linux/linux-5.10/drivers/dma/mediatek/
DMakefile2 obj-$(CONFIG_MTK_UART_APDMA) += mtk-uart-apdma.o
DKconfig30 tristate "MediaTek SoCs APDMA support for UART"
Dmtk-uart-apdma.c3 * MediaTek UART APDMA driver.
654 MODULE_DESCRIPTION("MediaTek UART APDMA Controller Driver");
/kernel/linux/linux-6.6/drivers/dma/mediatek/
DMakefile2 obj-$(CONFIG_MTK_UART_APDMA) += mtk-uart-apdma.o
DKconfig30 tristate "MediaTek SoCs APDMA support for UART"
Dmtk-uart-apdma.c3 * MediaTek UART APDMA driver.
652 MODULE_DESCRIPTION("MediaTek UART APDMA Controller Driver");
/kernel/linux/linux-6.6/drivers/clk/mediatek/
Dclk-mt8516.c550 GATE_TOP1(CLK_TOP_APDMA, "apdma", "ahb_infra_sel", 2),
Dclk-mt8167.c759 GATE_TOP1(CLK_TOP_APDMA, "apdma", "ahb_infra_sel", 2),
/kernel/linux/linux-5.10/drivers/clk/mediatek/
Dclk-mt8516.c584 GATE_TOP1(CLK_TOP_APDMA, "apdma", "ahb_infra_sel", 2),
Dclk-mt8167.c821 GATE_TOP1(CLK_TOP_APDMA, "apdma", "ahb_infra_sel", 2),