Searched +full:arm +full:- +full:io (Results 1 – 25 of 1052) sorted by relevance
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/realtek/ |
| D | rtd16xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <1>; 15 #size-cells = <1>; 17 reserved-memory { 18 #address-cells = <1>; 19 #size-cells = <1>; 32 no-map; [all …]
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| D | rtd129x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 5 * Copyright (c) 2016-2019 Andreas Färber 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/reset/realtek,rtd1295.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <1>; 20 reserved-memory { 21 #address-cells = <1>; 22 #size-cells = <1>; [all …]
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| D | rtd139x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/reset/realtek,rtd1295.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <1>; 19 reserved-memory { 20 #address-cells = <1>; 21 #size-cells = <1>; 34 no-map; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/realtek/ |
| D | rtd16xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <1>; 15 #size-cells = <1>; 17 reserved-memory { 18 #address-cells = <1>; 19 #size-cells = <1>; 32 no-map; [all …]
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| D | rtd129x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 5 * Copyright (c) 2016-2019 Andreas Färber 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/reset/realtek,rtd1295.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <1>; 20 reserved-memory { 21 #address-cells = <1>; 22 #size-cells = <1>; [all …]
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| D | rtd139x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/reset/realtek,rtd1295.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <1>; 19 reserved-memory { 20 #address-cells = <1>; 21 #size-cells = <1>; 34 no-map; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/intel/ |
| D | keembay-soc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 interrupt-parent = <&gic>; 12 #address-cells = <2>; 13 #size-cells = <2>; 16 #address-cells = <1>; 17 #size-cells = <0>; 20 compatible = "arm,cortex-a53"; 23 enable-method = "psci"; 27 compatible = "arm,cortex-a53"; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/intel/ |
| D | keembay-soc.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 interrupt-parent = <&gic>; 12 #address-cells = <2>; 13 #size-cells = <2>; 16 #address-cells = <1>; 17 #size-cells = <0>; 20 compatible = "arm,cortex-a53"; 23 enable-method = "psci"; 27 compatible = "arm,cortex-a53"; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/amazon/ |
| D | alpine-v2.dtsi | 4 * Antoine Tenart <antoine.tenart@free-electrons.com> 16 * - Redistributions of source code must retain the above 20 * - Redistributions in binary form must reproduce the above 35 /dts-v1/; 37 #include <dt-bindings/interrupt-controller/arm-gic.h> 41 compatible = "al,alpine-v2"; 42 #address-cells = <2>; 43 #size-cells = <2>; 46 #address-cells = <2>; 47 #size-cells = <0>; [all …]
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| D | alpine-v3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "amazon,al-alpine-v3"; 14 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 20 #address-cells = <1>; 21 #size-cells = <0>; 25 compatible = "arm,cortex-a72"; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amazon/ |
| D | alpine-v2.dtsi | 4 * Antoine Tenart <antoine.tenart@free-electrons.com> 16 * - Redistributions of source code must retain the above 20 * - Redistributions in binary form must reproduce the above 35 /dts-v1/; 37 #include <dt-bindings/interrupt-controller/arm-gic.h> 41 compatible = "al,alpine-v2"; 42 #address-cells = <2>; 43 #size-cells = <2>; 46 #address-cells = <2>; 47 #size-cells = <0>; [all …]
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| D | alpine-v3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 compatible = "amazon,al-alpine-v3"; 14 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 20 #address-cells = <1>; 21 #size-cells = <0>; 25 compatible = "arm,cortex-a72"; [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | r9a06g032.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a7"; 30 compatible = "arm,cortex-a7"; 33 enable-method = "renesas,r9a06g032-smp"; [all …]
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| D | rtd1195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 3 * Copyright (c) 2017-2019 Andreas Färber 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/realtek,rtd1195.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <1>; 20 #address-cells = <1>; 21 #size-cells = <0>; 25 compatible = "arm,cortex-a7"; [all …]
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| D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 36 compatible = "simple-bus"; 37 #address-cells = <1>; 38 #size-cells = <1>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/realtek/ |
| D | rtd1195.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) 3 * Copyright (c) 2017-2019 Andreas Färber 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/reset/realtek,rtd1195.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <1>; 17 #size-cells = <1>; 20 #address-cells = <1>; 21 #size-cells = <0>; 25 compatible = "arm,cortex-a7"; [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/nfc/ |
| D | nfcmrvl.txt | 4 - compatible: Should be: 5 - "marvell,nfc-uart" or "mrvl,nfc-uart" for UART devices 6 - "marvell,nfc-i2c" for I2C devices 7 - "marvell,nfc-spi" for SPI devices 10 - pinctrl-names: Contains only one value - "default". 11 - pintctrl-0: Specifies the pin control groups used for this controller. 12 - reset-n-io: Output GPIO pin used to reset the chip (active low). 13 - hci-muxed: Specifies that the chip is muxing NCI over HCI frames. 15 Optional UART-based chip specific properties: 16 - flow-control: Specifies that the chip is using RTS/CTS. [all …]
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| /kernel/linux/linux-6.6/drivers/iommu/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-y += amd/ intel/ arm/ iommufd/ 3 obj-$(CONFIG_IOMMU_API) += iommu.o 4 obj-$(CONFIG_IOMMU_API) += iommu-traces.o 5 obj-$(CONFIG_IOMMU_API) += iommu-sysfs.o 6 obj-$(CONFIG_IOMMU_DEBUGFS) += iommu-debugfs.o 7 obj-$(CONFIG_IOMMU_DMA) += dma-iommu.o 8 obj-$(CONFIG_IOMMU_IO_PGTABLE) += io-pgtable.o 9 obj-$(CONFIG_IOMMU_IO_PGTABLE_ARMV7S) += io-pgtable-arm-v7s.o 10 obj-$(CONFIG_IOMMU_IO_PGTABLE_LPAE) += io-pgtable-arm.o [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/ |
| D | pl011.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARM AMBA Primecell PL011 serial UART 10 - Rob Herring <robh@kernel.org> 13 - $ref: /schemas/arm/primecell.yaml# 14 - $ref: serial.yaml# 16 # Need a custom select here or 'arm,primecell' will match on lots of nodes 22 - arm,pl011 24 - compatible [all …]
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| /kernel/linux/linux-5.10/drivers/iommu/ |
| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0 2 obj-y += amd/ intel/ arm/ loongson/ 3 obj-$(CONFIG_IOMMU_API) += iommu.o 4 obj-$(CONFIG_IOMMU_API) += iommu-traces.o 5 obj-$(CONFIG_IOMMU_API) += iommu-sysfs.o 6 obj-$(CONFIG_IOMMU_DEBUGFS) += iommu-debugfs.o 7 obj-$(CONFIG_IOMMU_DMA) += dma-iommu.o 8 obj-$(CONFIG_IOMMU_IO_PGTABLE) += io-pgtable.o 9 obj-$(CONFIG_IOMMU_IO_PGTABLE_ARMV7S) += io-pgtable-arm-v7s.o 10 obj-$(CONFIG_IOMMU_IO_PGTABLE_LPAE) += io-pgtable-arm.o [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/ |
| D | apple.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/arm/apple.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Apple ARM Machine 10 - Hector Martin <marcan@marcan.st> 13 ARM platforms using SoCs designed by Apple Inc., branded "Apple Silicon". 17 - Mac mini (M1, 2020) 18 - MacBook Pro (13-inch, M1, 2020) 19 - MacBook Air (M1, 2020) [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/ |
| D | rv1126.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rv1126-cru.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rockchip,rv1126-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| D | rk3xxx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/soc/rockchip,boot-mode.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 15 interrupt-parent = <&gic>; 33 compatible = "fixed-clock"; 34 clock-frequency = <24000000>; 35 #clock-cells = <0>; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/bitmain/ |
| D | bm1880.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/bm1880-clock.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/reset/bitmain,bm1880-reset.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <2>; 15 #size-cells = <2>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a53"; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/bitmain/ |
| D | bm1880.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/bm1880-clock.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/reset/bitmain,bm1880-reset.h> 13 interrupt-parent = <&gic>; 14 #address-cells = <2>; 15 #size-cells = <2>; 18 #address-cells = <1>; 19 #size-cells = <0>; 23 compatible = "arm,cortex-a53"; [all …]
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